Changeset 549 for trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp

Timestamp:

Oct 17, 2013, 8:50:46 PM (11 years ago)

Author:

alain

Message:

Compliance with mapping_table defined in release 2462
Introducing the dspin_router_tsar component used in tsar_generic_iob
platform to implement the RAM networt (between L2 & L3).

File:

• trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp (modified) (5 diffs)

trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp

@@ -654 +654 @@
 
     //////////////////////////////////////////////////
-    tmpl(void)::print_trace()
+    tmpl(void)::print_trace( size_t detailed )
     //////////////////////////////////////////////////
     {
@@ -676 +676 @@
             << " | " << alloc_ivt_fsm_str[r_alloc_ivt_fsm.read()]
             << " | " << alloc_heap_fsm_str[r_alloc_heap_fsm.read()] << std::endl;
+
+        if ( detailed ) m_trt.print(0);
     }
 
@@ -4011 +4013 @@
 
                         assert( ((p_vci_ixr.rerror.read() & 0x1) == 0) and
-                                "MEMC ERROR in IXR_RSP state: XRAM response error !");
+                        "MEMC ERROR in IXR_RSP state: XRAM response error !");
 
                         if (p_vci_ixr.reop.read())   // PUT
@@ -4018 +4020 @@
 
 #if DEBUG_MEMC_IXR_RSP
-                            if (m_debug)
-                                std::cout << "  <MEMC " << name()
-                                    << " IXR_RSP_IDLE> Response from XRAM to a put transaction" << std::endl;
+if (m_debug)
+std::cout << "  <MEMC " << name()
+          << " IXR_RSP_IDLE> Response from XRAM to a put transaction" << std::endl;
 #endif
                         }
@@ -4028 +4030 @@
 
 #if DEBUG_MEMC_IXR_RSP
-                            if (m_debug)
-                                std::cout << "  <MEMC " << name()
-                                    << " IXR_RSP_IDLE> Response from XRAM to a get transaction" << std::endl;
-#endif
-                        }
-                    }
-                    break;
-                }
-                ////////////////////////
+if (m_debug)
+std::cout << "  <MEMC " << name()
+          << " IXR_RSP_IDLE> Response from XRAM to a get transaction" << std::endl;
+#endif
+                        }
+                    }
+                    break;
+                }
+            ////////////////////////
             case IXR_RSP_TRT_ERASE:   // erase the entry in the TRT
-                // decrease the line counter if config request
-                {
-                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_RSP)
-                    {
-                        size_t  index = r_ixr_rsp_trt_index.read(); 
-                        if (m_trt.is_config(index)) r_config_rsp_lines = r_config_rsp_lines.read() - 1;
-                        m_trt.erase(index);
+                                      // decrease the line counter if config request
+            {
+                if (r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_RSP)
+                {
+                    size_t  index = r_ixr_rsp_trt_index.read(); 
+                    if (m_trt.is_config(index)) 
+                        r_config_rsp_lines = r_config_rsp_lines.read() - 1;
+                    m_trt.erase(index);
+                    r_ixr_rsp_fsm = IXR_RSP_IDLE;
+
+#if DEBUG_MEMC_IXR_RSP
+if (m_debug)
+std::cout << "  <MEMC " << name() << " IXR_RSP_TRT_ERASE> Erase TRT entry "
+          << r_ixr_rsp_trt_index.read() << std::endl;
+#endif
+                }
+                break;
+            }
+            //////////////////////
+            case IXR_RSP_TRT_READ:    // write a 64 bits data word in TRT
+            {
+                if ((r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_RSP) and  p_vci_ixr.rspval)
+                {
+                    size_t      index    = r_ixr_rsp_trt_index.read();
+                    size_t      word     = r_ixr_rsp_cpt.read();
+                    bool        eop      = p_vci_ixr.reop.read();
+                    wide_data_t data     = p_vci_ixr.rdata.read();
+                    bool        error    = ((p_vci_ixr.rerror.read() & 0x1) == 1);
+
+                    assert(((eop == (word == (m_words-2))) or error) and
+                    "MEMC ERROR in IXR_RSP_TRT_READ state : invalid response from XRAM");
+
+                    m_trt.write_rsp( index, word, data );
+
+                    r_ixr_rsp_cpt = word + 2;
+
+                    if (eop )
+                    {
+                        r_ixr_rsp_to_xram_rsp_rok[r_ixr_rsp_trt_index.read()] = true;
                         r_ixr_rsp_fsm = IXR_RSP_IDLE;
+                    }
 
 #if DEBUG_MEMC_IXR_RSP
-                        if (m_debug)
-                            std::cout << "  <MEMC " << name() << " IXR_RSP_TRT_ERASE> Erase TRT entry "
-                                << r_ixr_rsp_trt_index.read() << std::endl;
-#endif
-                    }
-                    break;
-                }
-                //////////////////////
-            case IXR_RSP_TRT_READ:    // write a 64 bits data word in TRT
-                {
-                    if ((r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_RSP) and  p_vci_ixr.rspval)
-                    {
-                        size_t      index    = r_ixr_rsp_trt_index.read();
-                        size_t      word     = r_ixr_rsp_cpt.read();
-                        bool        eop      = p_vci_ixr.reop.read();
-                        wide_data_t data     = p_vci_ixr.rdata.read();
-                        bool        error    = ((p_vci_ixr.rerror.read() & 0x1) == 1);
-
-                        assert(((eop == (word == (m_words-2))) or error) and
-                                "MEMC ERROR in IXR_RSP_TRT_READ state : invalid response from XRAM");
-
-                        m_trt.write_rsp( index,
-                                word,
-                                data );
-
-                        r_ixr_rsp_cpt = word + 2;
-
-                        if (eop )
-                        {
-                            r_ixr_rsp_to_xram_rsp_rok[r_ixr_rsp_trt_index.read()] = true;
-                            r_ixr_rsp_fsm = IXR_RSP_IDLE;
-                        }
-
-#if DEBUG_MEMC_IXR_RSP
-                        if (m_debug)
-                            std::cout << "  <MEMC " << name() << " IXR_RSP_TRT_READ> Writing 2 words in TRT : "
-                                << " index = " << std::dec << index
-                                << " / word = " << word
-                                << " / data = " << std::hex << data << std::endl;
-#endif
-                    }
-                    break;
-                }
+if (m_debug)
+std::cout << "  <MEMC " << name() << " IXR_RSP_TRT_READ> Writing 2 words in TRT : "
+          << " index = " << std::dec << index
+          << " / word = " << word
+          << " / data = " << std::hex << data << std::endl;
+#endif
+                }
+                break;
+            }
         } // end swich r_ixr_rsp_fsm