Changeset 583 for trunk/modules


Ignore:
Timestamp:
Dec 3, 2013, 10:29:56 PM (10 years ago)
Author:
alain
Message:

cosmetic...

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp

    r549 r583  
    46464646        paddr_t  mask = ~((m_dcache_words<<2)-1);
    46474647
     4648        // CLACK handler
     4649        // We switch the directory slot to EMPTY state and reset
     4650        // r_dcache_miss_clack if the cleanup ack is matching a pending miss.
     4651        if ( r_dcache_clack_req.read() )
     4652        {
     4653            if ( m_dreq.valid ) m_cost_data_miss_frz++;
     4654
     4655#ifdef INSTRUMENTATION
     4656m_cpt_dcache_dir_write++;
     4657#endif
     4658            r_dcache.write_dir( 0,
     4659                                r_dcache_clack_way.read(),
     4660                                r_dcache_clack_set.read(),
     4661                                CACHE_SLOT_STATE_EMPTY);
     4662
     4663            if ( (r_dcache_miss_set.read() == r_dcache_clack_set.read()) and
     4664                 (r_dcache_miss_way.read() == r_dcache_clack_way.read()) )
     4665            {
     4666                  r_dcache_miss_clack = false;
     4667            }
     4668
     4669            r_dcache_clack_req = false;
     4670
     4671            // return to cc_save state
     4672            r_dcache_fsm = r_dcache_fsm_cc_save.read() ;
     4673
    46484674#if DEBUG_DCACHE
    46494675if ( m_debug_activated )
    46504676{
    46514677    std::cout << "  <PROC " << name()
    4652               << " DCACHE_CC_CHECK> paddr = " << paddr
    4653               << " r_dcache_vci_paddr = " << r_dcache_vci_paddr.read()
    4654               << " mask = " << mask
    4655               << " (r_dcache_fsm_cc_save == DCACHE_MISS_WAIT) = "
    4656               << (r_dcache_fsm_cc_save == DCACHE_MISS_WAIT)
    4657               << " (r_dcache_fsm_cc_save == DCACHE_MISS_DIR_UPDT) = "
    4658               << (r_dcache_fsm_cc_save == DCACHE_MISS_DIR_UPDT)
    4659               << " ((r_dcache_vci_paddr.read() & mask) == (paddr & mask)) = "
    4660               << ((r_dcache_vci_paddr.read() & mask) == (paddr & mask))
    4661               <<std::endl;
    4662 }
    4663 #endif
    4664         // CLACK handler
    4665         // We switch the directory slot to EMPTY state and reset
    4666         // r_dcache_miss_clack if the cleanup ack is matching a pending miss.
    4667         if ( r_dcache_clack_req.read() )
    4668         {
    4669             if ( m_dreq.valid ) m_cost_data_miss_frz++;
    4670 
    4671 #ifdef INSTRUMENTATION
    4672 m_cpt_dcache_dir_write++;
    4673 #endif
    4674             r_dcache.write_dir( 0,
    4675                                 r_dcache_clack_way.read(),
    4676                                 r_dcache_clack_set.read(),
    4677                                 CACHE_SLOT_STATE_EMPTY);
    4678 
    4679             if ( (r_dcache_miss_set.read() == r_dcache_clack_set.read()) and
    4680                  (r_dcache_miss_way.read() == r_dcache_clack_way.read()) )
    4681             {
    4682                   r_dcache_miss_clack = false;
    4683             }
    4684 
    4685             r_dcache_clack_req = false;
    4686 
    4687             // return to cc_save state
    4688             r_dcache_fsm = r_dcache_fsm_cc_save.read() ;
    4689 
    4690 #if DEBUG_DCACHE
    4691 if ( m_debug_activated )
    4692 {
    4693     std::cout << "  <PROC " << name()
    4694               << " DCACHE_CC_CHECK> CC_TYPE_CLACK Switch slot to EMPTY state"
     4678              << " DCACHE_CC_CHECK> CLACK for PADDR " << paddr
     4679              << " Switch slot to EMPTY state : "
    46954680              << " set = " << r_dcache_clack_set.read()
    46964681              << " / way = " << r_dcache_clack_way.read() << std::endl;
     
    47004685        }
    47014686
    4702         assert ( not r_dcache_cc_send_req.read() and "CC_SEND must be available in DCACHE_CC_CHECK" );
     4687        assert ( not r_dcache_cc_send_req.read() and
     4688        "CC_SEND must be available in DCACHE_CC_CHECK" );
    47034689
    47044690        // Match between MISS address and CC address
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