Changeset 590


Ignore:
Timestamp:
Dec 5, 2013, 4:40:04 PM (9 years ago)
Author:
bouyer
Message:

Use the SPI controller's DMA if the defs_platform.h defines
IOC_USE_DMA.

Location:
trunk/softs/tsar_boot
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/softs/tsar_boot/include/spi.h

    r398 r590  
    3636     */
    3737    unsigned int ss;
     38    unsigned int dma_base;
     39    unsigned int dma_baseh;
     40    unsigned int dma_count;
    3841};
    3942
     
    130133#define SPI_CTRL_RXN_EN        ( 1 << 9  ) /**< MISO is latched on neg edge   */
    131134#define SPI_CTRL_GO_BSY        ( 1 << 8  ) /**< Start the transfer            */
     135#define SPI_CTRL_DMA_BSY        (1 << 16)  /***   DMA in progress             */
    132136#define SPI_CTRL_CHAR_LEN_MASK (  0xFF   ) /**< Bits transmited in 1 transfer */
    133137#define SPI_RXTX_MASK          (  0xFF   ) /**< Mask for the an RX/TX value   */
     138
     139#define SPI_DMA_COUNT_READ      (1 << 0) /* operation is a read (else write) */
    134140
    135141/**
     
    140146 * \brief  Check the GO_BUSY bit of the SPI Controller
    141147 */
    142 #define SPI_IS_BUSY(x)         ((ioread32(&x->ctrl) & SPI_CTRL_GO_BSY) != 0) ? 1 : 0
     148#define SPI_IS_BUSY(x)         ((ioread32(&x->ctrl) & (SPI_CTRL_GO_BSY|SPI_CTRL_DMA_BSY)) != 0) ? 1 : 0
    143149
    144150#endif
  • trunk/softs/tsar_boot/src/spi.c

    r415 r590  
    55 */
    66#include <spi.h>
     7#include <reset_ioc.h>
     8#include <reset_utils.h>
    79
    810/**
     
    9395    _spi_wait_if_busy(spi);
    9496
    95     /* switch to 128 bits words */
    9697    spi_ctrl0 = ioread32(&spi->ctrl);
    97     spi_ctrl = (spi_ctrl0 & ~SPI_CTRL_CHAR_LEN_MASK) | 128;
    98     iowrite32(&spi->ctrl, spi_ctrl);
     98    if (count == 512 && ((int)buf & 0x3f) == 0) {
     99        /* use DMA */
     100        spi->dma_base = (int)buf;
     101        spi->dma_baseh = 0;
     102        spi->dma_count = count | SPI_DMA_COUNT_READ;
     103        _spi_wait_if_busy(spi);
     104        i = count / 4;
     105    } else {
     106        /* switch to 128 bits words */
     107        spi_ctrl = (spi_ctrl0 & ~SPI_CTRL_CHAR_LEN_MASK) | 128;
     108        iowrite32(&spi->ctrl, spi_ctrl);
    99109
    100     /* read data */
    101     for (i = 0; i + 3 < count / 4; i += 4) {
    102         iowrite32(&spi->rx_tx[0], 0xffffffff);
    103         iowrite32(&spi->rx_tx[1], 0xffffffff);
    104         iowrite32(&spi->rx_tx[2], 0xffffffff);
    105         iowrite32(&spi->rx_tx[3], 0xffffffff);
    106         iowrite32(&spi->ctrl,  spi_ctrl | SPI_CTRL_GO_BSY);
     110        /* read data */
     111        for (i = 0; i + 3 < count / 4; i += 4) {
     112            iowrite32(&spi->rx_tx[0], 0xffffffff);
     113            iowrite32(&spi->rx_tx[1], 0xffffffff);
     114            iowrite32(&spi->rx_tx[2], 0xffffffff);
     115            iowrite32(&spi->rx_tx[3], 0xffffffff);
     116            iowrite32(&spi->ctrl,  spi_ctrl | SPI_CTRL_GO_BSY);
    107117
    108         _spi_wait_if_busy(spi);
     118            _spi_wait_if_busy(spi);
    109119       
    110         *data = bswap32(ioread32(&spi->rx_tx[3]));
    111         data++;
    112         *data = bswap32(ioread32(&spi->rx_tx[2]));
    113         data++;
    114         *data = bswap32(ioread32(&spi->rx_tx[1]));
    115         data++;
    116         *data = bswap32(ioread32(&spi->rx_tx[0]));
    117         data++;
     120            *data = bswap32(ioread32(&spi->rx_tx[3]));
     121            data++;
     122            *data = bswap32(ioread32(&spi->rx_tx[2]));
     123            data++;
     124            *data = bswap32(ioread32(&spi->rx_tx[1]));
     125            data++;
     126            *data = bswap32(ioread32(&spi->rx_tx[0]));
     127            data++;
     128        }
    118129    }
    119130
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