Index: trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
===================================================================
--- trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp	(revision 582)
+++ trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp	(revision 596)
@@ -33,4 +33,5 @@
 
 #include "../include/vci_mem_cache.h"
+#include "mem_cache.h"
 
 //////   debug services   /////////////////////////////////////////////////////////////
@@ -392,4 +393,11 @@
         m_broadcast_boundaries(0x7C1F),
 
+        // CONFIG interface
+        m_config_addr_mask((1<<12)-1),
+
+        m_config_regr_width(7),
+        m_config_func_width(3),
+        m_config_regr_idx_mask((1<<m_config_regr_width)-1),
+        m_config_func_idx_mask((1<<m_config_func_width)-1),
 
         //  FIFOs
@@ -652,4 +660,110 @@
     }
 
+    /////////////////////////////////////////////////////
+    tmpl(int)::read_instrumentation(uint32_t regr, uint32_t & rdata)
+    /////////////////////////////////////////////////////
+    {
+        int error = 0;
+
+        switch(regr)
+        {
+            ///////////////////////////////////////////////////////
+            //       DIRECT instrumentation registers            //
+            // Registers of 32 bits and therefore only LO is     //
+            // implemented.                                      //
+            //                                                   //
+            // The HI may be used in future implementations      //
+            ///////////////////////////////////////////////////////
+
+            // LOCAL
+
+            case MEMC_LOCAL_READ_LO   : rdata = m_cpt_read_local        ; break;
+            case MEMC_LOCAL_WRITE_LO  : rdata = m_cpt_write_flits_local ; break;
+            case MEMC_LOCAL_LL_LO     : rdata = m_cpt_ll_local          ; break;
+            case MEMC_LOCAL_SC_LO     : rdata = m_cpt_sc_local          ; break;
+            case MEMC_LOCAL_CAS_LO    : rdata = m_cpt_cas_local         ; break;
+            case MEMC_LOCAL_READ_HI   :
+            case MEMC_LOCAL_WRITE_HI  :
+            case MEMC_LOCAL_LL_HI     :
+            case MEMC_LOCAL_SC_HI     :
+            case MEMC_LOCAL_CAS_HI    : rdata = 0; break;
+
+            // REMOTE
+
+            case MEMC_REMOTE_READ_LO  : rdata = m_cpt_read_remote        ; break;
+            case MEMC_REMOTE_WRITE_LO : rdata = m_cpt_write_flits_remote ; break;
+            case MEMC_REMOTE_LL_LO    : rdata = m_cpt_ll_remote          ; break;
+            case MEMC_REMOTE_SC_LO    : rdata = m_cpt_sc_remote          ; break;
+            case MEMC_REMOTE_CAS_LO   : rdata = m_cpt_cas_remote         ; break;
+            case MEMC_REMOTE_READ_HI  :
+            case MEMC_REMOTE_WRITE_HI :
+            case MEMC_REMOTE_LL_HI    :
+            case MEMC_REMOTE_SC_HI    :
+            case MEMC_REMOTE_CAS_HI   : rdata = 0; break;
+
+            // COST
+
+            case MEMC_COST_READ_LO    : rdata = m_cpt_read_cost ; break;
+            case MEMC_COST_WRITE_LO   : rdata = m_cpt_write_cost; break;
+            case MEMC_COST_LL_LO      : rdata = m_cpt_ll_cost   ; break;
+            case MEMC_COST_SC_LO      : rdata = m_cpt_sc_cost   ; break;
+            case MEMC_COST_CAS_LO     : rdata = m_cpt_cas_cost  ; break;
+            case MEMC_COST_READ_HI    :
+            case MEMC_COST_WRITE_HI   :
+            case MEMC_COST_LL_HI      :
+            case MEMC_COST_SC_HI      :
+            case MEMC_COST_CAS_HI     : rdata = 0; break;
+
+            ///////////////////////////////////////////////////////
+            //       COHERENCE instrumentation registers         //
+            // Registers of 32 bits and therefore only LO is     //
+            // implemented.                                      //
+            //                                                   //
+            // The HI may be used in future implementations      //
+            ///////////////////////////////////////////////////////
+
+            // LOCAL
+
+            case MEMC_LOCAL_MUPDATE_LO  : rdata = m_cpt_update_local ; break;
+            case MEMC_LOCAL_MINVAL_LO   : rdata = m_cpt_minval_local ; break;
+            case MEMC_LOCAL_CLEANUP_LO  : rdata = m_cpt_cleanup_local; break;
+            case MEMC_LOCAL_MUPDATE_HI  :
+            case MEMC_LOCAL_MINVAL_HI   :
+            case MEMC_LOCAL_CLEANUP_HI  : rdata = 0; break;
+
+            // REMOTE
+
+            case MEMC_REMOTE_MUPDATE_LO : rdata = m_cpt_update_remote ; break;
+            case MEMC_REMOTE_MINVAL_LO  : rdata = m_cpt_minval_remote ; break;
+            case MEMC_REMOTE_CLEANUP_LO : rdata = m_cpt_cleanup_remote; break;
+            case MEMC_REMOTE_MUPDATE_HI :
+            case MEMC_REMOTE_MINVAL_HI  :
+            case MEMC_REMOTE_CLEANUP_HI : rdata = 0; break;
+
+            // COST
+
+            case MEMC_COST_MUPDATE_LO   : rdata = m_cpt_update_cost   ; break;
+            case MEMC_COST_MINVAL_LO    : rdata = m_cpt_minval_cost   ; break;
+            case MEMC_COST_CLEANUP_LO   : rdata = m_cpt_cleanup_cost  ; break;
+            case MEMC_COST_MUPDATE_HI   :
+            case MEMC_COST_MINVAL_HI    :
+            case MEMC_COST_CLEANUP_HI   : rdata = 0; break;
+
+            // TOTAL
+
+            case MEMC_TOTAL_MUPDATE_LO  : rdata = m_cpt_update ; break;
+            case MEMC_TOTAL_MINVAL_LO   : rdata = m_cpt_minval ; break;
+            case MEMC_TOTAL_BINVAL_LO   : rdata = m_cpt_binval ; break;
+            case MEMC_TOTAL_MUPDATE_HI  :
+            case MEMC_TOTAL_MINVAL_HI   :
+            case MEMC_TOTAL_BINVAL_HI   : rdata = 0; break;
+
+            // unknown register
+
+            default                     : error = 1;
+        }
+
+        return error;
+    }
 
     //////////////////////////////////////////////////
@@ -722,10 +836,10 @@
                 << "[022] UPDT COST (FLITS * DIST)  = " << m_cpt_update_cost << std::endl
                 << std::endl
-                << "[023] REQUESTS TRIG. M_INV      = " << m_cpt_m_inval << std::endl
-                << "[024] LOCAL M_INV               = " << m_cpt_m_inval_local << std::endl
-                << "[025] REMOTE M_INV              = " << m_cpt_m_inval_remote << std::endl
-                << "[026] M_INV COST (FLITS * DIST) = " << m_cpt_m_inval_cost << std::endl
+                << "[023] REQUESTS TRIG. M_INV      = " << m_cpt_minval << std::endl
+                << "[024] LOCAL M_INV               = " << m_cpt_minval_local << std::endl
+                << "[025] REMOTE M_INV              = " << m_cpt_minval_remote << std::endl
+                << "[026] M_INV COST (FLITS * DIST) = " << m_cpt_minval_cost << std::endl
                 << std::endl
-                << "[027] BROADCAT INVAL            = " << m_cpt_br_inval << std::endl
+                << "[027] BROADCAT INVAL            = " << m_cpt_binval << std::endl
                 << std::endl
                 << "[028] LOCAL CLEANUP             = " << m_cpt_cleanup_local << std::endl
@@ -771,10 +885,10 @@
                 << "[117] AV. REMOTE UPDT PER UP REQ = " << (double) m_cpt_update_remote / m_cpt_update << std::endl
                 << std::endl
-                << "[118] INVAL MULTICAST RATE  = " << (double) m_cpt_m_inval / m_cpt_cycles << std::endl
-                << "[119] AVE. INVAL PER M_INV  = " << (double) (m_cpt_m_inval_local + m_cpt_m_inval_remote) / m_cpt_m_inval << std::endl
-                << "[120] AV. LOC INV PER M_INV = " << (double) m_cpt_m_inval_local / m_cpt_m_inval << std::endl
-                << "[121] AV. REM INV PER M_INV = " << (double) m_cpt_m_inval_remote / m_cpt_m_inval << std::endl
+                << "[118] INVAL MULTICAST RATE  = " << (double) m_cpt_minval / m_cpt_cycles << std::endl
+                << "[119] AVE. INVAL PER M_INV  = " << (double) (m_cpt_minval_local + m_cpt_minval_remote) / m_cpt_minval << std::endl
+                << "[120] AV. LOC INV PER M_INV = " << (double) m_cpt_minval_local / m_cpt_minval << std::endl
+                << "[121] AV. REM INV PER M_INV = " << (double) m_cpt_minval_remote / m_cpt_minval << std::endl
                 << std::endl
-                << "[122] INVAL BROADCAST RATE  = " << (double) m_cpt_br_inval / m_cpt_cycles << std::endl
+                << "[122] INVAL BROADCAST RATE  = " << (double) m_cpt_binval / m_cpt_cycles << std::endl
                 << "[123] WRITE DIRTY RATE      = " << (double) m_cpt_write_dirty / m_cpt_cycles << std::endl
                 << std::endl
@@ -968,9 +1082,9 @@
             m_cpt_update_remote      = 0;
             m_cpt_update_cost        = 0;
-            m_cpt_m_inval            = 0;
-            m_cpt_m_inval_local      = 0;
-            m_cpt_m_inval_remote     = 0;
-            m_cpt_m_inval_cost       = 0;
-            m_cpt_br_inval           = 0;
+            m_cpt_minval             = 0;
+            m_cpt_minval_local       = 0;
+            m_cpt_minval_remote      = 0;
+            m_cpt_minval_cost        = 0;
+            m_cpt_binval             = 0;
             m_cpt_cleanup_local      = 0;
             m_cpt_cleanup_remote     = 0;
@@ -1206,74 +1320,150 @@
             case TGT_CMD_CONFIG:    // execute config request and return response
                 {
-                    addr_t   seg_base = m_seg[m_seg_config]->baseAddress();
-                    addr_t   address  = p_vci_tgt.address.read();
-                    size_t   cell     = (address - seg_base) / vci_param_int::B;
+                    ///////////////////////////////////////////////////////////
+                    //  Decoding CONFIG interface commands                   //
+                    //                                                       //
+                    //  VCI ADDRESS                                          //
+                    //  ================================================     //
+                    //  GLOBAL | LOCAL | ... | FUNC_IDX | REGS_IDX | 00      //
+                    //   IDX   |  IDX  |     | (3 bits) | (7 bits) |         //
+                    //  ================================================     //
+                    //                                                       //
+                    //  For instrumentation : FUNC_IDX = 0b001               //
+                    //                                                       //
+                    //  REGS_IDX                                             //
+                    //  ============================================         //
+                    //       Z     |    Y      |    X     |   W              //
+                    //    (1 bit)  | (2 bits)  | (3 bits) | (1 bit)          //
+                    //  ============================================         //
+                    //                                                       //
+                    //  Z : DIRECT / COHERENCE                               //
+                    //  Y : SUBTYPE ( LOCAL, REMOTE, OTHER )                 //
+                    //  X : REGISTER INDEX                                   //
+                    //  W : HI / LO                                          //
+                    //                                                       //
+                    //  For configuration: FUNC_IDX = 0b000                  //
+                    //                                                       //
+                    //  REGS_IDX                                             //
+                    //  ============================================         //
+                    //             RESERVED             |    X     |         //
+                    //             (4 bits)             | (3 bits) |         //
+                    //  ============================================         //
+                    //                                                       //
+                    //  X : REGISTER INDEX                                   //
+                    //                                                       //
+                    ///////////////////////////////////////////////////////////
+
+                    addr_t addr_lsb = p_vci_tgt.address.read() &
+                                      m_config_addr_mask;
+
+                    addr_t cell = (addr_lsb / vci_param_int::B);
+
+                    size_t regr = cell &
+                                  m_config_regr_idx_mask;
+
+                    size_t func = (cell >> m_config_regr_width) &
+                                  m_config_func_idx_mask;
 
                     bool     need_rsp; 
-                    size_t   error;  
+                    int      error;  
                     uint32_t rdata = 0;         // default value
                     uint32_t wdata = p_vci_tgt.wdata.read();
 
-                    if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_READ)         // get lock
-                            and (cell == MEMC_LOCK))
-                    {
-                        rdata            = (uint32_t) r_config_lock.read();
-                        need_rsp         = true;
-                        error            = 0;
-                        r_config_lock    = true;
-                    }
-                    else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)  // release lock
-                            and (cell == MEMC_LOCK))
-                    {
-                        need_rsp      = true;
-                        error         = 0;
-                        r_config_lock = false;
-                    }
-                    else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set addr_lo
-                            and (cell == MEMC_ADDR_LO))
-                    {
-                        assert( ((wdata % (m_words * vci_param_int::B)) == 0) and
-                                "VCI_MEM_CACHE CONFIG ERROR: The buffer must be aligned on a cache line");
-
-                        need_rsp         = true;
-                        error            = 0;
-                        r_config_address = (r_config_address.read() & 0xFFFFFFFF00000000LL) |
-                            ((addr_t)wdata);
-                    }
-                    else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set addr_hi
-                            and (cell == MEMC_ADDR_HI))
-
-                    {
-                        need_rsp         = true;
-                        error            = 0;
-                        r_config_address = (r_config_address.read() & 0x00000000FFFFFFFFLL) |
-                            (((addr_t) wdata) << 32);
-                    }
-                    else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set buf_lines
-                            and (cell == MEMC_BUF_LENGTH))
-                    {
-                        need_rsp         = true;
-                        error            = 0;
-                        size_t lines     = wdata / (m_words << 2);
-                        if (wdata % (m_words << 2)) lines++;
-                        r_config_cmd_lines = lines;
-                        r_config_rsp_lines = 0;
-                    }
-                    else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set cmd type
-                            and (cell == MEMC_CMD_TYPE))
-                    {
-                        need_rsp         = false;
-                        error            = 0;
-                        r_config_cmd     = wdata;
-
-                        // prepare delayed response from CONFIG FSM
-                        r_config_srcid   = p_vci_tgt.srcid.read();
-                        r_config_trdid   = p_vci_tgt.trdid.read();
-                        r_config_pktid   = p_vci_tgt.pktid.read();
-                    }
-                    else
-                    {
-                        need_rsp         = true;
-                        error            = 1;
+                    switch(func)
+                    {
+                        // memory operation
+                        case MEMC_CONFIG:
+                        {
+                            if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_READ)         // get lock
+                                    and (regr == MEMC_LOCK))
+                            {
+                                rdata            = (uint32_t) r_config_lock.read();
+                                need_rsp         = true;
+                                error            = 0;
+                                r_config_lock    = true;
+                            }
+                            else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)  // release lock
+                                    and (regr == MEMC_LOCK))
+                            {
+                                need_rsp      = true;
+                                error         = 0;
+                                r_config_lock = false;
+                            }
+                            else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set addr_lo
+                                    and (regr == MEMC_ADDR_LO))
+                            {
+                                assert( ((wdata % (m_words * vci_param_int::B)) == 0) and
+                                        "VCI_MEM_CACHE CONFIG ERROR: The buffer must be aligned on a cache line");
+
+                                need_rsp         = true;
+                                error            = 0;
+                                r_config_address = (r_config_address.read() & 0xFFFFFFFF00000000LL) |
+                                    ((addr_t)wdata);
+                            }
+                            else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set addr_hi
+                                    and (regr == MEMC_ADDR_HI))
+
+                            {
+                                need_rsp         = true;
+                                error            = 0;
+                                r_config_address = (r_config_address.read() & 0x00000000FFFFFFFFLL) |
+                                    (((addr_t) wdata) << 32);
+                            }
+                            else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set buf_lines
+                                    and (regr == MEMC_BUF_LENGTH))
+                            {
+                                need_rsp         = true;
+                                error            = 0;
+                                size_t lines     = wdata / (m_words << 2);
+                                if (wdata % (m_words << 2)) lines++;
+                                r_config_cmd_lines = lines;
+                                r_config_rsp_lines = 0;
+                            }
+                            else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set cmd type
+                                    and (regr == MEMC_CMD_TYPE))
+                            {
+                                need_rsp         = false;
+                                error            = 0;
+                                r_config_cmd     = wdata;
+
+                                // prepare delayed response from CONFIG FSM
+                                r_config_srcid   = p_vci_tgt.srcid.read();
+                                r_config_trdid   = p_vci_tgt.trdid.read();
+                                r_config_pktid   = p_vci_tgt.pktid.read();
+                            }
+                            else
+                            {
+                                need_rsp         = true;
+                                error            = 1;
+                            }
+
+                            break;
+                        }
+
+                        // instrumentation registers
+                        case MEMC_INSTRM:
+                        {
+                            need_rsp = true;
+
+                            if (p_vci_tgt.cmd.read() == vci_param_int::CMD_READ)
+                            {
+                                error = read_instrumentation(regr, rdata);
+                            }
+                            else
+                            {
+                                error = 1;
+                            }
+
+                            break;
+                        }
+
+                        //unknown function
+                        default:
+                        {
+                            need_rsp = true;
+                            error    = 1;
+
+                            break;
+                        }
                     }
 
@@ -1289,10 +1479,7 @@
                         r_tgt_cmd_to_tgt_rsp_error = error;
                         r_tgt_cmd_to_tgt_rsp_rdata = rdata;
-                        r_tgt_cmd_fsm              = TGT_CMD_IDLE;
-                    }
-                    else
-                    {
-                        r_tgt_cmd_fsm              = TGT_CMD_IDLE;
-                    }
+                    }
+
+                    r_tgt_cmd_fsm = TGT_CMD_IDLE;
 
 #if DEBUG_MEMC_TGT_CMD
@@ -1300,4 +1487,7 @@
                         std::cout << "  <MEMC " << name() << " TGT_CMD_CONFIG> Configuration request:"
                             << " address = " << std::hex << p_vci_tgt.address.read()
+                            << " / func = " << func
+                            << " / regr = " << regr
+                            << " / rdata = " << rdata
                             << " / wdata = " << p_vci_tgt.wdata.read()
                             << " / need_rsp = " << need_rsp
@@ -1355,5 +1545,5 @@
                         if (is_local_req(p_vci_tgt.srcid.read())) m_cpt_read_local++;
                         else                                      m_cpt_read_remote++;
-                        m_cpt_read_cost += m_words * req_distance(p_vci_tgt.srcid.read());
+                        m_cpt_read_cost += req_distance(p_vci_tgt.srcid.read());
                     }
                     // </Activity counters>
@@ -1677,8 +1867,8 @@
 #if DEBUG_MEMC_CONFIG
 if (m_debug)
-std::cout << "  <MEMC " << name() << " CONFIG_IDLE> Config Request received" 
-          << " / address = " << std::hex << r_config_address.read()
-          << " / lines = " << std::dec << r_config_cmd_lines.read()
-          << " / type = " << r_config_cmd.read() << std::endl;
+    std::cout << "  <MEMC " << name() << " CONFIG_IDLE> Config Request received" 
+              << " / address = " << std::hex << r_config_address.read()
+              << " / lines = " << std::dec << r_config_cmd_lines.read()
+              << " / type = " << r_config_cmd.read() << std::endl;
 #endif
                 }
@@ -4699,13 +4889,4 @@
                             "MEMC ERROR in CLEANUP_IDLE state : illegal SRCID value");
 
-                    // <Activity Counters>
-                    if (is_local_req(srcid)) {
-                        m_cpt_cleanup_local++;
-                    }
-                    else {
-                        m_cpt_cleanup_remote++;
-                        m_cpt_cleanup_cost += req_distance(srcid);
-                    }
-                    // </Activity Counters>
                     cc_receive_to_cleanup_fifo_get = true;
                     r_cleanup_fsm                  = CLEANUP_GET_NLINE;
@@ -6207,10 +6388,10 @@
                         if (is_local_req(m_config_to_cc_send_srcid_fifo.read()))
                         {
-                            m_cpt_m_inval_local++;
+                            m_cpt_minval_local++;
                         }
                         else
                         {
-                            m_cpt_m_inval_remote++;
-                            m_cpt_m_inval_cost += req_distance(m_config_to_cc_send_srcid_fifo.read());
+                            m_cpt_minval_remote++;
+                            m_cpt_minval_cost += req_distance(m_config_to_cc_send_srcid_fifo.read());
                         }
                         // </Activity Counters>
@@ -6220,5 +6401,5 @@
                     if (r_config_to_cc_send_multi_req.read()) r_config_to_cc_send_multi_req = false;
                     // <Activity Counters>
-                    m_cpt_m_inval++;
+                    m_cpt_minval++;
                     // </Activity Counters>
                     r_cc_send_fsm = CC_SEND_CONFIG_IDLE;
@@ -6252,5 +6433,5 @@
                     if (not p_dspin_m2p.read) break;
                     // <Activity Counters>
-                    m_cpt_br_inval++;
+                    m_cpt_binval++;
                     // </Activity Counters>
                     r_config_to_cc_send_brdcast_req = false;
@@ -6274,10 +6455,10 @@
                         if (is_local_req(m_xram_rsp_to_cc_send_srcid_fifo.read()))
                         {
-                            m_cpt_m_inval_local++;
+                            m_cpt_minval_local++;
                         }
                         else
                         {
-                            m_cpt_m_inval_remote++;
-                            m_cpt_m_inval_cost += req_distance(m_xram_rsp_to_cc_send_srcid_fifo.read());
+                            m_cpt_minval_remote++;
+                            m_cpt_minval_cost += req_distance(m_xram_rsp_to_cc_send_srcid_fifo.read());
                         }
                         // </Activity Counters>
@@ -6287,5 +6468,5 @@
                     if (r_xram_rsp_to_cc_send_multi_req.read()) r_xram_rsp_to_cc_send_multi_req = false;
                     // <Activity Counters>
-                    m_cpt_m_inval++;
+                    m_cpt_minval++;
                     // </Activity Counters>
                     r_cc_send_fsm = CC_SEND_XRAM_RSP_IDLE;
@@ -6319,5 +6500,5 @@
                     if (not p_dspin_m2p.read) break;
                     // <Activity Counters>
-                    m_cpt_br_inval++;
+                    m_cpt_binval++;
                     // </Activity Counters>
                     r_xram_rsp_to_cc_send_brdcast_req = false;
@@ -6345,5 +6526,5 @@
 
                     // <Activity Counters>
-                    m_cpt_br_inval++;
+                    m_cpt_binval++;
                     // </Activity Counters>
 
@@ -6434,5 +6615,5 @@
                     if (not p_dspin_m2p.read) break;
                     // <Activity Counters>
-                    m_cpt_br_inval++;
+                    m_cpt_binval++;
                     // </Activity Counters>
 
@@ -6576,4 +6757,18 @@
                     cc_receive_to_cleanup_fifo_put = true;
                     r_cc_receive_fsm               = CC_RECEIVE_CLEANUP_EOP;
+
+                    // <Activity Counters>
+                    uint32_t srcid = DspinDhccpParam::dspin_get(
+                            p_dspin_p2m.data.read(), 
+                            DspinDhccpParam::CLEANUP_SRCID);
+
+                    if (is_local_req(srcid)) {
+                        m_cpt_cleanup_local++;
+                    }
+                    else {
+                        m_cpt_cleanup_remote++;
+                        m_cpt_cleanup_cost += req_distance(srcid);
+                    }
+                    // </Activity Counters>
 
                     break;
@@ -8029,4 +8224,37 @@
 
             case TGT_CMD_CONFIG:
+            {
+                addr_t addr_lsb = p_vci_tgt.address.read() &
+                                  m_config_addr_mask;
+
+                addr_t cell = (addr_lsb / vci_param_int::B);
+
+                size_t regr = cell &
+                              m_config_regr_idx_mask;
+
+                size_t func = (cell >> m_config_regr_width) &
+                              m_config_func_idx_mask;
+
+                switch(func)
+                {
+                    case MEMC_CONFIG:
+                        if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)
+                                and (regr == MEMC_CMD_TYPE))
+                        {
+                            p_vci_tgt.cmdack = true;
+                        }
+                        else
+                        {
+                            p_vci_tgt.cmdack = not r_tgt_cmd_to_tgt_rsp_req.read();
+                        }
+                        break;
+
+                    default:
+                        p_vci_tgt.cmdack = not r_tgt_cmd_to_tgt_rsp_req.read();
+                        break;
+                }
+
+                break;
+            }
             case TGT_CMD_ERROR:
                 p_vci_tgt.cmdack = not r_tgt_cmd_to_tgt_rsp_req.read();
