Changeset 635


Ignore:
Timestamp:
Feb 20, 2014, 4:41:09 PM (9 years ago)
Author:
porquet
Message:

cc_vcache_v4: enable ondemand debugging (via xtn commands)

File:
1 edited

Legend:

Unmodified
Added
Removed
  • branches/v4/modules/vci_cc_vcache_wrapper_v4/caba/source/src/vci_cc_vcache_wrapper_v4.cpp

    r352 r635  
    884884    m_cpt_total_cycles++;
    885885
    886     m_debug_cleanup_fsm    = (m_cpt_total_cycles > m_debug_start_cycle) and m_debug_ok;
    887     m_debug_icache_fsm     = (m_cpt_total_cycles > m_debug_start_cycle) and m_debug_ok;
    888     m_debug_dcache_fsm     = (m_cpt_total_cycles > m_debug_start_cycle) and m_debug_ok;
     886    m_debug_cleanup_fsm = m_debug_cleanup_fsm ||
     887        ((m_cpt_total_cycles > m_debug_start_cycle) and m_debug_ok);
     888    m_debug_icache_fsm  = m_debug_icache_fsm ||
     889        ((m_cpt_total_cycles > m_debug_start_cycle) and m_debug_ok);
     890    m_debug_dcache_fsm  = m_debug_dcache_fsm ||
     891        ((m_cpt_total_cycles > m_debug_start_cycle) and m_debug_ok);
    889892
    890893    /////////////////////////////////////////////////////////////////////
     
    24452448                        r_dcache_fsm = DCACHE_IDLE;
    24462449                        break;
     2450
     2451                    case iss_t::XTN_DEBUG_MASK:                 // debug mask
     2452                        m_debug_dcache_fsm = ((m_dreq.wdata & 0x1) != 0);
     2453                        m_debug_icache_fsm = ((m_dreq.wdata & 0x2) != 0);
     2454                        m_debug_cleanup_fsm = ((m_dreq.wdata & 0x4) != 0);
     2455                        m_drsp.valid = true;
     2456                        r_dcache_fsm = DCACHE_IDLE;
     2457                        break;
    24472458       
    24482459                    default:
     
    25982609if ( m_debug_dcache_fsm )
    25992610{
    2600     std::cout << "  <PROC " << name() << ".DCACHE_IDLE> HIT in dcache" << std::endl;
     2611    std::cout << "  <PROC " << name() << ".DCACHE_IDLE> HIT read in dcache"
     2612        << " / PADDR=" << std::hex << paddr
     2613        << std::endl;
    26012614}
    26022615#endif
     
    34453458            r_dcache_fsm = DCACHE_IDLE;
    34463459            m_drsp.valid = true;
     3460#if DEBUG_DCACHE
     3461if ( m_debug_dcache_fsm )
     3462{
     3463    std::cout << "<PROC " << name()
     3464        << " SWITCH PTPR>: PADDR=" << std::hex
     3465        << (m_dreq.wdata << (INDEX1_NBITS+2))
     3466        << std::endl;
     3467}
     3468#endif
    34473469        }
    34483470        break;
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