Changeset 677 for branches/MESI/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp

Timestamp:

Apr 14, 2014, 2:15:01 PM (10 years ago)

Author:

haoliu

Message:

MESI bug fixed

File:

• branches/MESI/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp (modified) (8 diffs)

branches/MESI/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp

@@ -2298 +2298 @@
         {
 
-//#if 1
-//            // @@@ DO NOT COMMIT: ALMOS KILLING SIMU PURPOSE
-//            if (m_dreq.addr == 0x0 && m_dreq.wdata == 0xDEADDEAD) {
-//                std::cout << "*** Ecriture à l'adresse 0 pour fin de simulation ***" << std::endl;
-//                raise(SIGINT);
-//            }
-//#endif
+#if 1
+            // @@@ DO NOT COMMIT: ALMOS KILLING SIMU PURPOSE
+            if (m_dreq.addr == 0x0 && m_dreq.wdata == 0xDEADDEAD) {
+                std::cout << "*** Ecriture à l'adresse 0 pour fin de simulation ***" << std::endl;
+                raise(SIGINT);
+            }
+#endif
 
             if ( r_mmu_mode.read() & DATA_TLB_MASK )  // DTLB activated
@@ -4616 +4616 @@
 
         // coherence request (from CC_RECEIVE FSM)
-        if ( r_cc_receive_dcache_req.read() and not r_dcache_cc_send_req.read() and not r_dcache_cleanup_victim_req.read() and not r_dcache_miss_updt.read())
+        if ( r_cc_receive_dcache_req.read() and not r_dcache_cc_send_req.read() and not r_dcache_cleanup_victim_req.read() )
         {
             r_dcache_fsm = DCACHE_CC_CHECK;
@@ -4755 +4755 @@
 
         // coherence request (from CC_RECEIVE FSM)
-        if ( r_cc_receive_dcache_req.read() and not r_dcache_cc_send_req.read() and not r_dcache_cleanup_victim_req.read() and not r_dcache_miss_inval.read() and not r_dcache_miss_updt.read())
+        if ( r_cc_receive_dcache_req.read() and not r_dcache_cc_send_req.read() and not r_dcache_cleanup_victim_req.read() )
         {
             r_dcache_fsm = DCACHE_CC_CHECK;
@@ -4762 +4762 @@
         }
 
-        if ( not r_dcache_miss_clack.read() and not r_dcache_cc_send_req.read())  // waiting cleanup acknowledge
+        if ( not r_dcache_miss_clack.read() )  // waiting cleanup acknowledge
         {
             if ( r_dcache_miss_inval.read() ) // switch slot to ZOMBI state, and new cleanup
             {
-                r_dcache_miss_inval         = false;
-                // request cleanup
-                r_dcache_cc_send_req        = true;
-                r_dcache_cc_send_nline      = r_dcache_save_paddr.read()/(m_dcache_words<<2);
-                r_dcache_cc_send_way        = r_dcache_miss_way.read();
-                r_dcache_cc_send_type       = CC_TYPE_CLEANUP;
-                r_dcache_cc_line_dirty      = false;   // in case of miss inval, the cleanup is not with data.
-                r_dcache_cc_line_no_shared  = r_dcache_rsp_state.read(); // the miss read rsp contents the state of this line 
+                if(not r_dcache_cc_send_req.read())
+                {
+                    r_dcache_miss_inval         = false;
+                    // request cleanup
+                    r_dcache_cc_send_req        = true;
+                    r_dcache_cc_send_nline      = r_dcache_save_paddr.read()/(m_dcache_words<<2);
+                    r_dcache_cc_send_way        = r_dcache_miss_way.read();
+                    r_dcache_cc_send_type       = CC_TYPE_CLEANUP;
+                    r_dcache_cc_line_dirty      = false;   // in case of miss inval, the cleanup is not with data.
+                    r_dcache_cc_line_no_shared  = r_dcache_rsp_state.read(); // the miss read rsp contents the state of this line 
 
 #ifdef INSTRUMENTATION
 m_cpt_dcache_dir_write++;
 #endif
-                r_dcache.write_dir( r_dcache_save_paddr.read(),
-                                    r_dcache_miss_way.read(),
-                                    r_dcache_miss_set.read(),
-                                    CACHE_SLOT_STATE_ZOMBI );
+                    r_dcache.write_dir( r_dcache_save_paddr.read(),
+                                        r_dcache_miss_way.read(),
+                                        r_dcache_miss_set.read(),
+                                        CACHE_SLOT_STATE_ZOMBI );
 
 #if DEBUG_DCACHE
@@ -4792 +4794 @@
 #endif
 
-                if( not r_dcache_miss_updt.read())
-                {
                     r_dcache_fsm                = DCACHE_MISS_BACKOFF;
                     r_dcache_count_backoff      = r_dcache_count_backoff.read() + 1;
                     r_dcache_count_begin        = 0;                    
                 }
-                break;
-            }
-            else if( r_dcache_miss_updt.read())
-            {
-                r_dcache_miss_updt              = false;
-                r_cc_receive_dcache_req         = false;
-                r_dcache_cc_send_req            = true;
-                r_dcache_cc_send_multi_ack_miss = true;
-                r_dcache_cc_send_nline          = r_cc_receive_dcache_nline.read();
-                r_dcache_cc_send_updt_tab_idx   = r_cc_receive_dcache_updt_tab_idx.read();
-                r_dcache_cc_send_type           = CC_TYPE_MULTI_ACK;
-
-                r_dcache_fsm                    = DCACHE_MISS_BACKOFF;
-                r_dcache_count_backoff          = r_dcache_count_backoff.read() + 1;
-                r_dcache_count_begin            = 0;   
+                else
+                {
+                    break;
+                }
             }
             else                              // switch slot to VALID state
@@ -5293 +5282 @@
             if(r_dcache_read_for_modify.read() and(r_dcache_miss_type.read() == PROC_MISS) and (r_cc_receive_dcache_type.read() != CC_TYPE_UPDT) and (state == CACHE_SLOT_STATE_SHARED))
             {
-                r_dcache_fsm = DCACHE_CC_INVAL;
+                r_dcache_miss_clack = true;
+                r_dcache_fsm        = DCACHE_CC_INVAL;
             }
             else if(r_cc_receive_dcache_type.read() == CC_TYPE_UPDT)
             {
-                r_dcache_fsm                    = r_dcache_fsm_cc_save.read();
-                r_dcache_miss_updt              = true;
+                assert((state == CACHE_SLOT_STATE_INVALID) or (state == CACHE_SLOT_STATE_ZOMBI) && " CC_UPDT WITH A NO INVALID STATE");
+                
+                r_dcache_cc_send_multi_ack_miss = true;
                 r_dcache_miss_inval             = true;
+                r_dcache_fsm                    = DCACHE_CC_UPDT;
             }
             else
@@ -5389 +5381 @@
                 r_dcache_cc_send_multi_ack_miss = false;
             }
-            else if ( r_cc_receive_dcache_type.read() == CC_TYPE_INVAL or r_cc_receive_dcache_type.read() == CC_TYPE_BRDCAST) // hit inval
+            else if ( r_cc_receive_dcache_type.read() == CC_TYPE_INVAL ) // hit inval
             {
                 r_dcache_fsm           = DCACHE_CC_INVAL;
@@ -6327 +6319 @@
                 r_cc_receive_dcache_nline  = DspinDhccpParam::dspin_get(receive_data,
                                              DspinDhccpParam::BROADCAST_NLINE);
-                r_cc_receive_dcache_type = CC_TYPE_BRDCAST;
+                r_cc_receive_dcache_type = CC_TYPE_INVAL;
                 // request icache to handle the BROADCAST
                 r_cc_receive_icache_req = true;