Changeset 682 for branches/MESI/modules/vci_cc_vcache_wrapper

Timestamp:

Apr 23, 2014, 4:45:19 PM (10 years ago)

Author:

haoliu

Message:

MESI Bug fixed for llsc operation in vci_mem_cache component

File:

• branches/MESI/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp (modified) (3 diffs)

branches/MESI/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp

@@ -1297 +1297 @@
                     // we request a VCI transaction
                     r_icache_fsm      = ICACHE_MISS_SELECT;
-#if DEBUG_ICACHE
-if ( m_debug_activated or m_ireq.addr == 0x11020 )
-std::cout << "  <PROC " << name() << " ICACHE_IDLE> READ MISS in icache" 
-          << " : PADDR = " << std::hex << paddr << std::endl;
-#endif
-                   r_icache_miss_req = true;
+                    r_icache_miss_req = true;
                 }
                 else if (cache_state == CACHE_SLOT_STATE_ZOMBI )        // pending cleanup
@@ -2832 +2827 @@
                                     m_drsp.rdata   = cache_rdata;
 #if DEBUG_DCACHE
-if ( m_debug_activated or m_drsp.rdata == 0x11020)
+if ( m_debug_activated )
 std::cout << "  <PROC " << name() << " DCACHE_IDLE>"
           << " READ HIT in dcache" 
@@ -2978 +2973 @@
                     }
 #if DEBUG_DCACHE
-if ( m_debug_activated or m_dreq.wdata == 0x11020)
+if ( m_debug_activated )
 std::cout << "  <PROC " << name() << " DCACHE_IDLE>"
       << " WRITE REQ "