Changeset 706 for trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h

Timestamp:

May 30, 2014, 5:07:05 PM (10 years ago)

Author:

meunier

Message:

• Replaced vci_dspin_local_crossbar with a vci_local_crossbar in tsar_generic_xbar
• Added the scripts/ directory in tsar_generic_xbar

Location:

trunk/platforms/tsar_generic_xbar

Files:

• . (modified) (1 prop)
• tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h (modified) (8 diffs)

trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h

@@ -24 +24 @@
 #include "vci_xicu.h"
 #include "dspin_local_crossbar.h"
+#include "vci_local_crossbar.h"
 #include "vci_dspin_initiator_wrapper.h"
 #include "vci_dspin_target_wrapper.h"
@@ -36 +37 @@
 #include "vci_cc_vcache_wrapper.h"
 #include "vci_simhelper.h"
-#include "../../../../giet_vm/hard_config.h"
 
 namespace soclib { namespace caba {
@@ -63 +63 @@
     // interrupt signals
     sc_signal<bool>         signal_false;
-    sc_signal<bool>         signal_proc_it[8*IRQ_PER_PROCESSOR];
+    sc_signal<bool>         signal_proc_it[8 * 6]; // 6 = Number of IRQs in the MIPS
     sc_signal<bool>         signal_irq_mdma[8];
     sc_signal<bool>         signal_irq_mtty[23];
@@ -85 +85 @@
 
     // Direct VCI signals to VCI/DSPIN wrappers
+    VciSignals<vci_param_int>       signal_vci_g2l_d;
+    VciSignals<vci_param_int>       signal_vci_l2g_d;
+
     VciSignals<vci_param_int>       signal_vci_ini_proc[8];
     VciSignals<vci_param_int>       signal_vci_ini_mdma;
@@ -101 +104 @@
     VciSignals<vci_param_int>       signal_vci_tgt_simh;
 
-    // Direct DSPIN signals to local crossbars
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_proc_i[8];
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_proc_i[8];
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_mdma_i;
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_mdma_i;
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_bdev_i;
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_bdev_i;
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_chbuf_i;
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_chbuf_i;
-
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_memc_t;
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_memc_t;
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_xicu_t;
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_xicu_t;
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_mdma_t;
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_mdma_t;
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_mtty_t;
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_mtty_t;
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_bdev_t;
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_bdev_t;
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_brom_t;
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_brom_t;
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_fbuf_t;
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_fbuf_t;
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_mnic_t;
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_mnic_t;
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_chbuf_t;
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_chbuf_t;
-    DspinSignals<dspin_cmd_width>     signal_dspin_cmd_simh_t;
-    DspinSignals<dspin_rsp_width>     signal_dspin_rsp_simh_t;
 
     // Coherence DSPIN signals to local crossbar
@@ -150 +123 @@
                        GdbServer<Mips32ElIss> >*  proc[8];
 
-    VciDspinInitiatorWrapper<vci_param_int,
-                             dspin_cmd_width,
-                             dspin_rsp_width>*    wi_proc[8];
 
     VciMemCache<vci_param_int,
@@ -159 +129 @@
                 dspin_cmd_width>*                 memc;
 
+    VciXicu<vci_param_int>*                       xicu;
+
+    VciMultiDma<vci_param_int>*                   mdma;
+
+    VciSimpleRam<vci_param_ext>*                  xram;
+
+    VciSimpleRom<vci_param_int>*                  brom;
+
+    VciMultiTty<vci_param_int>*                   mtty;
+
+    VciSimhelper<vci_param_int>*                  simhelper;
+
+    VciFrameBuffer<vci_param_int>*                fbuf;
+
+    VciMultiNic<vci_param_int>*                  mnic;
+
+    VciChbufDma<vci_param_int>*                   chbuf;
+
+    VciBlockDeviceTsar<vci_param_int>*            bdev;
+
+    VciLocalCrossbar<vci_param_int>*              xbar_d;
+    VciDspinInitiatorWrapper<vci_param_int,
+                             dspin_cmd_width,
+                             dspin_rsp_width>*    wi_xbar_d;
     VciDspinTargetWrapper<vci_param_int,
                           dspin_cmd_width,
-                          dspin_rsp_width>*       wt_memc;
-
-    VciXicu<vci_param_int>*                       xicu;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wt_xicu;
-
-    VciMultiDma<vci_param_int>*                   mdma;
-
-    VciDspinInitiatorWrapper<vci_param_int,
-                             dspin_cmd_width,
-                             dspin_rsp_width>*    wi_mdma;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wt_mdma;
-
-    VciSimpleRam<vci_param_ext>*                  xram;
-
-    VciSimpleRom<vci_param_int>*                  brom;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wt_brom;
-
-    VciMultiTty<vci_param_int>*                   mtty;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wt_mtty;
-
-    VciSimhelper<vci_param_int>*                  simhelper;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wt_simhelper;
-
-
-    VciFrameBuffer<vci_param_int>*                fbuf;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wt_fbuf;
-
-    VciMultiNic<vci_param_int>*                   mnic;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wt_mnic;
-
-    VciChbufDma<vci_param_int>*                   chbuf;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wt_chbuf;
-
-    VciDspinInitiatorWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wi_chbuf;
-
-    VciBlockDeviceTsar<vci_param_int>*            bdev;
-
-    VciDspinInitiatorWrapper<vci_param_int,
-                             dspin_cmd_width,
-                             dspin_rsp_width>*    wi_bdev;
-
-    VciDspinTargetWrapper<vci_param_int,
-                          dspin_cmd_width,
-                          dspin_rsp_width>*       wt_bdev;
-
-    DspinLocalCrossbar<dspin_cmd_width>*          xbar_cmd_d;
-    DspinLocalCrossbar<dspin_rsp_width>*          xbar_rsp_d;
+                          dspin_rsp_width>*       wt_xbar_d;
+
     DspinLocalCrossbar<dspin_cmd_width>*          xbar_m2p_c;
     DspinLocalCrossbar<dspin_rsp_width>*          xbar_p2m_c;
@@ -269 +192 @@
                      size_t                             l1_d_ways,
                      size_t                             l1_d_sets,
+                     size_t                             irq_per_processor,
                      size_t                             xram_latency,  // external ram
                      bool                               io,            // I/O cluster