Ignore:
Timestamp:
Jun 23, 2014, 4:02:53 PM (10 years ago)
Author:
cfuguet
Message:

fault_tolerance/tsar_generic_iob:

  • introducing the vci_iopic component on the IOX interconnect.


  • the input hardware interrupts on cluster(0,0) from the external peripherals have been removed because they are connected to the vci_iopic component.


  • Replacing "ad-hoc" dspin_tsar router by standard dspin_router on the RAM interconnect. To do so, in IO clusters (clusters with IOB) two crossbars are implemented:

+ One for commands which interconnects MEMC and IOB to the

local interface of RAM CMD dspin_router.

+ One for responses which interconnects local interface of RAM

RSP dspin_router to MEMC and IOB.

  • Considering case of mono cluster platform: Only one IOB must be instantiated.
  • Modifying IOX memory segments used by IOX network for routing:


+ bugfix: all segments of IOX interconnect must have

global id = 0.

+ Adding XICU segments with special attribute. This

attribute is used by IOB to determine if a command coming
from external DMA peripheral should be routed
through INT or RAM networks.

+ Using bit 32 of physical address to determine if an

external DMA command should be routed through IOB0
or IOB1.


File:
1 edited

Legend:

Unmodified
Added
Removed

  • branches/fault_tolerance/platform/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp

    r696 r717  
    99// Modified on: mars 2014
    1010//////////////////////////////////////////////////////////////////////////////
    11 // Cluster(0,0) & Cluster(xmax-1,ymax-1) contains the IOB0 & IOB1 components.
    12 // These two clusters contain 6 extra components:
    13 // - 1 vci_io_bridge (connected to the 3 networks.
     11// IO clusters contains the IOB component.
     12// These clusters contain 6 extra components:
     13// - 1 vci_io_bridge (connected to the 3 networks).
    1414// - 3 vci_dspin_wrapper for the IOB.
    1515// - 2 dspin_local_crossbar for commands and responses.
    … …  
    3939   assert((params.x_id < X_MAX) && (params.y_id < Y_MAX));
    4040
    41    size_t cid           = this->clusterId(params.x_id, params.y_id);
    42    size_t cluster_iob0  = this->clusterId(0, 0);
    43    size_t cluster_iob1  = this->clusterId(X_SIZE - 1, Y_SIZE - 1);
    44    size_t is_iob0       = (cid == cluster_iob0);
    45    size_t is_iob1       = (cid == cluster_iob1);
    46    bool   is_io_cluster = is_iob0 || is_iob1;
    47 
     41   size_t cid     = this->clusterId(params.x_id, params.y_id);
    4842   size_t l_width = vci_param_int::S - X_WIDTH - Y_WIDTH;
    4943
    … …  
    6761      alloc_elems<DspinOutput<dspin_ram_rsp_width> >("p_ext_rsp_out", 4);
    6862
    69    // ports in cluster_iob0 and cluster_iob1 only
     63   // ports in IO clusters only
    7064   p_vci_iob_iox_ini   = NULL;
    7165   p_vci_iob_iox_tgt   = NULL;
    72    p_dspin_iob_cmd_out = NULL;
    73    p_dspin_iob_rsp_in  = NULL;
    74    if ( is_io_cluster ) {
     66   if ( params.is_io ) {
     67      std::cout << "   Creating signals for IOB" << std::endl;
     68
    7569      // VCI ports from IOB to IOX network
    7670      p_vci_iob_iox_ini = new soclib::caba::VciInitiator<vci_param_ext>;
    7771      p_vci_iob_iox_tgt = new soclib::caba::VciTarget<vci_param_ext>;
    78 
    79       // DSPIN ports from IOB to RAM network
    80       p_dspin_iob_cmd_out = new soclib::caba::DspinOutput<dspin_ram_cmd_width>;
    81       p_dspin_iob_rsp_in  = new soclib::caba::DspinInput<dspin_ram_rsp_width>;
    82    }
    83 
    84    // IRQ ports in cluster_iob0 only
    85    for ( size_t n = 0 ; n < 32 ; n++ ) {
    86       p_irq[n] = ( is_iob0 ) ? new sc_in<bool> : NULL;
    8772   }
    8873
    … …  
    11095            params.debug_start_cycle, params.proc_debug_ok);
    11196
    112       proc[p]->set_dcache_paddr_ext_reset(cid);
    113       proc[p]->set_icache_paddr_ext_reset(cid);
     97      // Physical address extention register is initialized with local cluster
     98      // ID when distributed boot is activated.
     99      if (params.distboot) {
     100         proc[p]->set_dcache_paddr_ext_reset(cid);
     101         proc[p]->set_icache_paddr_ext_reset(cid);
     102      }
    114103   }
    115104
    … …  
    149138
    150139   // Multi-TTY controller
    151    mtty        = NULL;
     140   mtty = NULL;
    152141   if (NB_DEBUG_TTY_CHANNELS) {
    153142      assert(NB_DEBUG_TTY_CHANNELS < 8);
    … …  
    175164         params.mt_int,
    176165         IntTab(cid, INT_XICU_TGT_ID),
    177          32, 32, 32,
    178          NB_PROCS);
     166         32, 1, 32,
     167         NB_PROCS * IRQ_PER_PROCESSOR);
    179168
    180169   ////////////  MDMA
    … …  
    195184      nb_direct_targets++;
    196185   }
    197    if ( is_io_cluster ) {
     186   if ( params.is_io ) {
    198187      nb_direct_initiators++;
    199188      nb_direct_targets++;
    … …  
    306295   std::ostringstream s_ram_router_cmd;
    307296   s_ram_router_cmd << "ram_router_cmd_" << params.x_id << "_" << params.y_id;
    308    ram_router_cmd = new DspinRouterTsar<dspin_ram_cmd_width>(
     297   ram_router_cmd = new DspinRouter<dspin_ram_cmd_width>(
    309298         s_ram_router_cmd.str().c_str(),
    310299         params.x_id, params.y_id,
    311300         X_WIDTH, Y_WIDTH,
    312          4, 4,
    313          is_iob0, is_iob1,
    314          false,
    315          l_width);
     301         4, 4);
    316302
    317303   std::ostringstream s_ram_router_rsp;
    318304   s_ram_router_rsp << "ram_router_rsp_" << params.x_id << "_" << params.y_id;
    319    ram_router_rsp = new DspinRouterTsar<dspin_ram_rsp_width>(
     305   ram_router_rsp = new DspinRouter<dspin_ram_rsp_width>(
    320306         s_ram_router_rsp.str().c_str(),
    321307         params.x_id, params.y_id,
    322308         X_WIDTH, Y_WIDTH,
    323          4, 4,
    324          is_iob0, is_iob1,
    325          true,
    326          l_width);
     309         4, 4);
    327310
    328311   ////////////////////// I/O  CLUSTER ONLY ///////////////////////
    329312   iob        = NULL;
    330313   iob_ram_wi = NULL;
    331    if ( is_io_cluster ) {
     314   if ( params.is_io ) {
    332315      ///////////  IO_BRIDGE
    333       size_t iox_local_id;
    334       bool   has_irqs;
    335       if ( is_iob0 ) {
    336          iox_local_id = 0;
    337          has_irqs     = true;
    338       }
    339       else {
    340          iox_local_id = 1;
    341          has_irqs     = false;
    342       }
    343 
    344316      std::ostringstream s_iob;
    345317      s_iob << "iob_" << params.x_id << "_" << params.y_id;   
    … …  
    351323            IntTab(cid, INT_IOBX_TGT_ID),
    352324            IntTab(cid, INT_IOBX_INI_ID),
    353             IntTab(cid, iox_local_id ),
    354             has_irqs,
     325            params.iox_iob_tgtid,
     326            params.iox_iob_srcid,
    355327            16,
    356328            8,
    … …  
    364336            s_iob_ram_wi.str().c_str(),
    365337            vci_param_int::S);
     338
     339      std::ostringstream s_ram_xbar_cmd;
     340      s_ram_xbar_cmd << "s_ram_xbar_cmd_" << params.x_id << "_" << params.y_id;
     341      ram_xbar_cmd = new DspinLocalCrossbar<dspin_ram_cmd_width>(
     342            s_ram_xbar_cmd.str().c_str(), // name
     343            params.mt_ext,                // mapping table
     344            params.x_id, params.y_id,     // x, y
     345            X_WIDTH, Y_WIDTH, l_width,    // x_width, y_width, l_width
     346            2, 0,                         // local inputs, local outputs
     347            2, 2,                         // in fifo, out fifo depths
     348            true,                         // is cmd ?
     349            false,                        // use routing table ?
     350            false);                       // support broadcast ?
     351
     352      std::ostringstream s_ram_xbar_rsp;
     353      s_ram_xbar_rsp << "s_ram_xbar_rsp_" << params.x_id << "_" << params.y_id;
     354      ram_xbar_rsp = new DspinLocalCrossbar<dspin_ram_rsp_width>(
     355            s_ram_xbar_rsp.str().c_str(), // name
     356            params.mt_ext,                // mapping table
     357            params.x_id, params.y_id,     // x, y
     358            X_WIDTH, Y_WIDTH, l_width,    // x_width, y_width, l_width
     359            0, 2,                         // local inputs, local outputs
     360            2, 2,                         // in fifo, out fifo depths
     361            false,                        // is cmd ?
     362            true,                         // use routing table ?
     363            false);                       // support broadcast ?
    366364   }
    367365
    … …  
    372370   // on coherence network : local srcid[proc] in [0...NB_PROCS-1]
    373371   //                      : local srcid[memc] = NB_PROCS
    374    // In cluster_iob0, 32 HWI interrupts from external peripherals
    375    // are connected to the XICU ports p_hwi[0:31]
    376    // In other clusters, no HWI interrupts are connected to XICU
    377372
    378373   //////////////////////// internal CMD & RSP routers
    … …  
    425420   }
    426421
    427    if ( is_io_cluster ) {
     422   if ( params.is_io ) {
    428423      int_xbar_d->p_to_target[INT_IOBX_TGT_ID]    (signal_int_vci_tgt_iobx);
    429424      int_xbar_d->p_to_initiator[INT_IOBX_INI_ID] (signal_int_vci_ini_iobx);
    … …  
    480475      proc[p]->p_dspin_p2m    (signal_int_dspin_p2m_proc[p]);
    481476      proc[p]->p_dspin_clack  (signal_int_dspin_clack_proc[p]);
    482       proc[p]->p_irq[0]       (signal_proc_it[p]);
    483       for ( size_t j = 1 ; j < 6 ; j++) {
    484          proc[p]->p_irq[j]    (signal_false);
     477      for ( size_t j = 0 ; j < 6 ; j++) {
     478         if ( j < IRQ_PER_PROCESSOR ) {
     479            proc[p]->p_irq[j] (signal_proc_it[IRQ_PER_PROCESSOR * p + j]);
     480         }
     481         else {
     482            proc[p]->p_irq[j] (signal_false);
     483         }
    485484      }
    486485   }
    … …  
    490489   xicu->p_resetn (this->p_resetn);
    491490   xicu->p_vci    (signal_int_vci_tgt_xicu);
    492    for ( size_t p = 0 ; p < NB_PROCS ; p++) {
    493       xicu->p_irq[p] (signal_proc_it[p]);
    494    }
    495    for ( size_t i=0 ; i<32 ; i++) {
    496       if ( is_iob0 )
    497          xicu->p_hwi[i] (*(this->p_irq[i]));
    498       else 
    499          xicu->p_hwi[i] (signal_false);
    500    }                     
     491   for ( size_t irq = 0 ; irq < (IRQ_PER_PROCESSOR * NB_PROCS) ; irq++) {
     492      xicu->p_irq[irq] (signal_proc_it[irq]);
     493   }
     494   xicu->p_hwi[0] (signal_irq_memc);
    501495
    502496   ///////////////////////////////////// MEMC
    … …  
    564558      ram_router_rsp->p_in[n]  (this->p_dspin_ram_rsp_in[n]);
    565559   }
    566    ram_router_cmd->p_out[4]    (signal_ram_dspin_cmd_xram_t);
    567    ram_router_cmd->p_in[4]     (signal_ram_dspin_cmd_memc_i);
    568    ram_router_rsp->p_out[4]    (signal_ram_dspin_rsp_memc_i);
    569    ram_router_rsp->p_in[4]     (signal_ram_dspin_rsp_xram_t);
    570 
    571    ///////////////////////// IOB exists only in cluster_iob0 & cluster_iob1.
    572    if ( is_io_cluster ) {
     560
     561   ram_router_cmd->p_out[4] (signal_ram_dspin_cmd_xram_t);
     562   if (params.is_io) ram_router_cmd->p_in[4] (signal_ram_dspin_cmd_xbar);
     563   else              ram_router_cmd->p_in[4] (signal_ram_dspin_cmd_memc_i);
     564
     565   ram_router_rsp->p_in[4] (signal_ram_dspin_rsp_xram_t);
     566   if (params.is_io) ram_router_rsp->p_out[4] (signal_ram_dspin_rsp_xbar);
     567   else              ram_router_rsp->p_out[4] (signal_ram_dspin_rsp_memc_i);
     568
     569   ///////////////////////// IOB exists only in IO clusters.
     570   if ( params.is_io ) {
    573571      // IO bridge
    574572      iob->p_clk         (this->p_clk);
    … …  
    580578      iob->p_vci_ini_ram (signal_ram_vci_ini_iobx);
    581579
    582       if ( is_iob0 ) {
    583          for ( size_t n = 0 ; n < 32 ; n++ ) {
    584             (*iob->p_irq[n]) (*(this->p_irq[n]));
    585          }
    586       }
    587 
    588580      // initiator wrapper to RAM network
    589       iob_ram_wi->p_clk       (this->p_clk);
    590       iob_ram_wi->p_resetn    (this->p_resetn);
    591       iob_ram_wi->p_dspin_cmd (*(this->p_dspin_iob_cmd_out));
    592       iob_ram_wi->p_dspin_rsp (*(this->p_dspin_iob_rsp_in));
    593       iob_ram_wi->p_vci       (signal_ram_vci_ini_iobx);
    594    }
     581      iob_ram_wi->p_clk            (this->p_clk);
     582      iob_ram_wi->p_resetn         (this->p_resetn);
     583      iob_ram_wi->p_dspin_cmd      (signal_ram_dspin_cmd_iob_i);
     584      iob_ram_wi->p_dspin_rsp      (signal_ram_dspin_rsp_iob_i);
     585      iob_ram_wi->p_vci            (signal_ram_vci_ini_iobx);
     586
     587      ram_xbar_cmd->p_clk          (this->p_clk);
     588      ram_xbar_cmd->p_resetn       (this->p_resetn);
     589      ram_xbar_cmd->p_global_out   (signal_ram_dspin_cmd_xbar);
     590      ram_xbar_cmd->p_global_in    (signal_ram_dspin_cmd_false);
     591      ram_xbar_cmd->p_local_in[0]  (signal_ram_dspin_cmd_memc_i);
     592      ram_xbar_cmd->p_local_in[1]  (signal_ram_dspin_cmd_iob_i);
     593
     594      ram_xbar_rsp->p_clk          (this->p_clk);
     595      ram_xbar_rsp->p_resetn       (this->p_resetn);
     596      ram_xbar_rsp->p_global_out   (signal_ram_dspin_rsp_false);
     597      ram_xbar_rsp->p_global_in    (signal_ram_dspin_rsp_xbar);
     598      ram_xbar_rsp->p_local_out[0] (signal_ram_dspin_rsp_memc_i);
     599      ram_xbar_rsp->p_local_out[1] (signal_ram_dspin_rsp_iob_i);
     600   }
     601
     602   SC_METHOD(init);
    595603} // end constructor
     604
     605tmpl(void)::init() {
     606   signal_ram_dspin_cmd_false.write = false;
     607   signal_ram_dspin_cmd_false.read = true;
     608   signal_ram_dspin_rsp_false.write = false;
     609   signal_ram_dspin_rsp_false.read = true;
     610}
    596611
    597612tmpl(/**/)::~TsarIobCluster() {
    598613   if (p_vci_iob_iox_ini)   delete p_vci_iob_iox_ini;
    599614   if (p_vci_iob_iox_tgt)   delete p_vci_iob_iox_tgt;
    600    if (p_dspin_iob_cmd_out) delete p_dspin_iob_cmd_out;
    601    if (p_dspin_iob_rsp_in)  delete p_dspin_iob_rsp_in;
    602615   if (iob)                 delete iob;
    603616   if (iob_ram_wi)          delete iob_ram_wi;
    604 
    605    for (size_t n = 0 ; n < 32 ; n++) {
    606       if (p_irq[n]) delete p_irq[n];
    607    }
    608617
    609618   for (size_t p = 0; p < NB_PROCS; p++) {
    … …  
    627636   delete ram_router_cmd;
    628637   delete ram_router_rsp;
     638   delete ram_xbar_cmd;
     639   delete ram_xbar_rsp;
    629640}
    630641
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