Changeset 758


Ignore:
Timestamp:
Jul 24, 2014, 3:19:18 PM (8 years ago)
Author:
cfuguet
Message:

tsar_boot: improving configuration infrastructure

  • Using hard_config.h which respects the same sintax that the hard_config.h file of all TSAR platforms. This file can be then generated by the GIET-VM genmap tool or written manually.
  • All peripheral drivers have been moved to a drivers directory and they are compiled as a static library. This allows GCC to only include in the final .ELF the object files of used peripherals and not all of them.
  • Example hard_config.h and ldscripts have been introduced in the conf directory.
  • Improving comments in all files
Location:
trunk/softs/tsar_boot
Files:
14 added
6 deleted
12 edited
1 copied
6 moved

Legend:

Unmodified
Added
Removed
  • trunk/softs/tsar_boot/Doxyfile

    r388 r758  
    210210# of all members will be omitted, etc.
    211211
    212 OPTIMIZE_OUTPUT_FOR_C  = NO
     212OPTIMIZE_OUTPUT_FOR_C  = YES
    213213
    214214# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java
     
    366366# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES
    367367
    368 EXTRACT_ALL            = NO
     368EXTRACT_ALL            = YES
    369369
    370370# If the EXTRACT_PRIVATE tag is set to YES all private members of a class
     
    803803# VERBATIM_HEADERS is set to NO.
    804804
    805 SOURCE_BROWSER         = NO
     805SOURCE_BROWSER         = YES
    806806
    807807# Setting the INLINE_SOURCES tag to YES will include the body
    808808# of functions and classes directly in the documentation.
    809809
    810 INLINE_SOURCES         = NO
     810INLINE_SOURCES         = YES
    811811
    812812# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct
     
    16771677# have no effect if this option is set to NO (the default)
    16781678
    1679 HAVE_DOT               = NO
     1679HAVE_DOT               = YES
    16801680
    16811681# The DOT_NUM_THREADS specifies the number of dot invocations doxygen is
     
    17741774# graphs for selected functions only using the \callergraph command.
    17751775
    1776 CALLER_GRAPH           = NO
     1776CALLER_GRAPH           = YES
    17771777
    17781778# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen
  • trunk/softs/tsar_boot/Makefile

    r726 r758  
    1 # let the user have a default configuration (ie for PLATFORM_DIR and SOCLIB)
     1# let the user have a default configuration (ie for PLATFORM_DIR)
    22-include ./build.mk
    33
     4USE_DT     ?= 1
     5DTS        ?= platform.dts
     6
    47MAKECMDGOALS ?= none
    5 RAMDISK      ?= 0
    6 SOCLIB       ?= 0
    78
    89ifneq ($(MAKECMDGOALS),$(filter $(MAKECMDGOALS),clean distclean clean-doc doc))
     
    1011    $(error please define PLATFORM_DIR 'make PLATFORM_DIR=foo')
    1112  else
    12     ifeq ($(SOCLIB),1)
    13       ifeq ($(RAMDISK),1)
    14         DEFS+= -DUSE_RDK
    15       else
    16         DEFS+= -DUSE_BDV
    17       endif
    18       DTS=platform_soclib.dts
    19       $(info Make for $(PLATFORM_DIR), SocLib variant)
    20     else
    21       DEFS+= -DUSE_SPI
    22       DTS=platform_fpga.dts
    23       $(info Make for $(PLATFORM_DIR), FPGA variant)
    24     endif
     13    $(info Make for $(PLATFORM_DIR))
    2514  endif
     15endif
     16
     17# Platform clock frequency (in KHz)
     18ifdef SYSTEM_CLK
     19    DEFS   := "-DRESET_SYSTEM_CLK=$(SYSTEM_CLK)"
    2620endif
    2721
     
    3024AS         := mipsel-unknown-elf-as
    3125DU         := mipsel-unknown-elf-objdump
     26AR         := mipsel-unknown-elf-ar
    3227RM         := rm -rf
    3328ECHO       := @echo
     
    3833
    3934BUILD_DIR  := build
    40 SRCS_DIR   := src
    41 INCS_DIR   := include
    4235
    4336# =============================================================================
     
    4538# =============================================================================
    4639
    47 INCLUDE    += -I. -I$(INCS_DIR) -I$(PLATFORM_DIR)
    48 
    49 # =============================================================================
    50 # Paths of sources in another directories
    51 # =============================================================================
    52 
    53 VPATH      += $(SRCS_DIR)
    54 VPATH      += $(PLATFORM_DIR)
     40INCLUDE    += -I. -Iinclude -Idrivers -I$(PLATFORM_DIR)
    5541
    5642# =============================================================================
     
    5844# =============================================================================
    5945
     46VPATH      += src
     47
    6048CFLAGS     := -Wall                \
    6149              -mno-gpopt           \
    6250              -ffreestanding       \
    6351              -fomit-frame-pointer \
    64               -mips32              \
    65               -ggdb                \
    66               -mlong-calls         \
     52              -march=mips32        \
    6753              -O2                  \
    6854              -Werror
    6955
    7056C_SRCS     := reset_elf_loader.c \
     57              reset_utils.c      \
     58              reset_exception.c  \
    7159              reset_ioc.c        \
    72               reset_utils.c      \
    73               reset_tty.c        \
    74               reset_exception.c
    75 
    76 ifeq ($(SOCLIB),0)
    77   C_SRCS   += sdcard.c spi.c
    78 endif
     60              version.c
    7961
    8062S_SRCS     := reset.S
    8163
    82 OBJS       := $(subst .c,.o, $(notdir $(C_SRCS)))
    83 OBJS       += $(subst .S,.o, $(notdir $(S_SRCS)))
    84 OBJS       := $(addprefix $(BUILD_DIR)/, $(OBJS))
     64OBJS       := $(addprefix $(BUILD_DIR)/,\
     65                  $(subst .c,.o, $(notdir $(C_SRCS))) \
     66                  $(subst .S,.o, $(notdir $(S_SRCS))))
    8567
    8668TARGET     := preloader.elf
    8769
    88 USE_DT     ?= 1
     70# =============================================================================
     71# Drivers library
     72# =============================================================================
     73
     74VPATH      += drivers
     75
     76DRV_SRCS   := reset_tty.c        \
     77              reset_inval.c      \
     78              reset_sdc.c        \
     79              reset_bdv.c        \
     80              reset_rdk.c        \
     81              sdcard.c           \
     82              spi.c
     83
     84DRV_OBJS   := $(addprefix $(BUILD_DIR)/,\
     85                  $(subst .c,.o, $(notdir $(DRV_SRCS))))
     86
     87DRV_LIB    := libdrivers.a
     88
     89# =============================================================================
     90# Makefile rules
     91# =============================================================================
     92
     93VPATH      += $(BUILD_DIR)
    8994
    9095all: $(TARGET)
    9196
    92 $(BUILD_DIR)/version.o: $(BUILD_DIR) $(OBJS) VERSION version.sh
    93         $(ECHO) "[version.sh]"
    94         ./version.sh > $(BUILD_DIR)/version.c
    95         $(ECHO) "[   CC    ]     $(BUILD_DIR)/version.c"
    96         $(CC) $(DEFS) $(CFLAGS) $(INCLUDE) -c -o $@ $(BUILD_DIR)/version.c
     97$(BUILD_DIR)/$(DRV_LIB): $(BUILD_DIR) $(DRV_OBJS)
     98        $(ECHO) "[   AR    ]     $(notdir $@)"
     99        $(AR) rcs $@ $(DRV_OBJS)
     100
     101$(BUILD_DIR)/version.o: $(BUILD_DIR)/version.c
     102        $(ECHO) "[   CC    ]     $(notdir $<)"
     103        $(CC) $(DEFS) $(CFLAGS) $(INCLUDE) -c -o $@ $<
    97104        $(DU) -D $@ > $@.txt
    98105
    99 $(TARGET): $(BUILD_DIR) $(BUILD_DIR)/version.o $(OBJS) $(PLATFORM_DIR)/ldscript $(BUILD_DIR)/platform.ld
     106$(BUILD_DIR)/version.c: $(BUILD_DIR) version.sh VERSION
     107        $(ECHO) "[version.sh]"
     108        ./version.sh > $@
     109
     110$(TARGET): $(BUILD_DIR) $(OBJS) $(PLATFORM_DIR)/ldscript $(BUILD_DIR)/platform.ld $(BUILD_DIR)/$(DRV_LIB)
    100111        $(ECHO) "[   LD    ]     $@"
    101         $(LD) -o $@ -T $(PLATFORM_DIR)/ldscript $(OBJS) $(BUILD_DIR)/version.o
     112        $(LD) -o $@ -T $(PLATFORM_DIR)/ldscript $(OBJS) -L$(BUILD_DIR) -ldrivers
    102113        $(DU) -D $@ > $@.txt
    103114
     
    112123endif
    113124
    114 $(BUILD_DIR)/platform.dtb: $(DTS)
     125$(BUILD_DIR)/platform.dtb: $(PLATFORM_DIR)/$(DTS)
    115126        $(ECHO) "[   DTC   ]     $(notdir $<)"
    116127        ${DTC} -O dtb -o $@ $< &> /dev/null
  • trunk/softs/tsar_boot/README

    r702 r758  
    1 TSAR BOOT LOADER
     1\author: Cesar Fuguet
     2\date  : July 24, 2014
     3
     4TSAR BOOT-LOADER
    25
    36Files:
    4 ===============================================================================
    57src/        Source files
    68            The entry point of this boot loader is the file reset.S
     
    810include/    Header files
    911
    10 conf/       Platform specific files and ldscript examples.
     12driver/     Drivers source files and headers
     13
     14conf/       Platform specific files and ldscript
    1115            For each platform, we must define a new directory.
     16            Mandatory files:
    1217
    13             - defs_platform.h:
     18              - hard_config.h (can be generated using giet-vm genmap tool)
    1419
    15               This file is mandatory. This file defines the NB_PROCS per
    16               cluster, the NB_CLUSTERS and the base address of the TTY, IOC,
    17               XICU and MEMC (config) devices. It defines also:
     20              - ldscript
    1821
    19                 #define USE_IOB
     22            Optional files:
    2023
    21                   This constant is used by the boot_ioc_read function to know
    22                   if the buffer used to store the blocks from the block_device
    23                   must be invalidated in the memory cache after the transfert
    24                   has finished.
     24              - platform.dts (platform device tree)
    2525
    26                 #define CACHE_COHERENCE
     26Makefile    Makefile to compile the boot loader.
     27            Mandatory arguments:
    2728
    28                   This constant is used by the boot_ioc_read function to know
    29                   if the buffer used to store the blocks from the block_device
    30                   must be invalidated in the dcache after the transfert has
    31                   finished.
     29              - PLATFORM_DIR=<platform_dir>
    3230
    33                 #define CACHE_LINE_SIZE
    34                  
    35                   This constant is mandatory if CACHE_COHERENCE=0 or USE_IOB=1
    36                   This constant defines the size in bytes of a cache line.
    37 
    38                 #define RESET_DEBUG
    39 
    40                   Set value to 1 to show some debug messages during loading
    41 
    42                 #define IRQ_PER_PROC
    43 
    44                   This constant is used to know how many XICU irq outputs are
    45                   connected to each processor.
    46 
    47             - platform_soclib.dts:
    48 
    49               Device tree file. It is mandatory if compiling for a SOCLIB
    50               platform and USE_DT=1.
    51 
    52             - platform_fpga.dts:
    53 
    54               Device tree file. It is mandatory if compiling for a FPGA
    55               platform and USE_DT=1.
    56 
    57             - ldscript:
    58 
    59               LD script defining the segments of this boot loader.
    60               We define two segments:
    61 
    62                 seg_stack_base:
    63 
    64                   Base address of the stack used by processor 0 during the boot
    65                   process. read-write data and bss will also be there.
    66 
    67                 seg_boot_base:
    68                
    69                   Base address of the code and read-only data defined for this
    70                   loader
    71            
    72 Makefile    Makefile to compile the boot loader. Arguments to pass:
    73 
    74               PLATFORM_DIR=<platform_dir>
    75    
    7631                Defines the directory where to find the plateform specific
    7732                files
    7833
    79               SOCLIB=1
     34           Optional arguments:
    8035
    81                 If using SOCLIB, define this flag to use the BLOCK DEVICE
    82                 driver and to choose the platform_soclib device tree.
     36              - USE_DT=<value>
    8337
    84               RAMDISK=1
    85 
    86                 If using SOCLIB, define this flag to use a RAMDISK instead of
    87                 BLOCK DEVICE (Set this flag when the SOCLIB flag is also set)
    88 
    89               USE_DT=0
    90 
     38                Value can be 1 or 0.
    9139                If a device tree file is not used, set this flag to 0. It is
    9240                set by default to 1.
    9341
    94               e.g. make PLATFORM_DIR=<platform_conf> \
    95                         SOCLIB=1 \
    96                         USE_DT=0 \
    97                         RAMDISK=0
     42              - SYSTEM_CLK=<platform clock frequency>
     43
     44                Platform clock frequency in KHz
     45
     46              - DTS=<file.dts>
     47
     48                Platform device tree (by default is platform.dts)
     49
     50Examples:
     51
     52    make PLATFORM_DIR=<platform_dir> USE_DT=0
     53
     54        Compile for <platform_dir> and do not compile device tree file
     55
     56    make PLATFORM_DIR=<platform_dir> DTS=platform_fpga.dts SYSTEM_CLK=25000
     57
     58        Compile for <platform_dir> and compile the 'platform_dpga.dts'
     59        device tree file. System clock frequency is 25 MHz
     60
     61    make PLATFORM_DIR=<platform_conf> SYSTEM_CLK=25000
     62
     63        Compile for <platform_dir> and compile the 'platform.dts'
     64        device tree file (default name). System clock frequency is 25 MHz
     65
  • trunk/softs/tsar_boot/VERSION

    r702 r758  
    1 1.1
     11.3
  • trunk/softs/tsar_boot/conf/platform_de2_115_fpga/ldscript

    r757 r758  
    11/**********************************************************
    2   File   : ldscript 
     2  File   : ldscript
    33  Author : Cesar Fuguet
    44  Date   : June 2011
    55**********************************************************/
    66
    7 /* Definition of the base address for code segment */
     7/* Definition of the base address for segments */
    88
    9 seg_reset_code_base     = 0xBFC00000;
    10 
    11 seg_reset_stack_base    = 0x08000000 - 0x4000;;
    12 seg_reset_stack_size    = 0x4000;
     9seg_code_base = 0xFF000000;
     10seg_data_base = 0x03F00000;
    1311
    1412/* Grouping sections into segments */
     
    1816SECTIONS
    1917{
    20     . = seg_reset_code_base;
    21     .text : 
     18    . = seg_code_base;
     19    .text :
    2220    {
    2321        *(.reset)
     
    2927    }
    3028
    31     . = seg_reset_stack_base;
    32     .bss ALIGN(0x4) (NOLOAD) : 
     29    . = seg_data_base;
     30    .bss ALIGN(0x4) (NOLOAD) :
    3331    {
    3432        *(.data)
  • trunk/softs/tsar_boot/conf/platform_tsar_generic_iob/ldscript

    r741 r758  
    11/**********************************************************
    2   File   : ldscript 
     2  File   : ldscript
    33  Author : Cesar Fuguet
    44  Date   : June 2011
    55**********************************************************/
    66
    7 /* Definition of the base address for code segment */
     7/* Definition of the base address for segments */
    88
    9 seg_reset_code_base     = 0xBFC00000;
    10 
    11 seg_reset_stack_base    = 0x000D0000;
    12 seg_reset_stack_size    = 0x00050000;
     9seg_code_base = 0xBFC00000;
     10seg_data_base = 0x000D0000;
    1311
    1412/* Grouping sections into segments */
     
    1816SECTIONS
    1917{
    20     . = seg_reset_code_base;
    21     .text : 
     18    . = seg_code_base;
     19    .text :
    2220    {
    2321        *(.reset)
     
    2927    }
    3028
    31     . = seg_reset_stack_base;
    32     .bss ALIGN(0x4) (NOLOAD) : 
     29    . = seg_data_base;
     30    .bss ALIGN(0x4) (NOLOAD) :
    3331    {
    3432        *(.data)
  • trunk/softs/tsar_boot/drivers/reset_tty.c

    r757 r758  
    22 * \file    reset_tty.c
    33 * \date    5 mars 2014
    4  * \author  Cesar Fuguet 
     4 * \author  Cesar Fuguet
    55 *
    6  * Minimal driver for TTY controler 
     6 * Minimal driver for TTY controler
    77 *******************************************************************/
    88
     
    1111#include <defs.h>
    1212
     13#ifndef SEG_TTY_BASE
     14#   error "SEG_TTY_BASE constant must be defined in the hard_config.h file"
     15#endif
     16
     17static int* const tty_address = (int* const)SEG_TTY_BASE;
     18
     19enum tty_registers {
     20    TTY_WRITE   = 0,
     21    TTY_STATUS  = 1,
     22    TTY_READ    = 2,
     23    TTY_CONFIG  = 3,
     24
     25    TTY_SPAN    = 4,
     26};
     27
    1328///////////////////////
    1429int reset_getc(char *c)
    1530{
    16     unsigned int* tty_address = (unsigned int*) TTY_PADDR_BASE;
    17 
    1831    if (ioread32( &tty_address[TTY_STATUS] ) == 0) return 0;
    1932    *c = ioread32( &tty_address[TTY_READ] );
     
    2437void reset_putc(const char c)
    2538{
    26     unsigned int* tty_address = (unsigned int*) TTY_PADDR_BASE;
    27 
    2839    iowrite32( &tty_address[TTY_WRITE], (unsigned int)c );
    2940    if (c == '\n') reset_putc( '\r' );
     
    3142
    3243///////////////////////////////////
    33 void reset_puts(const char *buffer) 
     44void reset_puts(const char *buffer)
    3445{
    3546    unsigned int n;
     
    4051        reset_putc(buffer[n]);
    4152    }
    42 } 
     53}
    4354
    4455/////////////////////////////////
     
    5465
    5566    for ( c = 0 ; c < 8 ; c++ )
    56     { 
     67    {
    5768        buf[9-c] = HexaTab[val&0xF];
    5869        val = val >> 4;
  • trunk/softs/tsar_boot/drivers/reset_tty.h

    r757 r758  
    11#ifndef RESET_TTY_H
    22#define RESET_TTY_H
    3 
    4 # include <tty.h>
    53
    64void reset_exit();
  • trunk/softs/tsar_boot/include/defs.h

    r755 r758  
    1 #include <defs_platform.h>
     1#include <hard_config.h>
    22
    3 #define RESET_VERSION       0x00010002
    4 #define RESET_STACK_SIZE    0x2000
     3#define RESET_VERSION         0x00010003
     4#define RESET_STACK_SIZE      0x2000
     5#define RESET_LOADER_LBA      2
     6#define RESET_PHDR_ARRAY_SIZE 16
    57
    6 #define BOOT_LOADER_LBA     2
    7 #define PHDR_ARRAY_SIZE     16
    8 
    9 #define BLOCK_SIZE          512
    10 
    11 #ifndef CLUSTER_IO
    12 #  define CLUSTER_IO        0
     8#ifndef RESET_DEBUG
     9#   define RESET_DEBUG        0
    1310#endif
    1411
    15 // vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab
     12#ifndef RESET_HARD_CC
     13#   define RESET_HARD_CC      0
     14#endif
    1615
     16/**
     17 * Default clock frequency (by default is 25 MHz for FPGA dev card DE2-115)
     18 */
     19#ifndef RESET_SYSTEM_CLK
     20#   define RESET_SYSTEM_CLK   25000 /* KHz   */
     21#endif
     22
     23/*
     24 * TSAR platform independent hardware parameters
     25 */
     26
     27#define BLOCK_SIZE            512   /* bytes */
     28#define CACHE_LINE_SIZE       64    /* bytes */
     29
     30/*
     31 * Verify that all used constants have been defined in the hard_config.h file
     32 */
     33
     34#ifndef NB_PROCS_MAX
     35#   error "NB_PROCS_MAX constant must be defined in hard_config.h"
     36#endif
     37
     38#ifndef IRQ_PER_PROCESSOR
     39#   error "IRQ_PER_PROCESSOR constant must be defined in hard_config.h file"
     40#endif
     41
     42#ifndef SEG_XCU_BASE
     43#   error "SEG_XCU_BASE constant must be defined in the hard_config.h file"
     44#endif
     45
     46#ifndef SEG_ROM_BASE
     47#   error "SEG_ROM_BASE constant must be defined in the hard_config.h file"
     48#endif
     49
     50/*
     51 * IO cluster constants
     52 */
     53
     54#ifndef USE_IOB
     55#   error "USE_IOB constant must be defined in the hard_config.h file"
     56#endif
     57
     58#if !defined(X_IO) || !defined(Y_IO)
     59#   error "X_IO and Y_IO constants must be defined in the hard_config.h file"
     60#endif
     61
     62#if !defined(X_WIDTH) || !defined(Y_WIDTH)
     63#   error "X_WIDTH and Y_WIDTH constants must be defined in the hard_config.h "
     64          "file"
     65#endif
     66
     67#define CLUSTER_IO  ((X_IO << Y_WIDTH) | Y_IO)
     68
     69/*
     70 * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab
     71 */
  • trunk/softs/tsar_boot/include/reset_ioc.h

    r653 r758  
     1/**
     2 * \file   reset_ioc.h
     3 * \date   December 14, 2013
     4 * \author Cesar Fuguet
     5 *
     6 * \brief  API for accessing the disk controller
     7 *
     8 * \note   These functions call the specific disk controller driver depending
     9 *         on the USE_IOC_BDV, USE_IOC_SPI or USE_RAMDISK constants
     10 */
    111#ifndef RESET_IOC_H
    212#define RESET_IOC_H
    313
    4 #if USE_SPI
    5 #include <sdcard.h>
    6 #include <spi.h>
    7 #endif /* USE_SPI */
     14int reset_ioc_init();
    815
    9 #if USE_BDV
    10 #include <block_device.h>
    11 #include <mcc.h>
    12 #endif /* USE_BDV */
    13 
    14 #include <defs.h>
    15 #include <reset_tty.h>
    16 #include <io.h>
    17 #include <reset_utils.h>
    18 
    19 #if USE_SPI
    20 extern int reset_ioc_init();
    21 #endif /* USE_SPI */
    22 
    23 extern int reset_ioc_read( unsigned int lba,
    24                            void*        buffer,
    25                            unsigned int count );
     16int reset_ioc_read( unsigned int lba, void* buffer, unsigned int count );
    2617
    2718#endif /* RESET_IOC_H */
    2819
    2920/*
    30  * vim: tabstop=4 : shiftwidth=4 : expandtab
     21 * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab
    3122 */
  • trunk/softs/tsar_boot/include/reset_utils.h

    r701 r758  
    55 */
    66
    7 #ifndef BOOT_UTILS_H
    8 #define BOOT_UTILS_H
     7#ifndef RESET_UTILS_H
     8#define RESET_UTILS_H
    99
    1010#include <elf-types.h>
    11 #include <reset_tty.h>
    12 #include <reset_ioc.h>
     11#include <inttypes.h>
    1312#include <defs.h>
    14 #include <mcc.h>
    15 #include <io.h>
    16 
    17 /********************************************************************
    18  * Integer types definition
    19  ********************************************************************/
    20 typedef unsigned int size_t;
    21 typedef unsigned int addr_t;
    2213
    2314/********************************************************************
     
    2617
    2718/*
    28  * cache line aligned disk block (sector) buffer 
     19 * cache line aligned disk block (sector) buffer
    2920 */
    3021struct aligned_blk
     
    3728 ********************************************************************/
    3829
    39 extern unsigned int proctime();
     30/**
     31 * \brief processor waits for n cycles
     32 */
     33static inline void reset_sleep(int cycles)
     34{
     35    volatile int i;
     36    for (i = 0; i < cycles; i++);
     37}
    4038
    41 extern int pread(size_t file_offset, void *buf, size_t nbyte, size_t offset);
     39/**
     40 * \brief returns processor count
     41 */
     42static inline unsigned int proctime()
     43{
     44    register unsigned int ret asm ("v0");
     45    asm volatile ("mfc0   %0,        $9":"=r" (ret));
     46    return ret;
     47}
    4248
    43 extern void* memcpy(void *_dst, const void *_src, size_t n);
    44 extern void* memset(void *_dst, int c, size_t len);
     49int pread(size_t file_offset, void *buf, size_t nbyte, size_t offset);
    4550
    46 extern void check_elf_header(Elf32_Ehdr *ehdr);
    47 extern void reset_print_elf_phdr(Elf32_Phdr * elf_phdr_ptr);
     51void* memcpy(void *_dst, const void *_src, size_t n);
     52void* memset(void *_dst, int c, size_t len);
    4853
    49 #if USE_IOB
    50 void reset_mcc_invalidate (const void * buf, size_t size);
    51 #endif /* USE_IOB */
     54void check_elf_header(Elf32_Ehdr *ehdr);
     55void reset_print_elf_phdr(Elf32_Phdr * elf_phdr_ptr);
    5256
    53 #if (CACHE_COHERENCE == 0) || USE_IOB
    54 void reset_buf_invalidate (const void * buf, size_t line_size, size_t size);
    55 #endif /* (CACHE_COHERENCE == 0) || USE_IOB */
    56 #endif /* BOOT_UTILS_H */
     57#endif /* RESET_UTILS_H */
    5758
    5859// vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab
  • trunk/softs/tsar_boot/src/reset.S

    r755 r758  
    2424 * - Each processor initialises its private XICU WTI mask register.
    2525 * - Only processor 0 executes the reset_load_elf function to load into memory
    26  *   the system specific boot-loader stored on disk at BOOT_LOADER_LBA
     26 *   the system specific boot-loader stored on disk at RESET_LOADER_LBA
    2727 * - All other processors wait in a low power consumption mode that the
    2828 *   processor 0 wakes them using an IPI (Inter Processor Interruption)
     
    8686    move    t3,     t0
    8787
    88     la      k0,     NB_PROCS         /* k0 <= # of processors per cluster   */
     88    la      k0,     NB_PROCS_MAX     /* k0 <= # of processors per cluster   */
    8989    divu    t3,     k0
    9090    mfhi    t1                       /* t1 <= lpid       = pid % NB_PROCS   */
     
    101101     */
    102102
    103     la      t3,     ICU_PADDR_BASE   /* t3 <= ICU base address              */
    104     move    t4,     t1               /* t4 <= local_id                      */
    105     li      t5,     IRQ_PER_PROC     /* t5 <= IRQ_PER_PROC                  */
     103    la      t3,     SEG_XCU_BASE      /* t3 <= ICU base address             */
     104    move    t4,     t1                /* t4 <= local_id                     */
     105    li      t5,     IRQ_PER_PROCESSOR /* t5 <= IRQ_PER_PROCESSOR            */
    106106    multu   t4,     t5
    107107    mflo    t6                       /* t6 <= IRQ_PER_PROC * local_id       */
     
    142142
    143143    la      a0,     versionstr
    144     la      k0,     reset_puts
    145     jalr    k0
    146     nop
    147 
    148 
    149 #if USE_SPI
    150 
    151     /* Processor 0 Initialize the SPI controller */
    152 
    153     la      k0,     reset_ioc_init
    154     jalr    k0
    155     nop
    156 
    157 #endif
     144    jal     reset_puts
     145    nop
     146
     147    /* Processor 0 initializes the block device */
     148
     149    jal     reset_ioc_init
     150    nop
    158151
    159152    /*
     
    162155     */
    163156
    164     la      k0,     reset_elf_loader
    165     li      a0,     BOOT_LOADER_LBA
    166     jalr    k0
     157    li      a0,     RESET_LOADER_LBA
     158    jal     reset_elf_loader
    167159    nop
    168160
  • trunk/softs/tsar_boot/src/reset_elf_loader.c

    r701 r758  
    3838     * Load ELF PROGRAM HEADER TABLE
    3939     */
    40     Elf32_Phdr elf_pht[PHDR_ARRAY_SIZE];
     40    Elf32_Phdr elf_pht[RESET_PHDR_ARRAY_SIZE];
    4141    size_t phdr_nbyte = sizeof(Elf32_Phdr) * elf_header.e_phnum;
    4242    size_t phdr_off = elf_header.e_phoff;
  • trunk/softs/tsar_boot/src/reset_ioc.c

    r654 r758  
     1/**
     2 * \file   reset_ioc.c
     3 * \date   December 2013
     4 * \author Cesar Fuguet
     5 *
     6 * \brief  API for accessing the disk controller
     7 *
     8 * \note   These functions call the specific disk controller driver depending
     9 *         on the USE_IOC_BDV, USE_IOC_SPI or USE_RAMDISK constants
     10 */
     11
    112#include <reset_ioc.h>
     13#include <defs.h>
    214
    3 #if USE_SPI
    4 static struct sdcard_dev     _sdcard_device;
    5 static struct spi_dev *const _spi_device = (struct spi_dev*) IOC_PADDR_BASE;
     15#if !defined(USE_IOC_BDV) && !defined(USE_IOC_SPI) && !defined(USE_RAMDISK)
     16#   error "One of the USE_IOC_* constants must be defined in the hard_config.h"
    617#endif
    718
    8 #define SDCARD_RESET_ITER_MAX   4
     19#if (USE_IOC_BDV + USE_IOC_SPI + USE_RAMDISK) != 1
     20#   error "Only one disk controller must be used"
     21#endif
    922
    10 ///////////////////////////////////
    11 inline void reset_sleep(int cycles)
     23#if USE_IOC_SPI
     24#include <reset_sdc.h>
     25#endif
     26
     27#if USE_IOC_BDV
     28#include <reset_bdv.h>
     29#endif
     30
     31#if USE_RAMDISK
     32#include <reset_rdk.h>
     33#endif
     34
     35/**
     36 * \brief Initialize the disk controller
     37 */
     38int reset_ioc_init()
    1239{
    13     int i;
    14     for (i = 0; i < cycles; i++);
     40#if USE_IOC_BDV
     41    return reset_bdv_init();
     42#elif USE_IOC_SPI
     43    return reset_sdc_init();
     44#elif USE_RAMDISK
     45    return reset_rdk_init();
     46#else
     47#   error "reset_ioc_init() : Not supported disk controller chosen"
     48#endif
    1549}
    1650
    17 #if USE_SPI
    18 ///////////////////////////////////////////////////////////////////////////////
    19 //     reset_ioc_init
    20 // This function initializes the SDCARD / required for FPGA.
    21 ///////////////////////////////////////////////////////////////////////////////
    22 int reset_ioc_init()
     51/**
     52 * \param lba   : first block index on the disk
     53 * \param buffer: base address of the memory buffer
     54 * \param count : number of blocks to be transfered
     55 *
     56 * \brief Transfer data from disk to a memory buffer
     57 *
     58 * \note  This is a blocking function. The function returns once the transfer
     59 *        is completed.
     60 */
     61int reset_ioc_read( unsigned int lba, void* buffer, unsigned int count )
    2362{
    24     unsigned char sdcard_rsp;
    25 
    26     reset_puts("Initializing block device\n\r");
    27 
    28     /**
    29      * Initializing the SPI controller
    30      */
    31     spi_dev_config (
    32       _spi_device   ,
    33       200000        , /**< SPI_clk: 200 Khz */
    34       SYSCLK_FREQ   , /**< Sys_clk          */
    35       8             , /**< Charlen: 8       */
    36       SPI_TX_NEGEDGE,
    37       SPI_RX_POSEDGE
    38     );
    39 
    40     /**
    41      * Initializing the SD Card
    42      */
    43     unsigned int iter = 0;
    44     while(1)
    45     {
    46         reset_puts("Trying to initialize SD card... ");
    47 
    48         sdcard_rsp = sdcard_dev_open(&_sdcard_device, _spi_device, 0);
    49         if (sdcard_rsp == 0)
    50         {
    51             reset_puts("OK\n");
    52             break;
    53         }
    54 
    55         reset_puts("KO\n");
    56         reset_sleep(1000);
    57         if (++iter >= SDCARD_RESET_ITER_MAX)
    58         {
    59             reset_puts("\nERROR: During SD card reset to IDLE state\n"
    60                       "/ card response = ");
    61             reset_putx(sdcard_rsp);
    62             reset_puts("\n");
    63             reset_exit();
    64         }
    65     }
    66 
    67     /**
    68      * Set the block length of the SD Card
    69      */
    70     sdcard_rsp = sdcard_dev_set_blocklen(&_sdcard_device, 512);
    71     if (sdcard_rsp)
    72     {
    73         reset_puts("ERROR: During SD card blocklen initialization\n");
    74         reset_exit();
    75     }
    76 
    77     /**
    78      * Incrementing SDCARD clock frequency for normal function
    79      */
    80     spi_dev_config (
    81         _spi_device ,
    82         10000000    , /**< SPI_clk 10 Mhz */
    83         SYSCLK_FREQ , /**< Sys_clk        */
    84         -1          , /**< Charlen: 8     */
    85         -1          ,
    86         -1
    87     );
    88 
    89     reset_puts("Finish block device initialization\n\r");
    90 
    91     return 0;
    92 } // end reset_ioc_init()
    93 #endif
    94 
    95 //////////////////////////////////////////////////////////////////////////////
    96 // reset_bdv_read()
    97 /////////////////////////////////////////////////////////////////////////////
    98 #if USE_BDV
    99 int reset_bdv_read( unsigned int lba,
    100                     void*        buffer,
    101                     unsigned int count )
    102 {
    103     unsigned int * ioc_address = (unsigned int*)IOC_PADDR_BASE;
    104 
    105     // block_device configuration
    106     iowrite32( &ioc_address[BLOCK_DEVICE_BUFFER], (unsigned int) buffer );
    107     iowrite32( &ioc_address[BLOCK_DEVICE_COUNT], count );
    108     iowrite32( &ioc_address[BLOCK_DEVICE_LBA], lba );
    109     iowrite32( &ioc_address[BLOCK_DEVICE_IRQ_ENABLE], 0 );
    110 
    111     // block_device trigger transfer
    112     iowrite32( &ioc_address[BLOCK_DEVICE_OP], ( unsigned int )
    113                BLOCK_DEVICE_READ );
    114 
    115     unsigned int status = 0;
    116     while ( 1 )
    117     {
    118         status = ioread32(&ioc_address[BLOCK_DEVICE_STATUS]);
    119         if ( status == BLOCK_DEVICE_READ_SUCCESS )
    120         {
    121             break;
    122         }
    123         if ( status == BLOCK_DEVICE_READ_ERROR   ) {
    124             reset_puts("ERROR during read on the BLK device\n");
    125             return 1;
    126         }
    127     }
    128 #if (CACHE_COHERENCE == 0) || USE_IOB
    129     reset_buf_invalidate(buffer, CACHE_LINE_SIZE, count * 512);
    130 #endif
    131     return 0;
    132 }
    133 #endif
    134 
    135 //////////////////////////////////////////////////////////////////////////////
    136 // reset_spi_read()
    137 /////////////////////////////////////////////////////////////////////////////
    138 #if USE_SPI
    139 static int reset_spi_read( unsigned int lba,
    140                            void*        buffer,
    141                            unsigned int count )
    142 {
    143     unsigned int sdcard_rsp;
    144     unsigned int i;
    145 
    146     sdcard_dev_lseek(&_sdcard_device, lba);
    147     for(i = 0; i < count; i++)
    148     {
    149         unsigned char* buf = (unsigned char *) buffer + (512 * i);
    150         if (( sdcard_rsp = sdcard_dev_read ( &_sdcard_device, buf, 512 ) ))
    151         {
    152             reset_puts("ERROR during read on the SDCARD device. Code: ");
    153             reset_putx(sdcard_rsp);
    154             reset_puts("\n");
    155             return 1;
    156         }
    157     }
    158     return 0;
    159 }
    160 #endif
    161 
    162 //////////////////////////////////////////////////////////////////////////////
    163 // reset_rdk_read()
    164 /////////////////////////////////////////////////////////////////////////////
    165 #if USE_RDK
    166 static int reset_rdk_read( unsigned int lba,
    167                            void*        buffer,
    168                            unsigned int count )
    169 {
    170     unsigned int* rdk_address = (unsigned int*) RDK_PADDR_BASE;
    171     char* src = (char*) rdk_address + (lba * 512);
    172 
    173     memcpy(buffer, (void*) src, count * 512);
    174     return 0;
    175 }
    176 #endif
    177 
    178 ///////////////////////////////////////////////////////////////////////////////
    179 //      reset_ioc_read()
    180 // Transfer data from disk to a memory buffer
    181 // - param lba    : first block index on the disk
    182 // - param buffer : base address of the memory buffer
    183 // - param count  : number of blocks to be transfered
    184 // This is a blocking function. The function returns once the transfer is
    185 // completed.
    186 //
    187 // The USE_BDV, USE_SPI and USE_RDK variables signal if the disk is accessed
    188 // through a BLOCK DEVICE, SPI or RAMDISK respectively
    189 ///////////////////////////////////////////////////////////////////////////////
    190 int reset_ioc_read( unsigned int lba,
    191                     void*        buffer,
    192                     unsigned int count )
    193 {
    194 #if USE_BDV
     63#if USE_IOC_BDV
    19564    return reset_bdv_read(lba, buffer, count);
    196 #elif USE_SPI
    197     return reset_spi_read(lba, buffer, count);
    198 #elif USE_RDK
     65#elif USE_IOC_SPI
     66    return reset_sdc_read(lba, buffer, count);
     67#elif USE_RAMDISK
    19968    return reset_rdk_read(lba, buffer, count);
    20069#else
    201 #   error "reset_ioc_read() : No supported disk controller chosen"
     70#   error "reset_ioc_read() : Not supported disk controller chosen"
    20271#endif
    20372}
    20473
    20574/*
    206  * vim: tabstop=4 : shiftwidth=4 : expandtab
     75 * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab
    20776 */
  • trunk/softs/tsar_boot/src/reset_utils.c

    r703 r758  
    88
    99#include <reset_utils.h>
    10 
    11 /*
    12  * pread(size_t file_offset, void* buf, size_t nbyte, size_t offset)
    13  *
    14  * read from disk into buffer "nbyte" bytes from (file_offset + offset)
    15  *
     10#include <reset_tty.h>
     11#include <reset_ioc.h>
     12#include <io.h>
     13
     14/**
    1615 * \param file_offset: Disk relative offset of file
    1716 * \param buf: Destination buffer
    1817 * \param nbyte: Number of bytes to read
    1918 * \param offset: File relative offset
     19 *
     20 * \brief read from disk into buffer "nbyte" bytes from (file_offset + offset)
    2021 *
    2122 * \note Absolute disk offset (in bytes) is (file_offset + offset)
     
    5758        if (offset_blk != blk_buf_idx) {
    5859            if (reset_ioc_read(offset_blk, (void*)&blk_buf, 1)) {
    59                 return -1; 
     60                return -1;
    6061            }
    6162        }
    6263        blk_buf_idx = offset_blk;
    63         read_nbyte = (nbyte > unaligned_nbyte) ? unaligned_nbyte : nbyte; 
     64        read_nbyte = (nbyte > unaligned_nbyte) ? unaligned_nbyte : nbyte;
    6465        memcpy((void*)dst, (void*)&blk_buf.b[offset], read_nbyte);
    6566        nbyte -= read_nbyte;
     
    7071     * Read aligned bytes directly to buffer
    7172     */
    72     size_t nblk = nbyte / BLOCK_SIZE; 
     73    size_t nblk = nbyte / BLOCK_SIZE;
    7374    if (nblk) {
    7475        if (reset_ioc_read(offset_blk, (void*)&dst[read_nbyte], nblk)) {
     
    9192        read_nbyte += nbyte;
    9293    }
    93     return read_nbyte;
    94 }
    95 
    96 /********************************************************************
    97  * proctime()
    98  *
    99  * Returns processor local time.
    100  ********************************************************************/
    101 inline unsigned int proctime()
    102 {
    103     unsigned int ret;
    104     asm volatile ("mfc0   %0,        $9":"=r" (ret));
    105     return ret;
    106 }
    107 
    108 /********************************************************************
    109  * memcpy( _dst, _src, size )
    110  *
    111  * Transfer data between two memory buffers.
    112  *
    113  * \param _dst   : Destination buffer base address
     94    return read_nbyte;
     95}
     96
     97/**
     98 * \param _dst   : Destination buffer base address
    11499 * \param _src   : Source buffer base address
    115  * \param size   : Number of bytes to transfer
    116  *
    117  ********************************************************************/
     100 * \param size   : Number of bytes to transfer
     101 *
     102 * \brief Transfer data between two memory buffers.
     103 */
    118104void* memcpy(void *_dst, const void *_src, size_t n)
    119105{
     
    135121}
    136122
    137 /********************************************************************
    138  * memset( _dst, value, size )
    139  *
    140  * Initialize memory buffers with predefined value.
    141  *
    142  * \param _dst   : Destination buffer base address
    143  * \param value  : Initialization value
     123/**
     124 * \param _dst   : Destination buffer base address
     125 * \param value  : Initialization value
    144126 * \param size   : Number of bytes to initialize
    145127 *
    146  ********************************************************************/
     128 * \brief Initialize memory buffers with predefined value.
     129 */
    147130void* memset(void *_dst, int c, size_t len)
    148131{
     
    179162}
    180163
    181 /********************************************************************
    182  * check_elf_header(Elf32_Ehdr*)
    183  *
    184  * Verify that ELF file is valid and that the number of program
    185  * headers does not exceed the defined maximum
    186  *
     164/**
    187165 * \param ehdr : ELF header pointer
    188166 *
    189  ********************************************************************/
     167 * \brief Verify that ELF file is valid and that the number of program headers
     168 *        does not exceed the defined maximum
     169 */
    190170void check_elf_header(Elf32_Ehdr *ehdr)
    191171{
     
    205185     * Verification of Program Headers table size. It must be
    206186     * smaller than the work size allocated for the
    207      * elf_pht[PHDR_ARRAY_SIZE] array
    208      */
    209     if (ehdr->e_phnum > PHDR_ARRAY_SIZE)
     187     * elf_pht[RESET_PHDR_ARRAY_SIZE] array
     188     */
     189    if (ehdr->e_phnum > RESET_PHDR_ARRAY_SIZE)
    210190    {
    211191        reset_puts("[RESET ERROR] ELF PHDR table size too large\n");
     
    214194}
    215195
    216 /********************************************************************
    217  * reset_print_elf_phdr( elf_phdr_ptr )
    218  *
    219  * Print some fields of a ELF program header
    220  *
     196/**
    221197 * \param elf_phdr_ptr : Pointer to the ELF program header to print
    222198 *
    223  ********************************************************************/
     199 * \brief Print some fields of a ELF program header
     200 */
    224201void reset_print_elf_phdr(Elf32_Phdr * elf_phdr_ptr)
    225202{
     
    243220}
    244221
    245 
    246 /********************************************************************
    247  * reset_mcc_inval()
    248  *
    249  * Invalidate all data cache lines corresponding to a memory buffer
    250  * (identified by an address and a size) in L2 cache.
    251  ********************************************************************/
    252 #if USE_IOB
    253 void reset_mcc_invalidate (const void * buffer, size_t size)
    254 {
    255     addr_t *mcc_address = (addr_t*)MCC_PADDR_BASE;
    256 
    257     // get the hard lock assuring exclusive access to MEMC
    258     while (ioread32(&mcc_address[MCC_LOCK]));
    259 
    260     // write invalidate paremeters on the memory cache this preloader
    261     // use only the cluster 0 and then the HI bits are not used
    262    
    263     iowrite32(&mcc_address[MCC_ADDR_LO], (unsigned int) buffer);
    264     iowrite32(&mcc_address[MCC_ADDR_HI], (unsigned int) 0);
    265     iowrite32(&mcc_address[MCC_LENGTH] , (unsigned int) size);
    266     iowrite32(&mcc_address[MCC_CMD]    , (unsigned int) MCC_CMD_INVAL);
    267 
    268     // release the lock protecting MEMC
    269     iowrite32(&mcc_address[MCC_LOCK], (unsigned int) 0);
    270 }
    271 #endif
    272 
    273 /********************************************************************
    274  * reset_dcache_buf_invalidate()
    275  *
    276  * Invalidate all data cache lines corresponding to a memory buffer
    277  * (identified by an address and a size) in L1 cache and L2 cache.
    278  ********************************************************************/
    279 #if (CACHE_COHERENCE == 0) || USE_IOB
    280 void reset_buf_invalidate (const void * buffer, size_t line_size, size_t size)
    281 {
    282     unsigned int i;
    283 
    284     // iterate on cache lines
    285     for (i = 0; i <= size; i += line_size)
    286     {
    287         asm volatile(
    288             " cache %0, %1"
    289             :// no outputs
    290             :"i" (0x11), "R" (*((unsigned char *) buffer + i))
    291             );
    292     }
    293 
    294 #if USE_IOB
    295     reset_mcc_invalidate(buffer, size);
    296 #endif
    297 }
    298 #endif
    299 
    300 // vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab
     222/*
     223 * vim: tabstop=4 : softtabstop=4 : shiftwidth=4 : expandtab
     224 */
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