Index: branches/MESI/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h
===================================================================
--- branches/MESI/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h	(revision 719)
+++ branches/MESI/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h	(revision 785)
@@ -38,4 +38,5 @@
 #include <list>
 #include <cassert>
+
 #include "arithmetics.h"
 #include "alloc_elems.h"
@@ -51,5 +52,5 @@
 #include "update_tab.h"
 #include "dspin_interface.h"
-#include "dspin_dhccp_param.h"
+#include "dspin_hmesi_param.h"
 
 #define TRT_ENTRIES      4      // Number of entries in TRT
@@ -69,10 +70,10 @@
     : public soclib::caba::BaseModule
     {
-      typedef typename vci_param_int::fast_addr_t  addr_t;
-      typedef typename sc_dt::sc_uint<64>          wide_data_t;
-      typedef uint32_t                             data_t;
-      typedef uint32_t                             tag_t;
-      typedef uint32_t                             be_t;
-      typedef uint32_t                             copy_t;
+      typedef typename vci_param_int::fast_addr_t addr_t;
+      typedef typename sc_dt::sc_uint<64>         wide_data_t;
+      typedef uint32_t                            data_t;
+      typedef uint32_t                            tag_t;
+      typedef uint32_t                            be_t;
+      typedef uint32_t                            copy_t;
 
       /* States of the TGT_CMD fsm */
@@ -392,12 +393,12 @@
           //  b1 accÃšs table llsc type SW / other
           //  b2 WRITE/CAS/LL/SC
-          TYPE_DATA_UNC               = 0x0,
-          TYPE_READ_DATA_MISS         = 0x1,
-          TYPE_READ_INS_UNC           = 0x2,
-          TYPE_READ_INS_MISS          = 0x3,
-          TYPE_WRITE                  = 0x4,
-          TYPE_CAS                    = 0x5,
-          TYPE_LL                     = 0x6,
-          TYPE_SC                     = 0x7
+          TYPE_DATA_UNC       = 0x0,
+          TYPE_READ_DATA_MISS = 0x1,
+          TYPE_READ_INS_UNC   = 0x2,
+          TYPE_READ_INS_MISS  = 0x3,
+          TYPE_WRITE          = 0x4,
+          TYPE_CAS            = 0x5,
+          TYPE_LL             = 0x6,
+          TYPE_SC             = 0x7
       };
 
@@ -405,168 +406,81 @@
       enum sc_status_type_e
       {
-          SC_SUCCESS  =   0x00000000,
-          SC_FAIL     =   0x00000001
+          SC_SUCCESS = 0x00000000,
+          SC_FAIL    = 0x00000001
       };
 
       // debug variables 
-      bool                 m_debug;
-      size_t               m_debug_previous_valid;
-      size_t               m_debug_previous_count;
-      bool                 m_debug_previous_dirty;
-      data_t *             m_debug_previous_data;
-      data_t *             m_debug_data;
+      bool     m_debug;
+      size_t   m_debug_previous_valid;
+      size_t   m_debug_previous_count;
+      bool     m_debug_previous_dirty;
+      data_t * m_debug_previous_data;
+      data_t * m_debug_data;
 
       // instrumentation counters
-      uint32_t     m_cpt_cycles;        // Counter of cycles
-
-      // Counters accessible in software (not yet but eventually)
-      uint32_t     m_cpt_reset_count;    // Last cycle at which counters have been reset
-      uint32_t     m_cpt_read_miss_local;     // Number of local READ transactions
-      uint32_t     m_cpt_read_miss_remote;    // number of remote READ transactions
-      uint32_t     m_cpt_read_miss_cost;      // Number of (flits * distance) for READs
-
-      uint32_t     m_cpt_getm_miss_local;     // Number of local getm miss  transactions
-      uint32_t     m_cpt_getm_miss_remote;    // number of remote getm miss transactions
-
-      uint32_t     m_cpt_getm_hit_local;     // Number of local getm hit transactions
-      uint32_t     m_cpt_getm_hit_remote;    // number of remote getm hit transactions
-      uint32_t     m_cpt_getm_cost;          // Number of (flits * distance) for getm 
-
-      uint32_t     m_cpt_write_local;    // Number of local WRITE transactions
-      uint32_t     m_cpt_write_remote;   // number of remote WRITE transactions
-      uint32_t     m_cpt_write_flits_local;  // number of flits for local WRITEs
-      uint32_t     m_cpt_write_flits_remote; // number of flits for remote WRITEs
-      uint32_t     m_cpt_write_cost;     // Number of (flits * distance) for WRITEs
-
-      uint32_t     m_cpt_ll_local;       // Number of local LL transactions
-      uint32_t     m_cpt_ll_remote;      // number of remote LL transactions
-      uint32_t     m_cpt_ll_cost;        // Number of (flits * distance) for LLs
-
-      uint32_t     m_cpt_sc_local;       // Number of local SC transactions
-      uint32_t     m_cpt_sc_remote;      // number of remote SC transactions
-      uint32_t     m_cpt_sc_cost;        // Number of (flits * distance) for SCs
-
-      uint32_t     m_cpt_cas_local;      // Number of local SC transactions
-      uint32_t     m_cpt_cas_remote;     // number of remote SC transactions
-      uint32_t     m_cpt_cas_cost;       // Number of (flits * distance) for SCs
-
-      uint32_t     m_cpt_update;         // Number of requests causing an UPDATE
-      uint32_t     m_cpt_update_local;   // Number of local UPDATE transactions
-      uint32_t     m_cpt_update_remote;  // Number of remote UPDATE transactions
-      uint32_t     m_cpt_update_cost;    // Number of (flits * distance) for UPDT
-
-      uint32_t     m_cpt_minval;         // Number of requests causing M_INV
-      uint32_t     m_cpt_minval_local;   // Number of local M_INV transactions
-      uint32_t     m_cpt_minval_remote;  // Number of remote M_INV transactions
-      uint32_t     m_cpt_minval_cost;    // Number of (flits * distance) for M_INV
-
-      uint32_t     m_cpt_binval;         // Number of BROADCAST INVAL
-
-      uint32_t     m_cpt_cleanup_local;  // Number of local CLEANUP transactions
-      uint32_t     m_cpt_cleanup_remote; // Number of remote CLEANUP transactions
-      uint32_t     m_cpt_cleanup_with_data;
-      uint32_t     m_cpt_cleanup_cost;   // Number of (flits * distance) for CLEANUPs
-
-      uint32_t     m_cpt_multi_ack_miss;  // Number of local CLEANUP transactions
-      uint32_t     m_cpt_multi_ack_hit;   // Number of local CLEANUP transactions
-      uint32_t     m_cpt_multi_ack_hit_with_data; // Number of remote CLEANUP transactions
+      uint32_t m_cpt_cycles;        // Counter of cycles
+
+      // Counters
+      // (*) = Counters accessible in software
+      uint32_t m_cpt_reset_count;    // Last cycle at which counters have been reset
+
+      uint32_t m_cpt_read_local;     // Number of local READ transactions (*)
+      uint32_t m_cpt_read_remote;    // number of remote READ transactions (*)
+      uint32_t m_cpt_read_cost;      // Number of (flits * distance) for READs (*)
+
+      uint32_t m_cpt_write_local;    // Number of local WRITE transactions
+      uint32_t m_cpt_write_remote;   // number of remote WRITE transactions
+      uint32_t m_cpt_write_flits_local;  // number of flits for local WRITEs (*)
+      uint32_t m_cpt_write_flits_remote; // number of flits for remote WRITEs (*)
+      uint32_t m_cpt_write_cost;     // Number of (flits * distance) for WRITEs (*)
+
+      uint32_t m_cpt_ll_local;       // Number of local LL transactions (*)
+      uint32_t m_cpt_ll_remote;      // number of remote LL transactions (*)
+      uint32_t m_cpt_ll_cost;        // Number of (flits * distance) for LLs (*)
+
+      uint32_t m_cpt_sc_local;       // Number of local SC transactions (*)
+      uint32_t m_cpt_sc_remote;      // number of remote SC transactions (*)
+      uint32_t m_cpt_sc_cost;        // Number of (flits * distance) for SCs (*)
+
+      uint32_t m_cpt_cas_local;      // Number of local SC transactions (*)
+      uint32_t m_cpt_cas_remote;     // number of remote SC transactions (*)
+      uint32_t m_cpt_cas_cost;       // Number of (flits * distance) for SCs (*)
+
+      uint32_t m_cpt_minval;         // Number of requests causing M_INV (*)
+      uint32_t m_cpt_minval_local;   // Number of local M_INV transactions (*)
+      uint32_t m_cpt_minval_remote;  // Number of remote M_INV transactions (*)
+      uint32_t m_cpt_minval_cost;    // Number of (flits * distance) for M_INV (*)
+
+      uint32_t m_cpt_binval;         // Number of BROADCAST INVAL (*)
+      uint32_t m_cpt_write_broadcast;// Number of BROADCAST INVAL caused by write
+      uint32_t m_cpt_getm_broadcast; // Number of BROADCAST INVAL caused by getm
+
+      uint32_t m_cpt_cleanup_local;  // Number of local CLEANUP transactions (*)
+      uint32_t m_cpt_cleanup_remote; // Number of remote CLEANUP transactions (*)
+      uint32_t m_cpt_cleanup_cost;   // Number of (flits * distance) for CLEANUPs (*)
+      uint32_t m_cpt_cleanup_data_local; //
+      uint32_t m_cpt_cleanup_data_remote; //
+      uint32_t m_cpt_cleanup_data_cost; //
+
+      uint32_t m_cpt_read_miss;      // Number of MISS READ
+      uint32_t m_cpt_write_miss;     // Number of MISS WRITE
+      uint32_t m_cpt_write_dirty;    // Cumulated length for WRITE transactions
+      uint32_t m_cpt_getm_miss;      // Number of getm miss
+
+      uint32_t m_cpt_getm_local;     // Number of local getm miss  transactions
+      uint32_t m_cpt_getm_remote;    // number of remote getm miss transactions
+      uint32_t m_cpt_getm_cost;      // Number of (flits * distance) for getm 
+
+      uint32_t m_cpt_inval_ro_local;  // Number of local INVAL RO (*)
+      uint32_t m_cpt_inval_ro_remote; // Number of local INVAL RO (*)
+      uint32_t m_cpt_inval_ro_cost;   // Cost for INVAL RO (*)
     
-      // Counters not accessible by software
-      uint32_t     m_cpt_read_miss;      // Number of MISS READ
-      uint32_t     m_cpt_getm_miss;      // Number of getm miss
-      uint32_t     m_cpt_getm_broadcast; // Number of BROADCAST INVAL because getm
-      uint32_t     m_cpt_getm_minval;    // Number of MULTI INVAL because getm
-      uint32_t     m_cpt_write_miss;     // Number of MISS WRITE
-      uint32_t     m_cpt_write_dirty;    // Cumulated length for WRITE transactions
-      uint32_t     m_cpt_write_broadcast;// Number of BROADCAST INVAL because write
-      uint32_t     m_cpt_write_minval;   // Number of MULTI INVAL because write
-      uint32_t     m_cpt_cas_broadcast;  // Number of BROADCAST INVAL because cas
-      uint32_t     m_cpt_cas_minval;     // Number of MULTI INVAL because cas
-      uint32_t     m_cpt_cas_miss;
-
-      uint32_t     m_cpt_read_locked_rb; // Read blocked by a locked ligne
-      uint32_t     m_cpt_cas_locked_rb;       // cas  blocked by a locked ligne
-      uint32_t     m_cpt_write_locked_rb;     // wt   blocked by a locked ligne
-
-      uint32_t     m_cpt_trt_rb;        // Read blocked by a hit in trt
-      uint32_t     m_cpt_trt_full;      // Transaction blocked due to a full trt
-      uint32_t     m_cpt_put;     
-      uint32_t     m_cpt_get;
-      
-      uint32_t     m_cpt_read_fsm_dir_lock;        // wait DIR LOCK
-      uint32_t     m_cpt_read_fsm_n_dir_lock;      // NB DIR LOCK
-      uint32_t     m_cpt_write_fsm_dir_lock;       // wait DIR LOCK
-      uint32_t     m_cpt_write_fsm_n_dir_lock;     // NB DIR LOCK
-      uint32_t     m_cpt_xram_rsp_fsm_dir_lock;    // wait DIR LOCK
-      uint32_t     m_cpt_xram_rsp_fsm_n_dir_lock;  // NB DIR LOCK
-      uint32_t     m_cpt_cas_fsm_dir_lock;         // wait DIR LOCK
-      uint32_t     m_cpt_cas_fsm_n_dir_lock;       // NB DIR LOCK
-      uint32_t     m_cpt_cleanup_fsm_dir_lock;     // wait DIR LOCK
-      uint32_t     m_cpt_cleanup_fsm_n_dir_lock;   // NB DIR LOCK
-      uint32_t     m_cpt_multi_ack_fsm_dir_lock;     // wait DIR LOCK
-      uint32_t     m_cpt_multi_ack_fsm_n_dir_lock;   // NB DIR LOCK
-
-      uint32_t     m_cpt_dir_unused;            // NB cycles DIR LOCK unused
-      uint32_t     m_cpt_read_fsm_dir_used;     // NB cycles DIR LOCK used
-      uint32_t     m_cpt_write_fsm_dir_used;    // NB cycles DIR LOCK used
-      uint32_t     m_cpt_cas_fsm_dir_used;      // NB cycles DIR LOCK used
-      uint32_t     m_cpt_xram_rsp_fsm_dir_used; // NB cycles DIR LOCK used
-      uint32_t     m_cpt_cleanup_fsm_dir_used;  // NB cycles DIR LOCK used
-      uint32_t     m_cpt_multi_ack_fsm_dir_used;  // NB cycles DIR LOCK used
-
-      uint32_t     m_cpt_read_fsm_trt_lock;      // wait TRT LOCK
-      uint32_t     m_cpt_write_fsm_trt_lock;     // wait TRT LOCK
-      uint32_t     m_cpt_cas_fsm_trt_lock;       // wait TRT LOCK
-      uint32_t     m_cpt_xram_rsp_fsm_trt_lock;  // wait TRT LOCK
-      uint32_t     m_cpt_ixr_fsm_trt_lock;       // wait TRT LOCK
-      
-      uint32_t     m_cpt_read_fsm_n_trt_lock;      // NB TRT LOCK
-      uint32_t     m_cpt_write_fsm_n_trt_lock;     // NB TRT LOCK
-      uint32_t     m_cpt_cas_fsm_n_trt_lock;       // NB TRT LOCK
-      uint32_t     m_cpt_xram_rsp_fsm_n_trt_lock;  // NB TRT LOCK
-      uint32_t     m_cpt_ixr_cmd_fsm_n_trt_lock;   // NB TRT LOCK
-      uint32_t     m_cpt_ixr_rsp_fsm_n_trt_lock;   // NB TRT LOCK
-
-      uint32_t     m_cpt_read_fsm_trt_used;      // NB cycles TRT LOCK used
-      uint32_t     m_cpt_write_fsm_trt_used;     // NB cycles TRT LOCK used
-      uint32_t     m_cpt_cas_fsm_trt_used;       // NB cycles TRT LOCK used
-      uint32_t     m_cpt_xram_rsp_fsm_trt_used;  // NB cycles TRT LOCK used
-      uint32_t     m_cpt_ixr_cmd_fsm_trt_used;   // NB cycles TRT LOCK used
-      uint32_t     m_cpt_ixr_rsp_fsm_trt_used;   // NB cycles TRT LOCK used
-      uint32_t     m_cpt_cleanup_fsm_trt_used;   // NB cycles TRT LOCK used
-      
-      uint32_t     m_cpt_trt_unused;            // NB cycles TRT LOCK unused
-
-      uint32_t     m_cpt_cleanup_fsm_ivt_lock;   // wait ivt LOCK
-      uint32_t     m_cpt_cleanup_fsm_n_ivt_lock;   // NB cycles UPT LOCK used
-      
-      uint32_t     m_cpt_multi_ack_fsm_ivt_lock;   // wait ivt LOCK
-      uint32_t     m_cpt_multi_ack_fsm_n_ivt_lock;   // NB cycles UPT LOCK used
-
-      uint32_t     m_cpt_ivt_unused;            // NB cycles UPT LOCK unused
-
-      uint32_t     m_cpt_read_fsm_heap_lock;     // wait HEAP LOCK
-      uint32_t     m_cpt_write_fsm_heap_lock;    // wait HEAP LOCK
-      uint32_t     m_cpt_cas_fsm_heap_lock;      // wait HEAP LOCK
-      uint32_t     m_cpt_cleanup_fsm_heap_lock;  // wait HEAP LOCK
-      uint32_t     m_cpt_xram_rsp_fsm_heap_lock; // wait HEAP LOCK
-      uint32_t     m_cpt_multi_ack_fsm_heap_lock; // wait HEAP LOCK
-      
-      uint32_t     m_cpt_read_fsm_n_heap_lock;     // NB HEAP LOCK
-      uint32_t     m_cpt_write_fsm_n_heap_lock;    // NB HEAP LOCK
-      uint32_t     m_cpt_cas_fsm_n_heap_lock;      // NB HEAP LOCK
-      uint32_t     m_cpt_cleanup_fsm_n_heap_lock;  // NB HEAP LOCK
-      uint32_t     m_cpt_xram_rsp_fsm_n_heap_lock; // NB HEAP LOCK
-      uint32_t     m_cpt_multi_ack_fsm_n_heap_lock; // NB HEAP LOCK
-      
-      uint32_t     m_cpt_read_fsm_heap_used;     // NB cycles HEAP LOCK used
-      uint32_t     m_cpt_write_fsm_heap_used;    // NB cycles HEAP LOCK used
-      uint32_t     m_cpt_cas_fsm_heap_used;      // NB cycles HEAP LOCK used
-      uint32_t     m_cpt_cleanup_fsm_heap_used;  // NB cycles HEAP LOCK used
-      uint32_t     m_cpt_xram_rsp_fsm_heap_used; // NB cycles HEAP LOCK used
-      uint32_t     m_cpt_multi_ack_fsm_heap_used; // NB cycles HEAP LOCK used
-      
-      uint32_t     m_cpt_heap_unused;            // NB cycles HEAP LOCK unused
-      uint32_t     m_cpt_slot_inval;           
+      uint32_t m_cpt_trt_rb;         // Read blocked by a hit in trt
+      uint32_t m_cpt_trt_full;       // Transaction blocked due to a full trt
+      uint32_t m_cpt_put;     
+      uint32_t m_cpt_get;
+           
+      uint32_t m_cpt_heap_unused;    // NB cycles HEAP LOCK unused
+      uint32_t m_cpt_slot_inval;           
 
       protected:
@@ -602,5 +516,5 @@
       sc_out<int> p_cc_send_fsm; 
       sc_out<int> p_cc_receive_fsm; 
-      sc_out<int> p_multi_ack_fsm; 
+      sc_out<int> p_multi_ack_fsm;
 #endif
 
@@ -611,5 +525,4 @@
           const soclib::common::IntTab       &srcid_x,        // global index RAM network
           const soclib::common::IntTab       &tgtid_d,        // global index INT network
-          const size_t                       cc_global_id,    // global index CC network
           const size_t                       x_width,         // X width in platform
           const size_t                       y_width,         // Y width in platform
@@ -654,7 +567,8 @@
       const size_t                       m_sets;             // Number of cache sets
       const size_t                       m_words;            // Number of words in a line
-      const size_t                       m_cc_global_id;     // global_index on cc network
-      const size_t                       m_xwidth;           // number of x bits in platform
-      const size_t                       m_ywidth;           // number of y bits in platform
+      size_t                             m_x_self;           // X self coordinate
+      size_t                             m_y_self;           // Y self coordinate
+      const size_t                       m_x_width;          // number of x bits in platform
+      const size_t                       m_y_width;          // number of y bits in platform
       size_t                             m_debug_start_cycle;
       bool                               m_debug_ok;
Index: branches/MESI/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
===================================================================
--- branches/MESI/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp	(revision 719)
+++ branches/MESI/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp	(revision 785)
@@ -351,5 +351,4 @@
             const IntTab        &srcid_x,          // global index on external network
             const IntTab        &tgtid_d,          // global index on direct network
-            const size_t        cc_global_id,      // global index on cc network
             const size_t        x_width,           // number of x bits in platform
             const size_t        y_width,           // number of x bits in platform
@@ -384,7 +383,6 @@
         m_sets( nsets ),
         m_words( nwords ),
-        m_cc_global_id( cc_global_id ),
-        m_xwidth(x_width),
-        m_ywidth(y_width),
+        m_x_width(x_width),
+        m_y_width(y_width),
         m_debug_start_cycle( debug_start_cycle ),
         m_debug_ok( debug_ok ),
@@ -550,8 +548,12 @@
             for(seg = m_seglist.begin() ; seg != m_seglist.end() ; seg++)
             {
-                if ( seg->special() ) m_seg_config = i;
+                if (seg->special() ) m_seg_config = i;
                 m_seg[i] = & (*seg);
                 i++;
             }
+
+            addr_t gid = m_seg[0]->baseAddress() >> (vci_param_int::N - x_width - y_width);
+            m_x_self = (gid >> m_y_width) & ((1 << m_x_width) - 1);
+            m_y_self =  gid               & ((1 << m_y_width) - 1);
 
             // Allocation for IXR_RSP FSM
@@ -614,10 +616,10 @@
         bool data_change = false;
 
-        if ( entry.state != ENTRY_INVALID )
+        if (entry.state != ENTRY_INVALID )
         {
             for ( size_t word = 0 ; word<m_words ; word++ )
             {
                 m_debug_data[word] = m_cache_data.read(way, set, word);
-                if ( (m_debug_previous_valid != ENTRY_INVALID) and 
+                if ((m_debug_previous_valid != ENTRY_INVALID) and 
                         (m_debug_data[word] != m_debug_previous_data[word]) )
                 {
@@ -628,5 +630,5 @@
 
         // print values if any change
-        if ( (entry.state != m_debug_previous_valid) or
+        if ((entry.state != m_debug_previous_valid) or
                 ((entry.state != ENTRY_INVALID) and (entry.count != m_debug_previous_count)) or
                 ((entry.state != ENTRY_INVALID) and (entry.dirty != m_debug_previous_dirty)) or data_change )
@@ -672,10 +674,9 @@
     {
         const uint32_t srcid_width = vci_param_int::S;
-        uint8_t self_x_srcid = m_cc_global_id >> (srcid_width - m_xwidth);
-        uint8_t self_y_srcid = (m_cc_global_id >> (srcid_width - m_ywidth)) & ((1 << m_xwidth) - 1);
-
-        uint8_t x_srcid = req_srcid >> (srcid_width - m_xwidth);
-        uint8_t y_srcid = (req_srcid >> (srcid_width - m_ywidth - m_xwidth)) & ((1 << m_xwidth) - 1);
-        return abs(self_x_srcid - x_srcid) + abs(self_y_srcid - y_srcid);
+
+        uint8_t req_x = (req_srcid >> (srcid_width - m_x_width));
+        uint8_t req_y = (req_srcid >> (srcid_width - m_x_width - m_y_width)) & ((1 << m_y_width) - 1);
+
+        return abs(m_x_self - req_x) + abs(m_y_self - req_y);
     }
 
@@ -706,5 +707,5 @@
             // LOCAL
 
-            case MEMC_LOCAL_READ_LO   : rdata = m_cpt_read_miss_local   ; break;
+            case MEMC_LOCAL_READ_LO   : rdata = m_cpt_read_local   ; break;
             case MEMC_LOCAL_WRITE_LO  : rdata = m_cpt_write_flits_local ; break;
             case MEMC_LOCAL_LL_LO     : rdata = m_cpt_ll_local          ; break;
@@ -719,5 +720,5 @@
             // REMOTE
 
-            case MEMC_REMOTE_READ_LO  : rdata = m_cpt_read_miss_remote   ; break;
+            case MEMC_REMOTE_READ_LO  : rdata = m_cpt_read_remote   ; break;
             case MEMC_REMOTE_WRITE_LO : rdata = m_cpt_write_flits_remote ; break;
             case MEMC_REMOTE_LL_LO    : rdata = m_cpt_ll_remote          ; break;
@@ -732,5 +733,5 @@
             // COST
 
-            case MEMC_COST_READ_LO    : rdata = m_cpt_read_miss_cost ; break;
+            case MEMC_COST_READ_LO    : rdata = m_cpt_read_cost ; break;
             case MEMC_COST_WRITE_LO   : rdata = m_cpt_write_cost; break;
             case MEMC_COST_LL_LO      : rdata = m_cpt_ll_cost   ; break;
@@ -753,7 +754,7 @@
             // LOCAL
 
-            case MEMC_LOCAL_MUPDATE_LO  : rdata = m_cpt_update_local ; break;
-            case MEMC_LOCAL_MINVAL_LO   : rdata = m_cpt_minval_local ; break;
-            case MEMC_LOCAL_CLEANUP_LO  : rdata = m_cpt_cleanup_local; break;
+            case MEMC_LOCAL_MUPDATE_LO  : rdata = m_cpt_inval_ro_local; break;
+            case MEMC_LOCAL_MINVAL_LO   : rdata = m_cpt_minval_local ;  break;
+            case MEMC_LOCAL_CLEANUP_LO  : rdata = m_cpt_cleanup_local;  break;
             case MEMC_LOCAL_MUPDATE_HI  :
             case MEMC_LOCAL_MINVAL_HI   :
@@ -762,7 +763,7 @@
             // REMOTE
 
-            case MEMC_REMOTE_MUPDATE_LO : rdata = m_cpt_update_remote ; break;
-            case MEMC_REMOTE_MINVAL_LO  : rdata = m_cpt_minval_remote ; break;
-            case MEMC_REMOTE_CLEANUP_LO : rdata = m_cpt_cleanup_remote; break;
+            case MEMC_REMOTE_MUPDATE_LO : rdata = m_cpt_inval_ro_remote; break;
+            case MEMC_REMOTE_MINVAL_LO  : rdata = m_cpt_minval_remote ;  break;
+            case MEMC_REMOTE_CLEANUP_LO : rdata = m_cpt_cleanup_remote;  break;
             case MEMC_REMOTE_MUPDATE_HI :
             case MEMC_REMOTE_MINVAL_HI  :
@@ -771,7 +772,7 @@
             // COST
 
-            case MEMC_COST_MUPDATE_LO   : rdata = m_cpt_update_cost   ; break;
-            case MEMC_COST_MINVAL_LO    : rdata = m_cpt_minval_cost   ; break;
-            case MEMC_COST_CLEANUP_LO   : rdata = m_cpt_cleanup_cost  ; break;
+            case MEMC_COST_MUPDATE_LO   : rdata = m_cpt_inval_ro_cost; break;
+            case MEMC_COST_MINVAL_LO    : rdata = m_cpt_minval_cost;   break;
+            case MEMC_COST_CLEANUP_LO   : rdata = m_cpt_cleanup_cost;  break;
             case MEMC_COST_MUPDATE_HI   :
             case MEMC_COST_MINVAL_HI    :
@@ -779,8 +780,8 @@
 
             // TOTAL
-
-            case MEMC_TOTAL_MUPDATE_LO  : rdata = m_cpt_update ; break;
-            case MEMC_TOTAL_MINVAL_LO   : rdata = m_cpt_minval ; break;
-            case MEMC_TOTAL_BINVAL_LO   : rdata = m_cpt_binval ; break;
+            // inval_ro are equal to the number of requests triggering them
+            case MEMC_TOTAL_MUPDATE_LO  : rdata = m_cpt_inval_ro_local + m_cpt_inval_ro_remote; break;
+            case MEMC_TOTAL_MINVAL_LO   : rdata = m_cpt_minval ;  break;
+            case MEMC_TOTAL_BINVAL_LO   : rdata = m_cpt_binval ;  break;
             case MEMC_TOTAL_MUPDATE_HI  :
             case MEMC_TOTAL_MINVAL_HI   :
@@ -788,5 +789,4 @@
 
             // unknown register
-
             default                     : error = 1;
         }
@@ -819,5 +819,5 @@
             << " | " << alloc_heap_fsm_str[r_alloc_heap_fsm.read()] << std::endl;
 
-        if ( detailed ) m_trt.print(0);
+        if (detailed ) m_trt.print(0);
     }
 
@@ -827,158 +827,69 @@
     /////////////////////////////////////////
     {
-        m_cpt_reset_count        = m_cpt_cycles;
-
-        m_cpt_read_miss_local           = 0 ; 
-        m_cpt_read_miss_remote          = 0 ; 
-        m_cpt_read_miss_cost            = 0 ;     
-                                                                                 
-        m_cpt_getm_miss_local           = 0 ;     
-        m_cpt_getm_miss_remote          = 0 ;     
-                                                                                         
-        m_cpt_getm_hit_local            = 0 ;     
-        m_cpt_getm_hit_remote           = 0 ;         
-        m_cpt_getm_cost                 = 0 ; 
-                                                                                             
-        m_cpt_write_local               = 0 ;     
-        m_cpt_write_remote              = 0 ;     
-        m_cpt_write_flits_local         = 0 ;         
-        m_cpt_write_flits_remote        = 0 ;         
-        m_cpt_write_cost                = 0 ;    
-
-        m_cpt_ll_local                  = 0 ;         
-        m_cpt_ll_remote                 = 0 ;             
-        m_cpt_ll_cost                   = 0 ;         
-                                                                                            
-        m_cpt_sc_local                  = 0 ;                             
-        m_cpt_sc_remote                 = 0 ;                             
-        m_cpt_sc_cost                   = 0 ;                             
-                                                                                         
-        m_cpt_cas_local                 = 0 ;                                 
-        m_cpt_cas_remote                = 0 ;                                     
-        m_cpt_cas_cost                  = 0 ;                                 
-                                                                                     
-        m_cpt_update                    = 0 ;                     
-        m_cpt_update_local              = 0 ;                             
-        m_cpt_update_remote             = 0 ;                             
-        m_cpt_update_cost               = 0 ;                         
-                                                                                    
-        m_cpt_minval                    = 0 ;                 
-        m_cpt_minval_local              = 0 ;                         
-        m_cpt_minval_remote             = 0 ;                     
-        m_cpt_minval_cost               = 0 ;                         
-                                                                                     
-        m_cpt_binval                    = 0 ;                     
-                                                                                             
-        m_cpt_cleanup_local             = 0 ;                             
-        m_cpt_cleanup_remote            = 0 ;                         
-        m_cpt_cleanup_with_data         = 0 ;                             
-        m_cpt_cleanup_cost              = 0 ;                         
-                                                                                     
-        m_cpt_multi_ack_miss            = 0 ;                         
-        m_cpt_multi_ack_hit             = 0 ;                     
-        m_cpt_multi_ack_hit_with_data   = 0 ;                             
-                                                                                     
-                                                 
-        m_cpt_read_miss                 = 0 ;                                     
-        m_cpt_getm_miss                 = 0 ;                                 
-        m_cpt_getm_broadcast            = 0 ;                                     
-        m_cpt_getm_minval               = 0 ;                                     
-        m_cpt_write_miss                = 0 ;                                             
-        m_cpt_write_dirty               = 0 ;                                             
-        m_cpt_write_broadcast           = 0 ;                                                 
-        m_cpt_write_minval              = 0 ;                                         
-        m_cpt_cas_broadcast             = 0 ;                                                 
-        m_cpt_cas_minval                = 0 ;                                                                 
-        m_cpt_cas_miss                  = 0 ;                                                 
-                                                                                     
-        m_cpt_read_locked_rb            = 0 ;                                                                 
-        m_cpt_cas_locked_rb             = 0 ;                                                                 
-        m_cpt_write_locked_rb           = 0 ;                                                                                             
-                                                                                     
-        m_cpt_trt_rb                    = 0 ;                                                                 
-        m_cpt_trt_full                  = 0 ;                                                             
-        m_cpt_put                       = 0 ;                                                             
-        m_cpt_get                       = 0 ;                                                             
-        m_cpt_read_fsm_dir_lock         = 0 ;                                                                         
-        m_cpt_read_fsm_n_dir_lock       = 0 ;                                                                         
-        m_cpt_write_fsm_dir_lock        = 0 ;                                                                 
-        m_cpt_write_fsm_n_dir_lock      = 0 ;                                                                                         
-        m_cpt_xram_rsp_fsm_dir_lock     = 0 ;                                                                             
-        m_cpt_xram_rsp_fsm_n_dir_lock   = 0 ;                                                                 
-        m_cpt_cas_fsm_dir_lock          = 0 ;                                                         
-        m_cpt_cas_fsm_n_dir_lock        = 0 ;                                             
-        m_cpt_cleanup_fsm_dir_lock      = 0 ;                                                         
-        m_cpt_cleanup_fsm_n_dir_lock    = 0 ;                                                     
-        m_cpt_multi_ack_fsm_dir_lock    = 0 ;                                                 
-        m_cpt_multi_ack_fsm_n_dir_lock  = 0 ;                                                     
-                                                                                        
-        m_cpt_dir_unused                = 0 ;                                                             
-        m_cpt_read_fsm_dir_used         = 0 ;                                                             
-        m_cpt_write_fsm_dir_used        = 0 ;                                                     
-        m_cpt_cas_fsm_dir_used          = 0 ;                                             
-        m_cpt_xram_rsp_fsm_dir_used     = 0 ;                                                 
-        m_cpt_cleanup_fsm_dir_used      = 0 ;                                                 
-        m_cpt_multi_ack_fsm_dir_used    = 0 ;                                                         
-                                                                                                                    
-        m_cpt_read_fsm_trt_lock         = 0 ;                                                 
-        m_cpt_write_fsm_trt_lock        = 0 ;                                                         
-        m_cpt_cas_fsm_trt_lock          = 0 ;                                                         
-        m_cpt_xram_rsp_fsm_trt_lock     = 0 ;                                                     
-        m_cpt_ixr_fsm_trt_lock          = 0 ;                                                     
-                                                                                     
-        m_cpt_read_fsm_n_trt_lock       = 0 ;                                             
-        m_cpt_write_fsm_n_trt_lock      = 0 ;                                                         
-        m_cpt_cas_fsm_n_trt_lock        = 0 ;                                                     
-        m_cpt_xram_rsp_fsm_n_trt_lock   = 0 ;                                         
-        m_cpt_ixr_cmd_fsm_n_trt_lock    = 0 ;                                                             
-        m_cpt_ixr_rsp_fsm_n_trt_lock    = 0 ;                                                     
-                                                                                     
-        m_cpt_read_fsm_trt_used         = 0 ;                                                     
-        m_cpt_write_fsm_trt_used        = 0 ;                                                         
-        m_cpt_cas_fsm_trt_used          = 0 ;                                             
-        m_cpt_xram_rsp_fsm_trt_used     = 0 ;                                                     
-        m_cpt_ixr_cmd_fsm_trt_used      = 0 ;                                                 
-        m_cpt_ixr_rsp_fsm_trt_used      = 0 ;                                                     
-        m_cpt_cleanup_fsm_trt_used      = 0 ;                                             
-                                                                                                             
-        m_cpt_trt_unused                = 0 ;                                                 
-                                                                                    
-        m_cpt_cleanup_fsm_ivt_lock      = 0 ;                                             
-        m_cpt_cleanup_fsm_n_ivt_lock    = 0 ;                                                         
-                                                                                     
-        m_cpt_multi_ack_fsm_ivt_lock    = 0 ;                                                 
-        m_cpt_multi_ack_fsm_n_ivt_lock  = 0 ;                                             
-                                                                                    
-        m_cpt_ivt_unused                = 0 ;                             
-                                                                                     
-        m_cpt_read_fsm_heap_lock        = 0 ;                                                     
-        m_cpt_write_fsm_heap_lock       = 0 ;                                                 
-        m_cpt_cas_fsm_heap_lock         = 0 ;                                             
-        m_cpt_cleanup_fsm_heap_lock     = 0 ;                                                         
-        m_cpt_xram_rsp_fsm_heap_lock    = 0 ;                                                             
-        m_cpt_multi_ack_fsm_heap_lock   = 0 ;                                                 
-                                                                                    
-        m_cpt_read_fsm_n_heap_lock      = 0 ;                                                 
-        m_cpt_write_fsm_n_heap_lock     = 0 ;                                             
-        m_cpt_cas_fsm_n_heap_lock       = 0 ;                                                     
-        m_cpt_cleanup_fsm_n_heap_lock   = 0 ;                                                     
-        m_cpt_xram_rsp_fsm_n_heap_lock  = 0 ;                                                         
-        m_cpt_multi_ack_fsm_n_heap_lock = 0 ;                                                         
-                                                                                                                 
-        m_cpt_read_fsm_heap_used        = 0 ;                                                 
-        m_cpt_write_fsm_heap_used       = 0 ;                                                 
-        m_cpt_cas_fsm_heap_used         = 0 ;                                             
-        m_cpt_cleanup_fsm_heap_used     = 0 ;                                         
-        m_cpt_xram_rsp_fsm_heap_used    = 0 ;                                         
-        m_cpt_multi_ack_fsm_heap_used   = 0 ;                                                     
-                                                                                     
-        m_cpt_heap_unused               = 0 ;                     
-        m_cpt_slot_inval                = 0 ;
-    
+        m_cpt_reset_count               = m_cpt_cycles;
+
+        m_cpt_read_local                = 0;
+        m_cpt_read_remote               = 0;
+        m_cpt_read_cost                 = 0;
+
+        m_cpt_write_local               = 0;
+        m_cpt_write_remote              = 0;
+        m_cpt_write_flits_local         = 0;
+        m_cpt_write_flits_remote        = 0;
+        m_cpt_write_cost                = 0;
+
+        m_cpt_ll_local                  = 0;
+        m_cpt_ll_remote                 = 0;
+        m_cpt_ll_cost                   = 0;
+
+        m_cpt_sc_local                  = 0;
+        m_cpt_sc_remote                 = 0;
+        m_cpt_sc_cost                   = 0;
+
+        m_cpt_cas_local                 = 0;
+        m_cpt_cas_remote                = 0;
+        m_cpt_cas_cost                  = 0;
+
+        m_cpt_minval                    = 0;
+        m_cpt_minval_local              = 0;
+        m_cpt_minval_remote             = 0;
+        m_cpt_minval_cost               = 0;
+
+        m_cpt_binval                    = 0;
+        m_cpt_write_broadcast           = 0;
+        m_cpt_getm_broadcast            = 0;
+
+        m_cpt_cleanup_local             = 0;
+        m_cpt_cleanup_remote            = 0;
+        m_cpt_cleanup_cost              = 0;
+        m_cpt_cleanup_data_local        = 0;
+        m_cpt_cleanup_data_remote       = 0;
+        m_cpt_cleanup_data_cost         = 0;
+
+        m_cpt_read_miss                 = 0;
+        m_cpt_write_miss                = 0;
+        m_cpt_write_dirty               = 0;
+        m_cpt_getm_miss                 = 0;
+
+        m_cpt_getm_local                = 0;
+        m_cpt_getm_remote               = 0;
+        m_cpt_getm_cost                 = 0;
+
+        m_cpt_inval_ro_local            = 0;
+        m_cpt_inval_ro_remote           = 0;
+        m_cpt_inval_ro_cost             = 0; 
+
+        m_cpt_trt_rb                    = 0;
+        m_cpt_trt_full                  = 0;
+        m_cpt_put                       = 0;
+        m_cpt_get                       = 0;
+
+        m_cpt_heap_unused               = 0;
+        m_cpt_slot_inval                = 0;
     }
 
 
     /////////////////////////////////////////
-    tmpl(void)::print_stats(bool activity_counters = true, bool stats = true)
+    tmpl(void)::print_stats(bool activity_counters)
     {
         std::cout << "**********************************" << std::dec << std::endl;
@@ -993,53 +904,72 @@
                 << "[001] NUMBER OF CYCLES          = " << m_cpt_cycles << std::endl
                 << std::endl
-                << "[002] LOCAL READ                = " << m_cpt_read_miss_local << std::endl
-                << "[003] REMOTE READ               = " << m_cpt_read_miss_remote << std::endl
-                << "[004] READ COST (FLITS * DIST)  = " << m_cpt_read_miss_cost << std::endl
+                << "[010] LOCAL READ                = " << m_cpt_read_local << std::endl
+                << "[011] REMOTE READ               = " << m_cpt_read_remote << std::endl
+                << "[012] READ COST (FLITS * DIST)  = " << m_cpt_read_cost << std::endl
                 << std::endl
-                << "[005] LOCAL WRITE               = " << m_cpt_write_local << std::endl
-                << "[006] REMOTE WRITE              = " << m_cpt_write_remote << std::endl
-                << "[007] WRITE FLITS LOCAL         = " << m_cpt_write_flits_local << std::endl
-                << "[008] WRITE FLITS REMOTE        = " << m_cpt_write_flits_remote << std::endl
-                << "[009] WRITE COST (FLITS * DIST) = " << m_cpt_write_cost << std::endl
+                << "[020] LOCAL WRITE               = " << m_cpt_write_local << std::endl
+                << "[021] REMOTE WRITE              = " << m_cpt_write_remote << std::endl
+                << "[022] WRITE FLITS LOCAL         = " << m_cpt_write_flits_local << std::endl
+                << "[023] WRITE FLITS REMOTE        = " << m_cpt_write_flits_remote << std::endl
+                << "[024] WRITE COST (FLITS * DIST) = " << m_cpt_write_cost << std::endl
+                << "[025] WRITE L1 MISS NCC         = " << "0" << std::endl
                 << std::endl
-                << "[010] LOCAL LL                  = " << m_cpt_ll_local << std::endl
-                << "[011] REMOTE LL                 = " << m_cpt_ll_remote << std::endl
-                << "[012] LL COST (FLITS * DIST)    = " << m_cpt_ll_cost << std::endl
+                << "[030] LOCAL LL                  = " << m_cpt_ll_local << std::endl
+                << "[031] REMOTE LL                 = " << m_cpt_ll_remote << std::endl
+                << "[032] LL COST (FLITS * DIST)    = " << m_cpt_ll_cost << std::endl
                 << std::endl
-                << "[013] LOCAL SC                  = " << m_cpt_sc_local << std::endl
-                << "[014] REMOTE SC                 = " << m_cpt_sc_remote << std::endl
-                << "[015] SC COST (FLITS * DIST)    = " << m_cpt_sc_cost << std::endl
+                << "[040] LOCAL SC                  = " << m_cpt_sc_local << std::endl
+                << "[041] REMOTE SC                 = " << m_cpt_sc_remote << std::endl
+                << "[042] SC COST (FLITS * DIST)    = " << m_cpt_sc_cost << std::endl
                 << std::endl
-                << "[016] LOCAL CAS                 = " << m_cpt_cas_local << std::endl
-                << "[017] REMOTE CAS                = " << m_cpt_cas_remote << std::endl
-                << "[018] CAS COST (FLITS * DIST)   = " << m_cpt_cas_cost << std::endl
+                << "[050] LOCAL CAS                 = " << m_cpt_cas_local << std::endl
+                << "[051] REMOTE CAS                = " << m_cpt_cas_remote << std::endl
+                << "[052] CAS COST (FLITS * DIST)   = " << m_cpt_cas_cost << std::endl
                 << std::endl
-                << "[019] REQUESTS TRIG. UPDATE     = " << m_cpt_update << std::endl
-                << "[020] LOCAL UPDATE              = " << m_cpt_update_local << std::endl
-                << "[021] REMOTE UPDATE             = " << m_cpt_update_remote << std::endl
-                << "[022] UPDT COST (FLITS * DIST)  = " << m_cpt_update_cost << std::endl
+                << "[060] REQUESTS TRIG. UPDATE     = " << "0" << std::endl
+                << "[061] LOCAL UPDATE              = " << "0" << std::endl
+                << "[062] REMOTE UPDATE             = " << "0" << std::endl
+                << "[063] UPDT COST (FLITS * DIST)  = " << "0" << std::endl
                 << std::endl
-                << "[023] REQUESTS TRIG. M_INV      = " << m_cpt_minval << std::endl
-                << "[024] LOCAL M_INV               = " << m_cpt_minval_local << std::endl
-                << "[025] REMOTE M_INV              = " << m_cpt_minval_remote << std::endl
-                << "[026] M_INV COST (FLITS * DIST) = " << m_cpt_minval_cost << std::endl
+                << "[070] REQUESTS TRIG. M_INV      = " << m_cpt_minval << std::endl
+                << "[071] LOCAL M_INV               = " << m_cpt_minval_local << std::endl
+                << "[072] REMOTE M_INV              = " << m_cpt_minval_remote << std::endl
+                << "[073] M_INV COST (FLITS * DIST) = " << m_cpt_minval_cost << std::endl
                 << std::endl
-                << "[027] BROADCAT INVAL            = " << m_cpt_binval << std::endl
+                << "[080] BROADCAT INVAL            = " << m_cpt_binval << std::endl
+                << "[081] WRITE BROADCAST           = " << m_cpt_write_broadcast << std::endl
+                << "[082] GETM BROADCAST            = " << m_cpt_getm_broadcast << std::endl
                 << std::endl
-                << "[028] LOCAL CLEANUP             = " << m_cpt_cleanup_local << std::endl
-                << "[029] REMOTE CLEANUP            = " << m_cpt_cleanup_remote << std::endl
-                << "[030] CLNUP COST (FLITS * DIST) = " << m_cpt_cleanup_cost << std::endl
+                << "[090] LOCAL CLEANUP             = " << m_cpt_cleanup_local << std::endl
+                << "[091] REMOTE CLEANUP            = " << m_cpt_cleanup_remote << std::endl
+                << "[092] CLNUP COST (FLITS * DIST) = " << m_cpt_cleanup_cost << std::endl
+                << "[093] LOCAL CLEANUP DATA        = " << m_cpt_cleanup_data_local << std::endl
+                << "[094] REMOTE CLEANUP DATA       = " << m_cpt_cleanup_data_remote << std::endl
+                << "[095] CLEANUP DATA COST         = " << m_cpt_cleanup_data_cost << std::endl
                 << std::endl
+                << "[100] READ MISS                 = " << m_cpt_read_miss << std::endl
+                << "[101] WRITE MISS                = " << m_cpt_write_miss << std::endl
+                << "[102] WRITE DIRTY               = " << m_cpt_write_dirty << std::endl
+                << "[103] GETM MISS                 = " << m_cpt_getm_miss << std::endl
                 << std::endl
-                << "[031] READ MISS                 = " << m_cpt_read_miss << std::endl
-                << "[032] WRITE MISS                = " << m_cpt_write_miss << std::endl
-                << "[033] WRITE DIRTY               = " << m_cpt_write_dirty << std::endl
-                << "[034] RD BLOCKED BY HIT IN TRT  = " << m_cpt_trt_rb << std::endl
-                << "[035] TRANS BLOCKED BY FULL TRT = " << m_cpt_trt_full << std::endl
-                << "[036] PUT (UNIMPLEMENTED)       = " << m_cpt_put << std::endl
-                << "[037] GET (UNIMPLEMENTED)       = " << m_cpt_get << std::endl
-                << "[038] WRITE BROADCAST           = " << m_cpt_write_broadcast << std::endl
+                << "[110] RD BLOCKED BY HIT IN TRT  = " << m_cpt_trt_rb << std::endl
+                << "[111] TRANS BLOCKED BY FULL TRT = " << m_cpt_trt_full << std::endl
+                << "[120] PUT (UNIMPLEMENTED)       = " << m_cpt_put << std::endl
+                << "[121] GET (UNIMPLEMENTED)       = " << m_cpt_get << std::endl
+                << "[130] MIN HEAP SLOT AVAILABLE   = " << "-1" << std::endl
                 << std::endl
-
+                << "[140] NCC TO CC (READ)          = " << "0" << std::endl
+                << "[141] NCC TO CC (WRITE)         = " << "0" << std::endl
+                << std::endl
+                << "[150] LOCAL GETM                = " << m_cpt_getm_local << std::endl
+                << "[151] REMOTE GETM               = " << m_cpt_getm_remote << std::endl
+                << "[152] GETM COST (FLITS * DIST)  = " << m_cpt_getm_cost << std::endl
+                << std::endl
+                << "[160] LOCAL INVAL RO            = " << m_cpt_inval_ro_local << std::endl
+                << "[161] REMOTE INVAL RO           = " << m_cpt_inval_ro_remote << std::endl
+                << "[162] INVAL RO COST             = " << m_cpt_inval_ro_cost << std::endl
+                << std::endl;
+
+#if 0
                 << "[050] LOCAL GETM MISS           = " << m_cpt_getm_miss_local << std::endl
                 << "[051] REMOTE GETM MISS          = " << m_cpt_getm_miss_remote << std::endl
@@ -1047,6 +977,4 @@
                 << "[053] REMOTE GETM HIT           = " << m_cpt_getm_hit_remote << std::endl
                 << "[054] GETM COST (FLITS * DIST)  = " << m_cpt_getm_cost << std::endl
-                << std::endl
-                << "[055] CLEANUP WITH DATA         = " << m_cpt_cleanup_with_data << std::endl
                 << std::endl
                 << "[056] MULTI_ACK_MISS            = " << m_cpt_multi_ack_miss << std::endl
@@ -1064,74 +992,14 @@
                 << "[066] EVICTED SLOT              = " << m_cpt_slot_inval << std::endl
                 << std::endl;
+#endif
         }
 
-        if (stats) {
-            std::cout << "----------------------------------" << std::dec << std::endl;
-            std::cout << "---      Calculated Stats      ---" << std::dec << std::endl;
-            std::cout << "----------------------------------" << std::dec << std::endl;
-            std::cout
-                << "[100] READ TOTAL            = " << m_cpt_read_miss_local + m_cpt_read_miss_remote << std::endl
-                << "[101] READ RATE             = " << (double) (m_cpt_read_miss_local + m_cpt_read_miss_remote) / m_cpt_cycles << std::endl
-                << "[102] LOCAL READ RATE       = " << (double) m_cpt_read_miss_local / m_cpt_cycles << std::endl
-                << "[103] REMOTE READ RATE      = " << (double) m_cpt_read_miss_remote / m_cpt_cycles << std::endl
-                << "[104] READ MISS RATE        = " << (double) m_cpt_read_miss / (m_cpt_read_miss_local + m_cpt_read_miss_remote) << std::endl
-                << "[105] GETM MISS TOTAL       = " << m_cpt_getm_miss_local + m_cpt_getm_miss_remote << std::endl
-                << "[106] GETM MISS RATE        = " << (double) (m_cpt_getm_miss_local + m_cpt_getm_miss_remote) / m_cpt_cycles << std::endl
-                << "[107] LOCAL GETM MISS RATE  = " << (double) m_cpt_getm_miss_local / m_cpt_cycles << std::endl
-                << "[108] REMOTE GETM MISS RATE = " << (double) m_cpt_getm_miss_remote / m_cpt_cycles << std::endl
-                << "[109] GETM HIT TOTAL        = " << m_cpt_getm_hit_local + m_cpt_getm_hit_remote << std::endl
-                << "[110] GETM HIT RATE         = " << (double) (m_cpt_getm_hit_local + m_cpt_getm_hit_remote) / m_cpt_cycles << std::endl
-                << "[111] LOCAL GETM HIT RATE   = " << (double) m_cpt_getm_hit_local / m_cpt_cycles << std::endl
-                << "[112] REMOTE GETM HIT RATE  = " << (double) m_cpt_getm_hit_remote / m_cpt_cycles << std::endl
-
-                << "[113] GETM TOTAL            = " << m_cpt_getm_hit_local + m_cpt_getm_hit_remote + m_cpt_getm_miss_remote + m_cpt_getm_miss_local << std::endl
-
-                << "[114] GETM MISS RATE        = " << (double) m_cpt_read_miss / (m_cpt_getm_hit_local + m_cpt_getm_hit_remote + m_cpt_getm_miss_remote + m_cpt_getm_miss_local) << std::endl
- 
-                << std::endl
-                << "[115] WRITE TOTAL           = " << m_cpt_write_local + m_cpt_write_remote << std::endl
-                << "[116] WRITE RATE            = " << (double) (m_cpt_write_local + m_cpt_write_remote) / m_cpt_cycles << std::endl
-                << "[117] LOCAL WRITE RATE      = " << (double) m_cpt_write_local / m_cpt_cycles << std::endl
-                << "[118] REMOTE WRITE RATE     = " << (double) m_cpt_write_remote / m_cpt_cycles << std::endl
-                << "[119] WRITE MISS RATE       = " << (double) m_cpt_write_miss / (m_cpt_write_local + m_cpt_write_remote) << std::endl
-                << "[120] WRITE BURST TOTAL     = " << m_cpt_write_flits_local + m_cpt_write_flits_remote << std::endl
-                << "[121] WRITE BURST AVERAGE   = " << (double) (m_cpt_write_flits_local + m_cpt_write_flits_remote) / (m_cpt_write_local + m_cpt_write_remote) << std::endl
-                << "[122] LOCAL WRITE BURST AV. = " << (double) m_cpt_write_flits_local / (m_cpt_write_local + m_cpt_write_remote) << std::endl
-                << "[123] REMOTE WRITE BURST AV = " << (double) m_cpt_write_flits_remote / (m_cpt_write_local + m_cpt_write_remote) << std::endl
-                << std::endl
-                << "[124] UPDATE RATE                = " << (double) m_cpt_update / m_cpt_cycles << std::endl
-                << "[125] AV. UPDATE PER UP REQ      = " << (double) (m_cpt_update_local + m_cpt_update_remote) / m_cpt_update << std::endl
-                << "[126] AV. LOC UPDT PER UP REQ    = " << (double) m_cpt_update_local / m_cpt_update << std::endl
-                << "[127] AV. REMOTE UPDT PER UP REQ = " << (double) m_cpt_update_remote / m_cpt_update << std::endl
-                << std::endl
-                << "[128] INVAL MULTICAST RATE  = " << (double) m_cpt_minval / m_cpt_cycles << std::endl
-                << "[129] AVE. INVAL PER M_INV  = " << (double) (m_cpt_minval_local + m_cpt_minval_remote) / m_cpt_minval << std::endl
-                << "[130] AV. LOC INV PER M_INV = " << (double) m_cpt_minval_local / m_cpt_minval << std::endl
-                << "[131] AV. REM INV PER M_INV = " << (double) m_cpt_minval_remote / m_cpt_minval << std::endl
-                << std::endl
-                << "[132] INVAL BROADCAST RATE  = " << (double) m_cpt_binval / m_cpt_cycles << std::endl
-                << "[133] WRITE DIRTY RATE      = " << (double) m_cpt_write_dirty / m_cpt_cycles << std::endl
-                << std::endl
-                << "[134] CLEANUP RATE          = " << (double) (m_cpt_cleanup_local + m_cpt_cleanup_remote) / m_cpt_cycles << std::endl
-                << "[135] LOCAL CLEANUP RATE    = " << (double) m_cpt_cleanup_local / m_cpt_cycles << std::endl
-                << "[136] REMOTE CLEANUP RATE   = " << (double) m_cpt_cleanup_remote / m_cpt_cycles << std::endl
-                << "[137] LL RATE               = " << (double) (m_cpt_ll_local + m_cpt_ll_remote) / m_cpt_cycles << std::endl
-                << "[138] LOCAL LL RATE         = " << (double) m_cpt_ll_local / m_cpt_cycles << std::endl
-                << "[139] REMOTE LL RATE        = " << (double) m_cpt_ll_remote / m_cpt_cycles << std::endl
-                << "[140] SC RATE               = " << (double) (m_cpt_sc_local + m_cpt_sc_remote) / m_cpt_cycles << std::endl
-                << "[141] LOCAL SC RATE         = " << (double) m_cpt_sc_local / m_cpt_cycles << std::endl
-                << "[142] REMOTE SC RATE        = " << (double) m_cpt_sc_remote / m_cpt_cycles << std::endl
-                << "[143] CAS RATE              = " << (double) (m_cpt_cas_local + m_cpt_cas_remote) / m_cpt_cycles << std::endl
-                << "[144] LOCAL CAS RATE        = " << (double) m_cpt_cas_local / m_cpt_cycles << std::endl
-                << "[145] REMOTE CAS RATE       = " << (double) m_cpt_cas_remote / m_cpt_cycles << std::endl
-                << "[124] MULTI ACK RATE        = " << (double) (m_cpt_multi_ack_hit + m_cpt_multi_ack_miss) / m_cpt_cycles << std::endl
-                << std::endl;
-        }
+        // No more calculated stats
     }
 
 
     /////////////////////////////////
-    tmpl(/**/) ::~VciMemCache()
-        /////////////////////////////////
+    tmpl(/**/)::~VciMemCache()
+    /////////////////////////////////
     {
         delete [] m_seg;
@@ -1168,10 +1036,10 @@
     //////////////////////////////////
     tmpl(void) ::transition()
-        //////////////////////////////////
+    //////////////////////////////////
     {
         using soclib::common::uint32_log2;
 
         // RESET
-        if(! p_resetn.read())
+        if (! p_resetn.read())
         {
 
@@ -1317,152 +1185,64 @@
 
             // Activity counters
-            m_cpt_reset_count               = 0 ;                    
-            m_cpt_read_miss_local           = 0 ; 
-            m_cpt_read_miss_remote          = 0 ; 
-            m_cpt_read_miss_cost            = 0 ;     
-                                                                                     
-            m_cpt_getm_miss_local           = 0 ;     
-            m_cpt_getm_miss_remote          = 0 ;     
-                                                                                             
-            m_cpt_getm_hit_local            = 0 ;     
-            m_cpt_getm_hit_remote           = 0 ;         
-            m_cpt_getm_cost                 = 0 ; 
-                                                                                                 
-            m_cpt_write_local               = 0 ;     
-            m_cpt_write_remote              = 0 ;     
-            m_cpt_write_flits_local         = 0 ;         
-            m_cpt_write_flits_remote        = 0 ;         
-            m_cpt_write_cost                = 0 ;    
-
-            m_cpt_ll_local                  = 0 ;         
-            m_cpt_ll_remote                 = 0 ;             
-            m_cpt_ll_cost                   = 0 ;         
-                                                                                                
-            m_cpt_sc_local                  = 0 ;                             
-            m_cpt_sc_remote                 = 0 ;                             
-            m_cpt_sc_cost                   = 0 ;                             
-                                                                                             
-            m_cpt_cas_local                 = 0 ;                                 
-            m_cpt_cas_remote                = 0 ;                                     
-            m_cpt_cas_cost                  = 0 ;                                 
-                                                                                         
-            m_cpt_update                    = 0 ;                     
-            m_cpt_update_local              = 0 ;                             
-            m_cpt_update_remote             = 0 ;                             
-            m_cpt_update_cost               = 0 ;                         
-                                                                                        
-            m_cpt_minval                    = 0 ;                 
-            m_cpt_minval_local              = 0 ;                         
-            m_cpt_minval_remote             = 0 ;                     
-            m_cpt_minval_cost               = 0 ;                         
-                                                                                         
-            m_cpt_binval                    = 0 ;                     
-                                                                                                 
-            m_cpt_cleanup_local             = 0 ;                             
-            m_cpt_cleanup_remote            = 0 ;                         
-            m_cpt_cleanup_with_data         = 0 ;                             
-            m_cpt_cleanup_cost              = 0 ;                         
-                                                                                         
-            m_cpt_multi_ack_miss            = 0 ;                         
-            m_cpt_multi_ack_hit             = 0 ;                     
-            m_cpt_multi_ack_hit_with_data   = 0 ;                             
-                                                                                         
-                                                     
-            m_cpt_read_miss                 = 0 ;                                     
-            m_cpt_getm_miss                 = 0 ;                                 
-            m_cpt_getm_broadcast            = 0 ;                                     
-            m_cpt_getm_minval               = 0 ;                                     
-            m_cpt_write_miss                = 0 ;                                             
-            m_cpt_write_dirty               = 0 ;                                             
-            m_cpt_write_broadcast           = 0 ;                                                 
-            m_cpt_write_minval              = 0 ;                                         
-            m_cpt_cas_broadcast             = 0 ;                                                 
-            m_cpt_cas_minval                = 0 ;                                                                 
-            m_cpt_cas_miss                  = 0 ;                                                 
-                                                                                         
-            m_cpt_read_locked_rb            = 0 ;                                                                 
-            m_cpt_cas_locked_rb             = 0 ;                                                                 
-            m_cpt_write_locked_rb           = 0 ;                                                                                             
-                                                                                         
-            m_cpt_trt_rb                    = 0 ;                                                                 
-            m_cpt_trt_full                  = 0 ;                                                             
-            m_cpt_put                       = 0 ;                                                             
-            m_cpt_get                       = 0 ;                                                             
-                                                                                             
-            m_cpt_read_fsm_dir_lock         = 0 ;                                                                         
-            m_cpt_read_fsm_n_dir_lock       = 0 ;                                                                         
-            m_cpt_write_fsm_dir_lock        = 0 ;                                                                 
-            m_cpt_write_fsm_n_dir_lock      = 0 ;                                                                                         
-            m_cpt_xram_rsp_fsm_dir_lock     = 0 ;                                                                             
-            m_cpt_xram_rsp_fsm_n_dir_lock   = 0 ;                                                                 
-            m_cpt_cas_fsm_dir_lock          = 0 ;                                                         
-            m_cpt_cas_fsm_n_dir_lock        = 0 ;                                             
-            m_cpt_cleanup_fsm_dir_lock      = 0 ;                                                         
-            m_cpt_cleanup_fsm_n_dir_lock    = 0 ;                                                     
-            m_cpt_multi_ack_fsm_dir_lock    = 0 ;                                                 
-            m_cpt_multi_ack_fsm_n_dir_lock  = 0 ;                                                     
-                                                                                            
-            m_cpt_dir_unused                = 0 ;                                                             
-            m_cpt_read_fsm_dir_used         = 0 ;                                                             
-            m_cpt_write_fsm_dir_used        = 0 ;                                                     
-            m_cpt_cas_fsm_dir_used          = 0 ;                                             
-            m_cpt_xram_rsp_fsm_dir_used     = 0 ;                                                 
-            m_cpt_cleanup_fsm_dir_used      = 0 ;                                                 
-            m_cpt_multi_ack_fsm_dir_used    = 0 ;                                                         
-                                                                                                                        
-            m_cpt_read_fsm_trt_lock         = 0 ;                                                 
-            m_cpt_write_fsm_trt_lock        = 0 ;                                                         
-            m_cpt_cas_fsm_trt_lock          = 0 ;                                                         
-            m_cpt_xram_rsp_fsm_trt_lock     = 0 ;                                                     
-            m_cpt_ixr_fsm_trt_lock          = 0 ;                                                     
-                                                                                         
-            m_cpt_read_fsm_n_trt_lock       = 0 ;                                             
-            m_cpt_write_fsm_n_trt_lock      = 0 ;                                                         
-            m_cpt_cas_fsm_n_trt_lock        = 0 ;                                                     
-            m_cpt_xram_rsp_fsm_n_trt_lock   = 0 ;                                         
-            m_cpt_ixr_cmd_fsm_n_trt_lock    = 0 ;                                                             
-            m_cpt_ixr_rsp_fsm_n_trt_lock    = 0 ;                                                     
-                                                                                         
-            m_cpt_read_fsm_trt_used         = 0 ;                                                     
-            m_cpt_write_fsm_trt_used        = 0 ;                                                         
-            m_cpt_cas_fsm_trt_used          = 0 ;                                             
-            m_cpt_xram_rsp_fsm_trt_used     = 0 ;                                                     
-            m_cpt_ixr_cmd_fsm_trt_used      = 0 ;                                                 
-            m_cpt_ixr_rsp_fsm_trt_used      = 0 ;                                                     
-            m_cpt_cleanup_fsm_trt_used      = 0 ;                                             
-                                                                                                                 
-            m_cpt_trt_unused                = 0 ;                                                 
-                                                                                        
-            m_cpt_cleanup_fsm_ivt_lock      = 0 ;                                             
-            m_cpt_cleanup_fsm_n_ivt_lock    = 0 ;                                                         
-                                                                                         
-            m_cpt_multi_ack_fsm_ivt_lock    = 0 ;                                                 
-            m_cpt_multi_ack_fsm_n_ivt_lock  = 0 ;                                             
-                                                                                        
-            m_cpt_ivt_unused                = 0 ;                             
-                                                                                         
-            m_cpt_read_fsm_heap_lock        = 0 ;                                                     
-            m_cpt_write_fsm_heap_lock       = 0 ;                                                 
-            m_cpt_cas_fsm_heap_lock         = 0 ;                                             
-            m_cpt_cleanup_fsm_heap_lock     = 0 ;                                                         
-            m_cpt_xram_rsp_fsm_heap_lock    = 0 ;                                                             
-            m_cpt_multi_ack_fsm_heap_lock   = 0 ;                                                 
-                                                                                        
-            m_cpt_read_fsm_n_heap_lock      = 0 ;                                                 
-            m_cpt_write_fsm_n_heap_lock     = 0 ;                                             
-            m_cpt_cas_fsm_n_heap_lock       = 0 ;                                                     
-            m_cpt_cleanup_fsm_n_heap_lock   = 0 ;                                                     
-            m_cpt_xram_rsp_fsm_n_heap_lock  = 0 ;                                                         
-            m_cpt_multi_ack_fsm_n_heap_lock = 0 ;                                                         
-                                                                                                                     
-            m_cpt_read_fsm_heap_used        = 0 ;                                                 
-            m_cpt_write_fsm_heap_used       = 0 ;                                                 
-            m_cpt_cas_fsm_heap_used         = 0 ;                                             
-            m_cpt_cleanup_fsm_heap_used     = 0 ;                                         
-            m_cpt_xram_rsp_fsm_heap_used    = 0 ;                                         
-            m_cpt_multi_ack_fsm_heap_used   = 0 ;                                                     
-                                                                                         
-            m_cpt_heap_unused               = 0 ;                     
-            m_cpt_slot_inval                = 0 ;
+            m_cpt_reset_count               = 0;
+            m_cpt_read_local                = 0;
+            m_cpt_read_remote               = 0;
+            m_cpt_read_cost                 = 0;
+
+            m_cpt_write_local               = 0;
+            m_cpt_write_remote              = 0;
+            m_cpt_write_flits_local         = 0;
+            m_cpt_write_flits_remote        = 0;
+            m_cpt_write_cost                = 0;
+
+            m_cpt_ll_local                  = 0;
+            m_cpt_ll_remote                 = 0;
+            m_cpt_ll_cost                   = 0;
+
+            m_cpt_sc_local                  = 0;
+            m_cpt_sc_remote                 = 0;
+            m_cpt_sc_cost                   = 0;
+
+            m_cpt_cas_local                 = 0;
+            m_cpt_cas_remote                = 0;
+            m_cpt_cas_cost                  = 0;
+
+            m_cpt_minval                    = 0;
+            m_cpt_minval_local              = 0;
+            m_cpt_minval_remote             = 0;
+            m_cpt_minval_cost               = 0;
+
+            m_cpt_binval                    = 0;
+            m_cpt_write_broadcast           = 0;
+            m_cpt_getm_broadcast            = 0;
+
+            m_cpt_cleanup_local             = 0;
+            m_cpt_cleanup_remote            = 0;
+            m_cpt_cleanup_cost              = 0;
+            m_cpt_cleanup_data_local        = 0;
+            m_cpt_cleanup_data_remote       = 0;
+            m_cpt_cleanup_data_cost         = 0;
+
+            m_cpt_read_miss                 = 0;
+            m_cpt_write_miss                = 0;
+            m_cpt_write_dirty               = 0;
+            m_cpt_getm_miss                 = 0;
+
+            m_cpt_getm_local                = 0;
+            m_cpt_getm_remote               = 0;
+            m_cpt_getm_cost                 = 0;
+
+            m_cpt_inval_ro_local            = 0;
+            m_cpt_inval_ro_remote           = 0;
+            m_cpt_inval_ro_cost             = 0;
+
+            m_cpt_trt_rb                    = 0;
+            m_cpt_trt_full                  = 0;
+            m_cpt_put                       = 0;
+            m_cpt_get                       = 0;
+
+            m_cpt_heap_unused               = 0;
+            m_cpt_slot_inval                = 0;
+
             return;
         }
@@ -1515,5 +1295,5 @@
 
 #if DEBUG_MEMC_GLOBAL
-        if(m_debug)
+        if (m_debug)
         {
             std::cout
@@ -1565,9 +1345,9 @@
             //////////////////
             case TGT_CMD_IDLE:     // waiting a VCI command (RAM or CONFIG)
-                if(p_vci_tgt.cmdval)
+                if (p_vci_tgt.cmdval)
                 {
 
 #if DEBUG_MEMC_TGT_CMD
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name()
                             << " TGT_CMD_IDLE> Receive command from srcid "
@@ -1587,5 +1367,5 @@
                         {
                             found = true;
-                            if ( m_seg[seg_id]->special() ) config = true;
+                            if (m_seg[seg_id]->special() ) config = true;
                         }
                     }
@@ -1593,14 +1373,14 @@
                     if (!found)                /////////// out of segment error
                     {
-                        r_tgt_cmd_fsm   = TGT_CMD_ERROR;
-                    }
-                    else if ( config )              /////////// configuration command
+                        r_tgt_cmd_fsm = TGT_CMD_ERROR;
+                    }
+                    else if (config )              /////////// configuration command
                     {
                         if (!p_vci_tgt.eop.read()) r_tgt_cmd_fsm = TGT_CMD_ERROR;
-                        else                            r_tgt_cmd_fsm = TGT_CMD_CONFIG;
+                        else                       r_tgt_cmd_fsm = TGT_CMD_CONFIG;
                     }
                     else                            //////////// memory access 
                     {
-                        if ( p_vci_tgt.cmd.read() == vci_param_int::CMD_READ )
+                        if (p_vci_tgt.cmd.read() == vci_param_int::CMD_READ)
                         {
                             // check that the pktid is either :
@@ -1615,5 +1395,5 @@
                             r_tgt_cmd_fsm = TGT_CMD_READ;
                         }
-                        else if(p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)
+                        else if (p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)
                         {
                           // check that the pktid is TYPE_WRITE
@@ -1622,5 +1402,5 @@
                             r_tgt_cmd_fsm = TGT_CMD_WRITE;
                         }
-                        else if(p_vci_tgt.cmd.read() == vci_param_int::CMD_LOCKED_READ)
+                        else if (p_vci_tgt.cmd.read() == vci_param_int::CMD_LOCKED_READ)
                         {
                             // check that the pktid is TYPE_LL
@@ -1631,5 +1411,5 @@
                             r_tgt_cmd_fsm = TGT_CMD_READ;
                         }
-                        else if(p_vci_tgt.cmd.read() == vci_param_int::CMD_NOP)
+                        else if (p_vci_tgt.cmd.read() == vci_param_int::CMD_NOP)
                         {
                             // check that the pktid is either :
@@ -1642,6 +1422,6 @@
                                     "The type specified in the pktid field is incompatible with the NOP CMD");
 
-                            if((p_vci_tgt.pktid.read() & 0x7) == TYPE_CAS) r_tgt_cmd_fsm = TGT_CMD_CAS;
-                            else                                           r_tgt_cmd_fsm = TGT_CMD_WRITE; 
+                            if ((p_vci_tgt.pktid.read() & 0x7) == TYPE_CAS) r_tgt_cmd_fsm = TGT_CMD_CAS;
+                            else                                            r_tgt_cmd_fsm = TGT_CMD_WRITE; 
                         }
                         else
@@ -1657,8 +1437,8 @@
 
                 // wait if pending request
-                if(r_tgt_cmd_to_tgt_rsp_req.read()) break;
+                if (r_tgt_cmd_to_tgt_rsp_req.read()) break;
 
                 // consume all the command packet flits before sending response error
-                if ( p_vci_tgt.cmdval and p_vci_tgt.eop )
+                if (p_vci_tgt.cmdval and p_vci_tgt.eop)
                 {
                     r_tgt_cmd_to_tgt_rsp_srcid = p_vci_tgt.srcid.read();
@@ -1670,5 +1450,5 @@
 
 #if DEBUG_MEMC_TGT_CMD
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name()
                             << " TGT_CMD_ERROR> Segmentation violation:"
@@ -1885,5 +1665,5 @@
                     uint32_t wdata = p_vci_tgt.wdata.read();     
 
-                    if ( (p_vci_tgt.cmd.read() == vci_param_int::CMD_READ)         // get lock
+                    if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_READ)         // get lock
                             and (cell == MEMC_LOCK) )
                     {
@@ -1893,5 +1673,5 @@
                         r_config_lock    = true;
                     }
-                    else if ( (p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)  // release lock
+                    else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)  // release lock
                             and (cell == MEMC_LOCK))
                     {
@@ -1900,5 +1680,5 @@
                         r_config_lock    = false;
                     }
-                    else if ( (p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set addr_lo
+                    else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set addr_lo
                             and (cell == MEMC_ADDR_LO))
                     {
@@ -1911,5 +1691,5 @@
                             ((addr_t)wdata);
                     }
-                    else if ( (p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set addr_hi
+                    else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set addr_hi
                             and (cell == MEMC_ADDR_HI))
                     {
@@ -1919,5 +1699,5 @@
                             (((addr_t) wdata) << 32);
                     }
-                    else if ( (p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set buf_lines
+                    else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set buf_lines
                             and (cell == MEMC_BUF_LENGTH))
                     {
@@ -1929,5 +1709,5 @@
                         r_config_rsp_lines  = 0;
                     }
-                    else if ( (p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set cmd type
+                    else if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_WRITE)   // set cmd type
                             and (cell == MEMC_CMD_TYPE))
                     {
@@ -1945,8 +1725,8 @@
                     }
 
-                    if ( need_rsp )
+                    if (need_rsp )
                     {
                         // blocked if previous pending request to TGT_RSP FSM
-                        if ( r_tgt_cmd_to_tgt_rsp_req.read() ) break;
+                        if (r_tgt_cmd_to_tgt_rsp_req.read() ) break;
 
                         r_tgt_cmd_to_tgt_rsp_srcid = p_vci_tgt.srcid.read();
@@ -1964,5 +1744,5 @@
 
 #if DEBUG_MEMC_TGT_CMD
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " TGT_CMD_CONFIG> Configuration request:"
                             << " address = " << std::hex << p_vci_tgt.address.read()
@@ -1978,5 +1758,5 @@
 
                 // check that the read does not cross a cache line limit.
-                if ( ((m_x[(addr_t) p_vci_tgt.address.read()]+ (p_vci_tgt.plen.read() >>2)) > 16) and
+                if (((m_x[(addr_t) p_vci_tgt.address.read()]+ (p_vci_tgt.plen.read() >>2)) > 16) and
                         (p_vci_tgt.cmd.read() != vci_param_int::CMD_LOCKED_READ))
                 {
@@ -1986,5 +1766,5 @@
                 }
                 // check single flit
-                if(!p_vci_tgt.eop.read())
+                if (!p_vci_tgt.eop.read())
                 {
                     std::cout << "VCI_MEM_CACHE ERROR " << name() << " TGT_CMD_READ state"
@@ -1993,5 +1773,5 @@
                 } 
                 // check plen for LL
-                if ( (p_vci_tgt.cmd.read() == vci_param_int::CMD_LOCKED_READ) and 
+                if ((p_vci_tgt.cmd.read() == vci_param_int::CMD_LOCKED_READ) and 
                         (p_vci_tgt.plen.read() != 8) )
                 {
@@ -2001,9 +1781,9 @@
                 }
 
-                if ( p_vci_tgt.cmdval and m_cmd_read_addr_fifo.wok() )
+                if (p_vci_tgt.cmdval and m_cmd_read_addr_fifo.wok() )
                 {
 
 #if DEBUG_MEMC_TGT_CMD
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " TGT_CMD_READ> Push into read_fifo:"
                             << " address = " << std::hex << p_vci_tgt.address.read()
@@ -2016,29 +1796,40 @@
                     // <Activity counters>
                     if (p_vci_tgt.cmd.read() == vci_param_int::CMD_LOCKED_READ) {
-                        if (is_local_req(p_vci_tgt.srcid.read())) m_cpt_ll_local++;
-                        else                                      m_cpt_ll_remote++;
-                        m_cpt_ll_cost += req_distance(p_vci_tgt.srcid.read()); // LL on a single word
-                    }
-                    else {
-                        if ((p_vci_tgt.pktid.read() & 0x7) == TYPE_WRITE)
-                        {
-                            if ((p_vci_tgt.pktid.read() & 0x8) == 0x8)
-                            {
-                                if (is_local_req(p_vci_tgt.srcid.read())) m_cpt_getm_hit_local++;
-                                else                                      m_cpt_getm_hit_remote++;
-                            }
-                            else
-                            {
-                                if (is_local_req(p_vci_tgt.srcid.read())) m_cpt_getm_miss_local++;
-                                else                                      m_cpt_getm_miss_remote++;
-                            }
-                            m_cpt_getm_cost += req_distance(p_vci_tgt.srcid.read());
+                        if (is_local_req(p_vci_tgt.srcid.read()))
+                        {
+                            m_cpt_ll_local++;
                         }
                         else
                         {
-                            if (is_local_req(p_vci_tgt.srcid.read())) m_cpt_read_miss_local++;
-                            else                                      m_cpt_read_miss_remote++;
-                            m_cpt_read_miss_cost += req_distance(p_vci_tgt.srcid.read());
-                        }
+                            m_cpt_ll_remote++;
+                        }
+                        // (1 (CMD) + 2 (RSP)) VCI flits for LL => 2 + 3 dspin flits
+                        m_cpt_ll_cost += 5 * req_distance(p_vci_tgt.srcid.read()); // LL on a single word
+                    }
+                    else if ((p_vci_tgt.pktid.read() & 0x7) == TYPE_WRITE)
+                    {
+                        if (is_local_req(p_vci_tgt.srcid.read())) 
+                        {
+                            m_cpt_getm_local++;
+                        }
+                        else
+                        {
+                            m_cpt_getm_remote++;
+                        }
+                        // (1 (CMD) + m_words (RSP)) flits VCI => 2 + m_words + 1 flits dspin
+                        m_cpt_getm_cost += (3 + m_words) * req_distance(p_vci_tgt.srcid.read());
+                    }
+                    else
+                    {
+                        if (is_local_req(p_vci_tgt.srcid.read()))
+                        {
+                            m_cpt_read_local++;
+                        }
+                        else
+                        {
+                            m_cpt_read_remote++;
+                        }
+                        // (1 (CMD) + m_words (RSP)) flits VCI => 2 + m_words + 1 flits dspin
+                        m_cpt_read_cost += (3 + m_words) * req_distance(p_vci_tgt.srcid.read());
                     }
                     // </Activity counters>
@@ -2049,9 +1840,9 @@
                 ///////////////////
             case TGT_CMD_WRITE:
-                if(p_vci_tgt.cmdval and m_cmd_write_addr_fifo.wok())
-                {
-
+                if (p_vci_tgt.cmdval and m_cmd_write_addr_fifo.wok())
+                {
+                    uint32_t plen = p_vci_tgt.plen.read();
 #if DEBUG_MEMC_TGT_CMD
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " TGT_CMD_WRITE> Push into write_fifo:"
                             << " address = " << std::hex << p_vci_tgt.address.read()
@@ -2061,15 +1852,23 @@
                             << " / wdata = " << p_vci_tgt.wdata.read()
                             << " / be = " << p_vci_tgt.be.read()
-                            << " / plen = " << std::dec << p_vci_tgt.plen.read() << std::endl;
+                            << " / plen = " << std::dec << plen << std::endl;
 #endif
                     cmd_write_fifo_put = true;
                     // <Activity counters>
                     if (p_vci_tgt.cmd.read() == vci_param_int::CMD_NOP) {
-                        m_cpt_sc_cost += req_distance(p_vci_tgt.srcid.read());
+                        // (2 (CMD) + 1 (RSP)) flits VCI => 4 + (1 (success) || 2 (failure)) flits dspin
+                        m_cpt_sc_cost += 5 * req_distance(p_vci_tgt.srcid.read());
                     }
                     else {
-                        if (is_local_req(p_vci_tgt.srcid.read())) m_cpt_write_flits_local++;
-                        else                                      m_cpt_write_flits_remote++;
-                        m_cpt_write_cost += req_distance(p_vci_tgt.srcid.read());
+                        if (is_local_req(p_vci_tgt.srcid.read()))
+                        {
+                            m_cpt_write_flits_local++;
+                        }
+                        else 
+                        {
+                            m_cpt_write_flits_remote++;
+                        }
+                        // (burst_size (CMD) + 1 (RSP) flits VCI => 2 + burst_size + 1 flits dspin
+                        m_cpt_write_cost += (3 + (plen >> 2)) * req_distance(p_vci_tgt.srcid.read());
                     }
                     // </Activity counters>
@@ -2078,11 +1877,22 @@
                         // <Activity counters>
                         if (p_vci_tgt.cmd.read() == vci_param_int::CMD_NOP) {
-                            if (is_local_req(p_vci_tgt.srcid.read())) m_cpt_sc_local++;
-                            else                                      m_cpt_sc_remote++;
-
+                            if (is_local_req(p_vci_tgt.srcid.read())) 
+                            {
+                                m_cpt_sc_local++;
+                            }
+                            else
+                            {
+                                m_cpt_sc_remote++;
+                            }
                         }
                         else {
-                            if (is_local_req(p_vci_tgt.srcid.read())) m_cpt_write_local++;
-                            else                                      m_cpt_write_remote++;
+                            if (is_local_req(p_vci_tgt.srcid.read())) 
+                            {
+                                m_cpt_write_local++;
+                            }
+                            else
+                            {
+                                m_cpt_write_remote++;
+                            }
                         }
                         // </Activity counters>
@@ -2093,5 +1903,5 @@
                 /////////////////
             case TGT_CMD_CAS:
-                if((p_vci_tgt.plen.read() != 8) and (p_vci_tgt.plen.read() != 16))
+                if ((p_vci_tgt.plen.read() != 8) and (p_vci_tgt.plen.read() != 16))
                 {
                     std::cout << "VCI_MEM_CACHE ERROR " << name() << " TGT_CMD_CAS state"
@@ -2100,9 +1910,9 @@
                 }
 
-                if(p_vci_tgt.cmdval and m_cmd_cas_addr_fifo.wok())
+                if (p_vci_tgt.cmdval and m_cmd_cas_addr_fifo.wok())
                 {
 
 #if DEBUG_MEMC_TGT_CMD
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " TGT_CMD_CAS> Pushing command into cmd_cas_fifo:"
                             << " address = " << std::hex << p_vci_tgt.address.read()
@@ -2117,7 +1927,14 @@
                     if (p_vci_tgt.eop) {
                         // <Activity counters>
-                        if (is_local_req(p_vci_tgt.srcid.read())) m_cpt_cas_local++;
-                        else                                      m_cpt_cas_remote++;
-                        m_cpt_cas_cost += req_distance(p_vci_tgt.srcid.read());
+                        if (is_local_req(p_vci_tgt.srcid.read()))
+                        {
+                            m_cpt_cas_local++;
+                        }
+                        else
+                        {
+                            m_cpt_cas_remote++;
+                        }
+                        // (2 (CMD) + 1 (RSP)) flits VCI => 4 + (1 (success) || 2 (failure)) flits dspin
+                        m_cpt_cas_cost += 5 * req_distance(p_vci_tgt.srcid.read());
                         // </Activity counters>
                         r_tgt_cmd_fsm = TGT_CMD_IDLE;
@@ -2151,14 +1968,14 @@
                     uint64_t flit = m_cc_receive_to_multi_ack_fifo.read();
 
-                    if( not multi_ack_fifo_rok )
+                    if (not multi_ack_fifo_rok)
                         break;
 
-                    size_t ivt_index    = DspinDhccpParam::dspin_get(flit,
-                                    DspinDhccpParam::MULTI_ACK_UPDT_INDEX);
-
-                    bool miss_updt    = DspinDhccpParam::dspin_get(flit,
-                                    DspinDhccpParam::MULTI_ACK_UPDT_MISS);
-
-                    bool eop = DspinDhccpParam::dspin_get(flit, DspinDhccpParam::P2M_EOP) == 0x1;
+                    size_t ivt_index = DspinHmesiParam::dspin_get(flit,
+                                    DspinHmesiParam::MULTI_ACK_UPDT_INDEX);
+
+                    bool miss_updt = DspinHmesiParam::dspin_get(flit,
+                                    DspinHmesiParam::MULTI_ACK_UPDT_MISS);
+
+                    bool eop = DspinHmesiParam::dspin_get(flit, DspinHmesiParam::P2M_EOP) == 0x1;
 
                     cc_receive_to_multi_ack_fifo_get = true;
@@ -2171,24 +1988,18 @@
                     r_multi_ack_miss_updt = miss_updt;
 
-                    if(miss_updt)
-                        m_cpt_multi_ack_miss ++;
-                    else
-                        m_cpt_multi_ack_hit ++;
-
-                    if( not eop)
-                    {
-                        r_multi_ack_fsm = MULTI_ACK_GET_DATA;
+                    if (not eop)
+                    {
                         r_multi_ack_need_data = true;
                         r_multi_ack_data_index = 0;
-                        m_cpt_multi_ack_hit_with_data ++;
+                        r_multi_ack_fsm = MULTI_ACK_GET_DATA;
                     }
                     else
                     {
+                        r_multi_ack_need_data = false;
                         r_multi_ack_fsm = MULTI_ACK_DIR_REQ;
-                        r_multi_ack_need_data = false;
                     }
 
 #if DEBUG_MEMC_MULTI_ACK
-                    if(m_debug)
+                    if (m_debug)
                     {
                         if (multi_ack_fifo_rok)
@@ -2211,9 +2022,9 @@
 
                         uint32_t data = 
-                            DspinDhccpParam::dspin_get (flit, DspinDhccpParam::CLEANUP_DATA_UPDT);
-
-                        bool eop = DspinDhccpParam::dspin_get(flit, DspinDhccpParam::P2M_EOP) == 0x1;
+                            DspinHmesiParam::dspin_get (flit, DspinHmesiParam::CLEANUP_DATA_UPDT);
+
+                        bool eop = DspinHmesiParam::dspin_get(flit, DspinHmesiParam::P2M_EOP) == 0x1;
 #if DEBUG_MEMC_CLEANUP
-                        if(m_debug)
+                        if (m_debug)
                         {
                             std::cout
@@ -2242,13 +2053,10 @@
             case MULTI_ACK_IVT_LOCK:
                 {
-                    m_cpt_multi_ack_fsm_ivt_lock ++;
-                    if(r_alloc_ivt_fsm.read() != ALLOC_IVT_MULTI_ACK)  break;
-
-                    m_cpt_multi_ack_fsm_n_ivt_lock ++;
+                    if (r_alloc_ivt_fsm.read() != ALLOC_IVT_MULTI_ACK)  break;
 
                     assert( r_alloc_dir_fsm.read() == ALLOC_DIR_MULTI_ACK && " BAD ALLOC_DIR_MULTI_ACK IN MULTI_ACK_IVT_LOCK STATE");
-                    size_t index  = r_multi_ack_ivt_index.read();
-                    size_t count  = m_ivt.count(index);
-                    size_t nline  = m_ivt.nline(index);
+                    size_t index = r_multi_ack_ivt_index.read();
+                    size_t count = m_ivt.count(index);
+                    size_t nline = m_ivt.nline(index);
                     r_multi_ack_nline = nline;
                     r_multi_ack_srcid = m_ivt.srcid(index);
@@ -2256,21 +2064,52 @@
                     r_multi_ack_pktid = m_ivt.pktid(index);
                     r_multi_ack_rsp   = m_ivt.need_rsp(index);
-                    //bool is_valid = m_ivt.is_valid(index);
-
-                    // if(r_multi_ack_miss_updt.read())
-                    //{
-                        r_multi_ack_fsm = MULTI_ACK_DIR_LOCK; // this way may be bring about the problem of critical path
-                    //}                    
-                    //else
-                    //{
-                        bool is_updt  = m_ivt.is_update(index);
+                    uint32_t srcid = m_ivt.srcid(index);
                     
-                        assert(is_updt && "MULTI_ACK: is not an updt index for a multi ack rsp");
-                        assert(count == 1 && "there is only one copy in the memc");
-
-                    //  r_multi_ack_fsm = MULTI_ACK_IVT_CLEAR;
+                    // <Activity Counters>
+                    // We count "read-only invalidations" at the same place as
+                    // multi ack.
+                    // The idea is that a RO inval is always responded by a multi ack,
+                    // and that a multi ack is sent only for inval RO.
+                    // Thus, we add one to the cost for the inval RO fleet, and
+                    // depending on the response, we add either 1 or m_words + 1 for the cost for the multi ack flits
+                    if (r_multi_ack_need_data.read())
+                    {
+                        // multi_ack with data
+                        if (is_local_req(srcid))
+                        {
+                            m_cpt_inval_ro_local++;
+                        }
+                        else
+                        {
+                            m_cpt_inval_ro_remote++;
+                        }
+                        // 2 flits for inval RO + (m_words + 1) flits for the multi ack
+                        m_cpt_inval_ro_cost += (m_words + 1) * req_distance(srcid);
+                    }
+                    else
+                    {
+                        // multi_ack without data
+                        if (is_local_req(srcid))
+                        {
+                            m_cpt_inval_ro_local++;
+                        }
+                        else
+                        {
+                            m_cpt_inval_ro_remote++;
+                        }
+                        // 2 flits for inval RO + 1 flit for the multi ack
+                        m_cpt_inval_ro_cost += 3 * req_distance(srcid); // 1 flit
+                    }
+                    // </Activity Counters>
+
+
+                    r_multi_ack_fsm = MULTI_ACK_DIR_LOCK; // this way may be bring about the problem of critical path
+                    bool is_updt  = m_ivt.is_update(index);
+                    
+                    assert(is_updt && "MULTI_ACK: is not an updt index for a multi ack rsp");
+                    assert(count == 1 && "there is only one copy in the memc");
 
 #if DEBUG_MEMC_MULTI_ACK
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name()
                             << " MULTI_ACK_IVT_LOCK> "
@@ -2283,5 +2122,5 @@
             case MULTI_ACK_IVT_CLEAR:
                 {
-                    if(r_alloc_ivt_fsm.read() != ALLOC_IVT_MULTI_ACK ) 
+                    if (r_alloc_ivt_fsm.read() != ALLOC_IVT_MULTI_ACK ) 
                     {
                         std::cout
@@ -2297,5 +2136,5 @@
             
 #if DEBUG_MEMC_MULTI_ACK
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name()
                             << " MULTI_ACK_IVT_CLEAR> IVT clear:"
@@ -2308,13 +2147,11 @@
             case MULTI_ACK_DIR_REQ:   // Get the lock to the directory
                 {
-                    m_cpt_multi_ack_fsm_dir_lock ++;
-                    if(r_alloc_dir_fsm.read() != ALLOC_DIR_MULTI_ACK) break;
+                    if (r_alloc_dir_fsm.read() != ALLOC_DIR_MULTI_ACK) break;
 
                     r_multi_ack_fsm = MULTI_ACK_IVT_LOCK;
                     //std::cout << " MEM_CACHE : CLEANUP_DIR_REQ" << std::endl;
-                    m_cpt_multi_ack_fsm_n_dir_lock ++;
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " MULTI_ACK_DIR_REQ> Requesting DIR lock" << std::endl;
 #endif
@@ -2325,5 +2162,5 @@
             case MULTI_ACK_DIR_LOCK: //updt data with the registers which have saved the set and way
                 {
-                    if(r_alloc_dir_fsm.read() != ALLOC_DIR_MULTI_ACK)
+                    if (r_alloc_dir_fsm.read() != ALLOC_DIR_MULTI_ACK)
                     {
                         std::cout
@@ -2349,5 +2186,5 @@
 
 #if DEBUG_MEMC_MULTI_ACK
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout
@@ -2365,25 +2202,25 @@
                     }
 #endif
-                    assert( (entry.state == ENTRY_LOCKED) && "mutli rsp check the entry, the line is not locked!!!");
+                    assert((entry.state == ENTRY_LOCKED) && "multi rsp check the entry, the line is not locked!!!");
                         
-                    if(r_multi_ack_miss_updt.read() and entry.count) //cache L1 has sent the cleanup when it receives the cc_updt request,
+                    if (r_multi_ack_miss_updt.read() and entry.count) //cache L1 has sent the cleanup when it receives the cc_updt request,
                     {
                         r_multi_ack_fsm = MULTI_ACK_IVT_CHANGE; 
                     }
-                    else if( not entry.count or match_ll) // The line has been already evicted from cache L1
+                    else if (not entry.count or match_ll) // The line has been already evicted from cache L1
                     {
                         assert(((entry.count == 1) or (entry.count == 0)) && "multi ack for a ll request, count is 1");
-                        r_multi_ack_fsm        = MULTI_ACK_DIR_UPDT;
+                        r_multi_ack_fsm = MULTI_ACK_DIR_UPDT;
                     }
                     else
                     {
-                        r_multi_ack_fsm        = MULTI_ACK_HEAP_REQ;
+                        r_multi_ack_fsm = MULTI_ACK_HEAP_REQ;
                     }
                     break;
                 }
                 /////////////
-            case MULTI_ACK_IVT_CHANGE:   // release all locks and retry from beginning
+            case MULTI_ACK_IVT_CHANGE:
                 {                  
-                    if(r_alloc_ivt_fsm.read() != ALLOC_IVT_MULTI_ACK ) 
+                    if (r_alloc_ivt_fsm.read() != ALLOC_IVT_MULTI_ACK) 
                     {
                         std::cout
@@ -2396,5 +2233,5 @@
                     m_ivt.change(r_multi_ack_ivt_index.read());
 #if DEBUG_MEMC_MULTI_ACK
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout << "  <MEMC " << name()
@@ -2408,5 +2245,5 @@
             case MULTI_ACK_DIR_UPDT:
                 {
-                    if(r_alloc_dir_fsm.read() != ALLOC_DIR_MULTI_ACK)
+                    if (r_alloc_dir_fsm.read() != ALLOC_DIR_MULTI_ACK)
                     {
                         std::cout
@@ -2420,7 +2257,7 @@
                     bool match_ll = ((r_multi_ack_pktid.read() & 0x07) == TYPE_LL);
 
-                    if(r_multi_ack_need_data.read())
-                    {
-                        for(size_t word=0; word<m_words ; word++)
+                    if (r_multi_ack_need_data.read())
+                    {
+                        for (size_t word = 0; word<m_words; word++)
                         {
                             m_cache_data.write(r_multi_ack_way.read(), 
@@ -2429,45 +2266,33 @@
                                                r_multi_ack_data[word]);
                         }
-                       // addr_t min = r_multi_ack_nline.read()*m_words*4 ;
-                       // addr_t max = r_multi_ack_nline.read()*m_words*4 + (m_words - 1)*4;
-                       // m_llsc_table.sw(min, max);
- 
                     }
                     else
                     {
-                        m_cache_data.read_line( r_multi_ack_way.read(),
-                                                r_multi_ack_set.read(),
-                                                r_multi_ack_data);
+                        m_cache_data.read_line(r_multi_ack_way.read(),
+                                               r_multi_ack_set.read(),
+                                               r_multi_ack_data);
                     }
 
                     DirectoryEntry entry;
-                    entry.is_cnt         = false;
-                    entry.dirty          = r_multi_ack_dirty.read() or r_multi_ack_need_data.read();
-                    entry.tag            = r_multi_ack_tag.read();
-                    entry.lock           = r_multi_ack_lock.read();
-                    entry.ptr            = 0;
-
-                    if(match_ll)
-                    {
-                        entry.owner.srcid    = r_multi_ack_copy.read();
-                        entry.count          = r_multi_ack_count.read();
+                    entry.is_cnt = false;
+                    entry.dirty  = r_multi_ack_dirty.read() or r_multi_ack_need_data.read();
+                    entry.tag    = r_multi_ack_tag.read();
+                    entry.lock   = r_multi_ack_lock.read();
+                    entry.ptr    = 0;
+
+                    if (match_ll)
+                    {
+                        entry.owner.srcid = r_multi_ack_copy.read();
+                        entry.count       = r_multi_ack_count.read();
                     }
                     else
                     {
-                        entry.owner.srcid    = r_multi_ack_srcid.read();
-                        entry.count          = 1;
-                    }
-
-
-                   // if( (r_multi_ack_pktid.read() & 0x07) == 0x03 or match_ll)
-                   // {
-                        entry.state          = ENTRY_SHARED; // MISS INST
-                   // }
-                   //  else
-                   //  {
-                   //     entry.state          = ENTRY_EXCLUSIVE; // MISS DATA 
-                   // }
-
-                    if((r_multi_ack_pktid.read() & 0x7) == 0x03) 
+                        entry.owner.srcid = r_multi_ack_srcid.read();
+                        entry.count       = 1;
+                    }
+
+                    entry.state = ENTRY_SHARED; // MISS INST
+
+                    if ((r_multi_ack_pktid.read() & 0x7) == 0x03) 
                     {
                         entry.owner.inst = true;
@@ -2483,5 +2308,5 @@
                     r_multi_ack_fsm      = MULTI_ACK_IVT_CLEAR;
 #if DEBUG_MEMC_MULTI_ACK
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout << "  <MEMC " << name() << " MULTI_ACK_DIR_UPDT>"
@@ -2499,41 +2324,33 @@
                 // wait if pending request to the TGT_RSP FSM
                 {
-                    if(r_multi_ack_to_tgt_rsp_req.read()) break;
-
-                    for(size_t i = 0; i<m_words; i++)
+                    if (r_multi_ack_to_tgt_rsp_req.read()) break;
+
+                    for (size_t i = 0; i<m_words; i++)
                     {
                         r_multi_ack_to_tgt_rsp_data[i] = r_multi_ack_data[i].read();
                     }
                     // no pending request
-                    r_multi_ack_to_tgt_rsp_req     = true;
-                    if( r_read_to_multi_ack_req.read() and (r_read_to_multi_ack_nline.read() == r_multi_ack_nline.read()))
-                    {
-                        r_multi_ack_to_tgt_rsp_word    = r_read_to_multi_ack_first_word.read();
-                        r_multi_ack_to_tgt_rsp_length  = r_read_to_multi_ack_length.read();
-                        r_read_to_multi_ack_req        = false;
+                    r_multi_ack_to_tgt_rsp_req = true;
+                    if (r_read_to_multi_ack_req.read() and (r_read_to_multi_ack_nline.read() == r_multi_ack_nline.read()))
+                    {
+                        r_multi_ack_to_tgt_rsp_word   = r_read_to_multi_ack_first_word.read();
+                        r_multi_ack_to_tgt_rsp_length = r_read_to_multi_ack_length.read();
+                        r_read_to_multi_ack_req       = false;
                     }
                     else
                     {
-                        r_multi_ack_to_tgt_rsp_word    = 0;
-                        r_multi_ack_to_tgt_rsp_length  = 16;
-                    }
-
-                    r_multi_ack_to_tgt_ll_key      = r_read_to_multi_ack_ll_key.read();
-                    r_multi_ack_to_tgt_rsp_srcid   = r_multi_ack_srcid.read();
-                    r_multi_ack_to_tgt_rsp_trdid   = r_multi_ack_trdid.read();
-
-                   // if(r_multi_ack_rsp_shared.read()) // rsp read with shared or exclusive state
-                   // {
-                        r_multi_ack_to_tgt_rsp_pktid = r_multi_ack_pktid.read();
-                   // }
-                   // else
-                   //{
-                   //    r_multi_ack_to_tgt_rsp_pktid = 0x08 + r_multi_ack_pktid.read();  
-                   //}
-
-                   r_multi_ack_fsm = MULTI_ACK_IDLE;
+                        r_multi_ack_to_tgt_rsp_word   = 0;
+                        r_multi_ack_to_tgt_rsp_length = 16;
+                    }
+
+                    r_multi_ack_to_tgt_ll_key    = r_read_to_multi_ack_ll_key.read();
+                    r_multi_ack_to_tgt_rsp_srcid = r_multi_ack_srcid.read();
+                    r_multi_ack_to_tgt_rsp_trdid = r_multi_ack_trdid.read();
+                    r_multi_ack_to_tgt_rsp_pktid = r_multi_ack_pktid.read();
+
+                    r_multi_ack_fsm = MULTI_ACK_IDLE;
 
 #if DEBUG_MEMC_MULTI_ACK
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " MULTI_ACK_RSP>"
                             << " Send a response to a previous read/ll request: "
@@ -2553,13 +2370,11 @@
             case MULTI_ACK_HEAP_REQ:    // Get the lock to the HEAP directory
                 {
-                    m_cpt_multi_ack_fsm_n_heap_lock ++;
-                    if(r_alloc_heap_fsm.read() == ALLOC_HEAP_MULTI_ACK)
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_MULTI_ACK)
                     {
                         r_multi_ack_fsm = MULTI_ACK_HEAP_LOCK;
                     }
 
-                    m_cpt_multi_ack_fsm_heap_lock ++;
 #if DEBUG_MEMC_MULTI_ACK
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " MULTI_ACK_HEAP_REQ>"
                             << " Requesting HEAP lock " << std::endl;
@@ -2571,10 +2386,10 @@
                 // and prepare the HEAP update
                 {
-                    if(r_alloc_heap_fsm.read() == ALLOC_HEAP_MULTI_ACK and 
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_MULTI_ACK and 
                        r_alloc_dir_fsm.read() == ALLOC_DIR_MULTI_ACK)
                     {
-                        if(r_multi_ack_need_data.read())
-                        {
-                            for(size_t word=0; word<m_words ; word++)
+                        if (r_multi_ack_need_data.read())
+                        {
+                            for (size_t word = 0; word < m_words ; word++)
                             {
                                 m_cache_data.write(r_multi_ack_way.read(), 
@@ -2583,15 +2398,10 @@
                                                    r_multi_ack_data[word]);
                             }
-
-                           // addr_t min = r_multi_ack_nline.read()*m_words*4 ;
-                           // addr_t max = r_multi_ack_nline.read()*m_words*4 + (m_words - 1)*4;
-                           // m_llsc_table.sw(min, max);
- 
                         }
                         else
                         {
-                            m_cache_data.read_line( r_multi_ack_way.read(),
-                                                    r_multi_ack_set.read(),
-                                                    r_multi_ack_data);
+                            m_cache_data.read_line(r_multi_ack_way.read(),
+                                                   r_multi_ack_set.read(),
+                                                   r_multi_ack_data);
                         }
 
@@ -2606,15 +2416,15 @@
                         entry.dirty  = r_multi_ack_dirty.read() or r_multi_ack_need_data.read();
                         entry.tag    = r_multi_ack_tag.read();
-                        if(not go_cnt)         // Not entering counter mode
-                        {
-                            entry.owner.srcid      = r_multi_ack_copy.read();
-                            entry.owner.inst       = r_multi_ack_copy_inst.read();
-                            entry.ptr              = m_heap.next_free_ptr();   // set pointer on the heap
-
-                            HeapEntry heap_entry   = m_heap.next_free_entry();
-
-                            r_multi_ack_next_ptr   = heap_entry.next;
-                            r_multi_ack_last_free  = (heap_entry.next == m_heap.next_free_ptr());
-                            r_multi_ack_fsm        = MULTI_ACK_HEAP_WRITE; // add an entry in the HEAP
+                        if (not go_cnt)         // Not entering counter mode
+                        {
+                            entry.owner.srcid = r_multi_ack_copy.read();
+                            entry.owner.inst  = r_multi_ack_copy_inst.read();
+                            entry.ptr         = m_heap.next_free_ptr();   // set pointer on the heap
+
+                            HeapEntry heap_entry = m_heap.next_free_entry();
+
+                            r_multi_ack_next_ptr  = heap_entry.next;
+                            r_multi_ack_last_free = (heap_entry.next == m_heap.next_free_ptr());
+                            r_multi_ack_fsm       = MULTI_ACK_HEAP_WRITE; // add an entry in the HEAP
                         }
                         else                // Entering Counter mode
@@ -2629,5 +2439,5 @@
 
 #if DEBUG_MEMC_MULTI_ACK
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " MULTI_ACK_HEAP_LOCK> Update directory:"
                                 << " tag = " << std::hex << entry.tag
@@ -2650,28 +2460,28 @@
             case MULTI_ACK_HEAP_WRITE:       // add an entry in the heap
                 {
-                    if(r_alloc_heap_fsm.read() == ALLOC_HEAP_MULTI_ACK and 
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_MULTI_ACK and 
                        r_alloc_dir_fsm.read() == ALLOC_DIR_MULTI_ACK)
                     {
                         HeapEntry heap_entry;
-                        heap_entry.owner.srcid    = r_multi_ack_srcid.read();
-
-                        if( (r_multi_ack_pktid.read() & 0x07) == 0x03)
-                        {
-                            heap_entry.owner.inst     = 1;
+                        heap_entry.owner.srcid = r_multi_ack_srcid.read();
+
+                        if ((r_multi_ack_pktid.read() & 0x07) == 0x03)
+                        {
+                            heap_entry.owner.inst = 1;
                         }
                         else
                         {
-                            heap_entry.owner.inst     = 0;
-                        }
-
-                        heap_entry.next           = m_heap.next_free_ptr();
+                            heap_entry.owner.inst = 0;
+                        }
+
+                        heap_entry.next = m_heap.next_free_ptr();
                         m_heap.write_free_entry(heap_entry);
                         m_heap.write_free_ptr(r_multi_ack_next_ptr.read());
-                        if(r_multi_ack_last_free.read())  m_heap.set_full();
+                        if (r_multi_ack_last_free.read())  m_heap.set_full();
 
                         r_multi_ack_fsm = MULTI_ACK_IVT_CLEAR;
 
 #if DEBUG_MEMC_MULTI_ACK
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " MULTI_ACK_HEAP_WRITE> Add an entry in the heap:"
                                 << " owner_id = " << std::hex << heap_entry.owner.srcid
@@ -2754,15 +2564,15 @@
         ////////////////////////////////////////////////////////////////////////////////////
 
-        switch( r_config_fsm.read() )
+        switch (r_config_fsm.read())
         {
             /////////////////
             case CONFIG_IDLE:  // waiting a config request 
                 {
-                    if ( r_config_cmd.read() != MEMC_CMD_NOP )  
-                    {
-                        r_config_fsm    = CONFIG_LOOP;
+                    if (r_config_cmd.read() != MEMC_CMD_NOP)  
+                    {
+                        r_config_fsm = CONFIG_LOOP;
 
 #if DEBUG_MEMC_CONFIG
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " CONFIG_IDLE> Config Request received" 
                                 << " address = " << std::hex << r_config_address.read()
@@ -2776,5 +2586,5 @@
             case CONFIG_LOOP:   // test last line to be handled 
                 {
-                    if ( r_config_cmd_lines.read() == 0 )
+                    if (r_config_cmd_lines.read() == 0)
                     {
                         r_config_cmd = MEMC_CMD_NOP;
@@ -2787,5 +2597,5 @@
 
 #if DEBUG_MEMC_CONFIG
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CONFIG_LOOP>" 
                             << " address = " << std::hex << r_config_address.read()    
@@ -2798,5 +2608,5 @@
             case CONFIG_WAIT:   // wait completion (last response) 
                 {
-                    if ( r_config_rsp_lines.read() == 0 )  // last response received
+                    if (r_config_rsp_lines.read() == 0)  // last response received
                     {
                         r_config_fsm = CONFIG_RSP;
@@ -2804,5 +2614,5 @@
 
 #if DEBUG_MEMC_CONFIG
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CONFIG_WAIT>" 
                             << " / lines to do = " << std::dec << r_config_rsp_lines.read() << std::endl;
@@ -2813,15 +2623,15 @@
             case CONFIG_RSP:  // request TGT_RSP FSM to return response 
                 {
-                    if ( not r_config_to_tgt_rsp_req.read() )
-                    {
-                        r_config_to_tgt_rsp_srcid  = r_config_srcid.read();
-                        r_config_to_tgt_rsp_trdid  = r_config_trdid.read();
-                        r_config_to_tgt_rsp_pktid  = r_config_pktid.read();
-                        r_config_to_tgt_rsp_error  = false;
-                        r_config_to_tgt_rsp_req    = true;
-                        r_config_fsm               = CONFIG_IDLE;
+                    if (not r_config_to_tgt_rsp_req.read() )
+                    {
+                        r_config_to_tgt_rsp_srcid = r_config_srcid.read();
+                        r_config_to_tgt_rsp_trdid = r_config_trdid.read();
+                        r_config_to_tgt_rsp_pktid = r_config_pktid.read();
+                        r_config_to_tgt_rsp_error = false;
+                        r_config_to_tgt_rsp_req   = true;
+                        r_config_fsm              = CONFIG_IDLE;
 
 #if DEBUG_MEMC_CONFIG
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " CONFIG_RSP> Request TGT_RSP FSM to return response:"
                                 << " error = " << r_config_to_tgt_rsp_error.read()
@@ -2838,5 +2648,5 @@
             case CONFIG_DIR_REQ:  // Request directory lock
                 {
-                    if ( r_alloc_dir_fsm.read() == ALLOC_DIR_CONFIG )
+                    if (r_alloc_dir_fsm.read() == ALLOC_DIR_CONFIG )
                     {
                         r_config_fsm = CONFIG_DIR_ACCESS;
@@ -2844,5 +2654,5 @@
 
 #if DEBUG_MEMC_CONFIG
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CONFIG_DIR_REQ>"
                             << " Request DIR access" << std::endl;
@@ -2871,12 +2681,12 @@
                             (r_config_cmd.read() == MEMC_CMD_INVAL)) 
                     {
-                        r_config_fsm    = CONFIG_IVT_LOCK;
-                    }
-                    else if ( (entry.state == ENTRY_SHARED or entry.state == ENTRY_EXCLUSIVE) and                       // hit & sync command
+                        r_config_fsm = CONFIG_IVT_LOCK;
+                    }
+                    else if ((entry.state == ENTRY_SHARED or entry.state == ENTRY_EXCLUSIVE) and                       // hit & sync command
                             entry.dirty and (r_config_cmd.read() == MEMC_CMD_SYNC) )
                     { 
                         r_config_fsm = CONFIG_TRT_LOCK;
                     }
-                    else if( entry.state == ENTRY_LOCKED)
+                    else if (entry.state == ENTRY_LOCKED)
                     {   // wait for unlock 
                         r_config_fsm = CONFIG_WAIT;
@@ -2891,5 +2701,5 @@
 
 #if DEBUG_MEMC_CONFIG
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CONFIG_DIR_ACCESS> Accessing directory: "
                             << " address = " << std::hex << r_config_address.read()
@@ -2912,10 +2722,10 @@
                             "MEMC ERROR in CONFIG_TRT_LOCK state: bad DIR allocation");
 
-                    if ( r_alloc_trt_fsm.read() == ALLOC_TRT_CONFIG )
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_CONFIG)
                     {
                         size_t index = 0;
-                        bool   wok   = not m_trt.full(index);
-
-                        if ( not wok )
+                        bool wok = not m_trt.full(index);
+
+                        if (not wok)
                         {
                             r_config_fsm = CONFIG_LOOP;
@@ -2923,6 +2733,6 @@
                         else
                         {
-                            size_t          way = r_config_dir_way.read();
-                            size_t          set = m_y[r_config_address.read()];
+                            size_t way = r_config_dir_way.read();
+                            size_t set = m_y[r_config_address.read()];
 
                             // reset dirty bit in DIR
@@ -2940,9 +2750,9 @@
 
                             r_config_trt_index = index;
-                            r_config_fsm       = CONFIG_TRT_SET;
+                            r_config_fsm = CONFIG_TRT_SET;
                         }
 
 #if DEBUG_MEMC_CONFIG
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " CONFIG_TRT_LOCK> Access TRT: "
                                 << " wok = " << std::dec << wok
@@ -2956,19 +2766,19 @@
                 // and post a PUT request in TRT
                 {
-                    assert( (r_alloc_dir_fsm.read() == ALLOC_DIR_CONFIG) and
+                    assert((r_alloc_dir_fsm.read() == ALLOC_DIR_CONFIG) and
                             "MEMC ERROR in CONFIG_TRT_SET state: bad DIR allocation");
 
-                    assert( (r_alloc_trt_fsm.read() == ALLOC_TRT_CONFIG) and
+                    assert((r_alloc_trt_fsm.read() == ALLOC_TRT_CONFIG) and
                             "MEMC ERROR in CONFIG_TRT_SET state: bad TRT allocation");
 
                     // read data into cache
-                    size_t          way = r_config_dir_way.read();
-                    size_t          set = m_y[r_config_address.read()];
+                    size_t way = r_config_dir_way.read();
+                    size_t set = m_y[r_config_address.read()];
                     std::vector<data_t> data_vector;
                     data_vector.clear();
-                    for(size_t word=0; word<m_words; word++) 
-                    {
-                        uint32_t data = m_cache_data.read( way, set, word );
-                        data_vector.push_back( data );
+                    for (size_t word = 0; word < m_words; word++) 
+                    {
+                        uint32_t data = m_cache_data.read(way, set, word);
+                        data_vector.push_back(data);
                     }
 
@@ -2992,5 +2802,5 @@
 
 #if DEBUG_MEMC_CONFIG
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CONFIG_TRT_SET> PUT request in TRT:"
                             << " address = " << std::hex << r_config_address.read()
@@ -3002,5 +2812,5 @@
             case CONFIG_PUT_REQ:       // post PUT request to IXR_CMD_FSM
                 {
-                    if ( not r_config_to_ixr_cmd_req.read() )
+                    if (not r_config_to_ixr_cmd_req.read())
                     {
                         r_config_to_ixr_cmd_req   = true;
@@ -3008,10 +2818,10 @@
 
                         // prepare next iteration
-                        r_config_cmd_lines              = r_config_cmd_lines.read() - 1;
-                        r_config_address                = r_config_address.read() + (m_words<<2);
-                        r_config_fsm                    = CONFIG_LOOP;
+                        r_config_cmd_lines = r_config_cmd_lines.read() - 1;
+                        r_config_address   = r_config_address.read() + (m_words << 2);
+                        r_config_fsm       = CONFIG_LOOP;
 
 #if DEBUG_MEMC_CONFIG
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " CONFIG_PUT_REQ> post PUT request to IXR_CMD_FSM"
                                 << " / address = " << std::hex << r_config_address.read() << std::endl; 
@@ -3027,21 +2837,21 @@
                 // directory if IVT not full. 
                 {
-                    assert( (r_alloc_dir_fsm.read() == ALLOC_DIR_CONFIG) and
+                    assert((r_alloc_dir_fsm.read() == ALLOC_DIR_CONFIG) and
                             "MEMC ERROR in CONFIG_IVT_LOCK state: bad DIR allocation");
 
-                    if ( r_alloc_ivt_fsm.read() == ALLOC_IVT_CONFIG )
+                    if (r_alloc_ivt_fsm.read() == ALLOC_IVT_CONFIG)
                     {
                         size_t set        = m_y[(addr_t)(r_config_address.read())];
                         size_t way        = r_config_dir_way.read();
 
-                        if ( r_config_dir_count.read() == 0 )     // inval DIR and return to LOOP
-                        {
-                            m_cache_directory.inval( way, set );
+                        if (r_config_dir_count.read() == 0)     // inval DIR and return to LOOP
+                        {
+                            m_cache_directory.inval(way, set);
                             r_config_cmd_lines  = r_config_cmd_lines.read() - 1;
-                            r_config_address    = r_config_address.read() + (m_words<<2);
+                            r_config_address    = r_config_address.read() + (m_words << 2);
                             r_config_fsm        = CONFIG_LOOP;
 
 #if DEBUG_MEMC_CONFIG
-                            if(m_debug)
+                            if (m_debug)
                                 std::cout << "  <MEMC " << name() << " CONFIG_IVT_LOCK>"
                                     << " No copies in L1 : inval DIR entry"  << std::endl;
@@ -3071,14 +2881,14 @@
                                             index);
 
-                            if ( wok )  // IVT success => inval DIR slot
+                            if (wok)  // IVT success => inval DIR slot
                             {
-                                m_cache_directory.inval( way, set );
+                                m_cache_directory.inval(way, set);
                                 r_config_ivt_index = index;
                                 config_rsp_lines_incr = true;
-                                if ( broadcast )  r_config_fsm = CONFIG_BC_SEND;
-                                else              r_config_fsm = CONFIG_INVAL_SEND;
+                                if (broadcast)  r_config_fsm = CONFIG_BC_SEND;
+                                else             r_config_fsm = CONFIG_INVAL_SEND;
 
 #if DEBUG_MEMC_CONFIG
-                                if(m_debug)
+                                if (m_debug)
                                     std::cout << "  <MEMC " << name() << " CONFIG_IVT_LOCK>"
                                         << " Inval DIR entry and register inval in IVT"
@@ -3092,5 +2902,5 @@
 
 #if DEBUG_MEMC_CONFIG
-                                if(m_debug)
+                                if (m_debug)
                                     std::cout << "  <MEMC " << name() << " CONFIG_IVT_LOCK>"
                                         << " IVT full : release DIR & IVT locks and retry" << std::endl;
@@ -3104,6 +2914,6 @@
             case CONFIG_BC_SEND:    // Post a broadcast inval request to CC_SEND FSM
                 {
-                    if( not r_config_to_cc_send_multi_req.read() and 
-                            not r_config_to_cc_send_brdcast_req.read() )
+                    if (not r_config_to_cc_send_multi_req.read() and 
+                            not r_config_to_cc_send_brdcast_req.read())
                     {
                         // post bc inval request
@@ -3119,5 +2929,5 @@
 
 #if DEBUG_MEMC_CONFIG
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " CONFIG_BC_SEND>"
                                 << " Post a broadcast inval request to CC_SEND FSM" 
@@ -3130,5 +2940,5 @@
             case CONFIG_INVAL_SEND:    // Post a multi inval request to CC_SEND FSM
                 {
-                    if( not r_config_to_cc_send_multi_req.read() and 
+                    if (not r_config_to_cc_send_multi_req.read() and 
                             not r_config_to_cc_send_brdcast_req.read() )
                     {
@@ -3143,5 +2953,5 @@
                         config_to_cc_send_fifo_put      = true;
 
-                        if ( r_config_dir_count.read() == 1 )  // one copy
+                        if (r_config_dir_count.read() == 1 )  // one copy
                         {
                             // prepare next iteration
@@ -3156,5 +2966,5 @@
 
 #if DEBUG_MEMC_CONFIG
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " CONFIG_INVAL_SEND>"
                                 << " Post multi inval request to CC_SEND FSM" 
@@ -3169,12 +2979,12 @@
             case CONFIG_HEAP_REQ:  // Try to get access to Heap
                 {
-                    if ( r_alloc_heap_fsm.read() == ALLOC_HEAP_CONFIG )
-                    {
-                        r_config_fsm       = CONFIG_HEAP_SCAN;
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_CONFIG )
+                    {
+                        r_config_fsm = CONFIG_HEAP_SCAN;
                         r_config_heap_next = r_config_dir_ptr.read();
                     }
 
 #if DEBUG_MEMC_CONFIG
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CONFIG_HEAP_REQ>"
                             << " Requesting HEAP lock" << std::endl;
@@ -3193,12 +3003,12 @@
                     config_to_cc_send_fifo_put   = true;
 
-                    if ( m_config_to_cc_send_inst_fifo.wok() ) // inval request accepted
+                    if (m_config_to_cc_send_inst_fifo.wok()) // inval request accepted
                     {
                         r_config_heap_next = entry.next;
-                        if ( last_copy ) r_config_fsm = CONFIG_HEAP_LAST;
+                        if (last_copy) r_config_fsm = CONFIG_HEAP_LAST;
                     }
 
 #if DEBUG_MEMC_CONFIG
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CONFIG_HEAP_SCAN>"
                             << " Post multi inval request to CC_SEND FSM" 
@@ -3217,5 +3027,5 @@
                     last_entry.owner.inst  = false;
 
-                    if ( m_heap.is_full() )
+                    if (m_heap.is_full())
                     {
                         last_entry.next = r_config_dir_ptr.read();
@@ -3227,14 +3037,14 @@
                     }
 
-                    m_heap.write_free_ptr( r_config_dir_ptr.read() );
-                    m_heap.write( r_config_heap_next.read(), last_entry );
+                    m_heap.write_free_ptr(r_config_dir_ptr.read() );
+                    m_heap.write(r_config_heap_next.read(), last_entry );
 
                     // prepare next iteration
-                    r_config_cmd_lines          = r_config_cmd_lines.read() - 1;
-                    r_config_address            = r_config_address.read() + (m_words<<2);
-                    r_config_fsm                = CONFIG_LOOP;
+                    r_config_cmd_lines = r_config_cmd_lines.read() - 1;
+                    r_config_address   = r_config_address.read() + (m_words<<2);
+                    r_config_fsm       = CONFIG_LOOP;
 
 #if DEBUG_MEMC_CONFIG
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CONFIG_HEAP_LAST>"
                             << " Heap housekeeping" << std::endl;
@@ -3272,5 +3082,5 @@
             case READ_IDLE:  // waiting a read request
                 {
-                    if(m_cmd_read_addr_fifo.rok())
+                    if (m_cmd_read_addr_fifo.rok())
                     {
 
@@ -3280,5 +3090,5 @@
 
 #if DEBUG_MEMC_READ
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " READ_IDLE> Read request"
                                 << " : address = " << std::hex << m_cmd_read_addr_fifo.read()
@@ -3298,17 +3108,13 @@
             case READ_DIR_REQ:  // Get the lock to the directory
                 {
-                    if(r_alloc_dir_fsm.read() == ALLOC_DIR_READ)
+                    if (r_alloc_dir_fsm.read() == ALLOC_DIR_READ)
                     {
                         r_read_fsm = READ_DIR_LOCK;
-                        m_cpt_read_fsm_n_dir_lock++;
                     }
 
 #if DEBUG_MEMC_READ
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " READ_DIR_REQ> Requesting DIR lock " << std::endl;
 #endif
-
-                    m_cpt_read_fsm_dir_lock++;
-
                     break;
                 }
@@ -3323,7 +3129,7 @@
                     DirectoryEntry entry =
                         m_cache_directory.read(m_cmd_read_addr_fifo.read(), way);
-                    if(((m_cmd_read_pktid_fifo.read() & 0x7) == TYPE_LL) and not r_read_ll_done.read())   // access the global table ONLY when we have an LL cmd
-                    {
-                        r_read_ll_key   = m_llsc_table.ll(m_cmd_read_addr_fifo.read());
+                    if (((m_cmd_read_pktid_fifo.read() & 0x7) == TYPE_LL) and not r_read_ll_done.read())   // access the global table ONLY when we have an LL cmd
+                    {
+                        r_read_ll_key = m_llsc_table.ll(m_cmd_read_addr_fifo.read());
                         /**//*std::cout << "MEMCACHE : from proc " << m_cmd_read_srcid_fifo.read()
                               << " | @ " << std::hex << m_cmd_read_addr_fifo.read()
@@ -3331,6 +3137,4 @@
                         r_read_ll_done  = true;
                     }
-
-                    //bool s_getm_hit         = m_cmd_read_pktid_fifo.read() & 0x8;
 
                     r_read_is_cnt           = entry.is_cnt;
@@ -3350,10 +3154,10 @@
                     bool cached_read = ((m_cmd_read_pktid_fifo.read() & 0x7) != 0) and ((m_cmd_read_pktid_fifo.read() & 0x7) != 0x2) and ((m_cmd_read_pktid_fifo.read() & 0x7) != 0x6);
 
-                    if(entry.state == ENTRY_SHARED or entry.state == ENTRY_EXCLUSIVE)    // hit
-                    {
-                        if ( (m_cmd_read_pktid_fifo.read() & 0x7) == TYPE_WRITE )
+                    if (entry.state == ENTRY_SHARED or entry.state == ENTRY_EXCLUSIVE)    // hit
+                    {
+                        if ((m_cmd_read_pktid_fifo.read() & 0x7) == TYPE_WRITE )
                         {
                                 // Invalid the line in the others processors and put the line in trt with data.
-                                if(entry.count == 0)  
+                                if (entry.count == 0)  
                                   //  ((entry.count == 1) and not entry.is_cnt and (entry.state == ENTRY_SHARED) and (entry.owner.srcid == m_cmd_read_srcid_fifo.read())) or
                                   //  (entry.count == 1 and entry.is_cnt and entry.state == ENTRY_SHARED and s_getm_hit))
@@ -3363,5 +3167,5 @@
                                 else
                                 {
-                                    if((entry.state == ENTRY_EXCLUSIVE) and (entry.owner.srcid == m_cmd_read_srcid_fifo.read())) 
+                                    if ((entry.state == ENTRY_EXCLUSIVE) and (entry.owner.srcid == m_cmd_read_srcid_fifo.read())) 
                                     {
                                         std::cout <<"exclusive line && srcid != read srcid "<< std::endl;
@@ -3372,12 +3176,12 @@
 
                                 addr_t min = m_cmd_read_addr_fifo.read();
-                                addr_t max = m_cmd_read_addr_fifo.read() + m_cmd_read_length_fifo.read()*4;
+                                addr_t max = m_cmd_read_addr_fifo.read() + m_cmd_read_length_fifo.read() * 4;
                                 m_llsc_table.sw(min, max);
                         }
                         else // a read miss request 
                         {
-                            if ( entry.state == ENTRY_SHARED or entry.count == 0)
+                            if (entry.state == ENTRY_SHARED or entry.count == 0)
                             {
-                                if( entry.is_cnt or (entry.count == 0) or (not cached_read))
+                                if (entry.is_cnt or (entry.count == 0) or (not cached_read))
                                 {
                                     r_read_fsm = READ_DIR_HIT;
@@ -3388,5 +3192,5 @@
                                 }
                             }
-                            else if ( entry.state == ENTRY_EXCLUSIVE ) 
+                            else if (entry.state == ENTRY_EXCLUSIVE) 
                             {
                                 r_read_fsm = READ_IVT_UPDT_LOCK;
@@ -3394,7 +3198,6 @@
                         } 
                     }
-                    else if(entry.state == ENTRY_LOCKED) // the line is locked, can't use it at this time
-                    {
-                        m_cpt_read_locked_rb ++;
+                    else if (entry.state == ENTRY_LOCKED) // the line is locked, can't use it at this time
+                    {
                         r_read_fsm = READ_WAIT;
                     }
@@ -3405,5 +3208,5 @@
 
 #if DEBUG_MEMC_READ
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout << "  <MEMC " << name() << " READ_DIR_LOCK> Accessing directory: "
@@ -3415,5 +3218,5 @@
                             << " / is_inst = " << entry.owner.inst 
                             << " / is_cnt = " << entry.is_cnt << std::endl;
-                        if((m_cmd_read_pktid_fifo.read() & 0x7) == TYPE_LL) std::cout << " / LL access" << std::endl;
+                        if ((m_cmd_read_pktid_fifo.read() & 0x7) == TYPE_LL) std::cout << " / LL access" << std::endl;
                         else                                                std::cout << std::endl;
                     }
@@ -3438,5 +3241,5 @@
                         size_t ivt_send_count   = 0;
 
-                        if( m_ivt.is_full() or // not need to check match inval, because of the LOCKED STATE
+                        if (m_ivt.is_full() or // not need to check match inval, because of the LOCKED STATE
                             r_read_to_cc_send_multi_req.read() or 
                             r_read_to_cc_send_brdcast_req.read() or
@@ -3446,5 +3249,5 @@
                             r_read_fsm = READ_WAIT;
 #if DEBUG_MEMC_READ
-                            if(m_debug)
+                            if (m_debug)
                             {
                                 std::cout
@@ -3475,5 +3278,5 @@
                             //r_read_to_cc_send_is_shared     = r_read_state.read() == ENTRY_SHARED;
 
-                            if(r_read_need_block.read())
+                            if (r_read_need_block.read())
                             {
                                 r_read_to_cleanup_nline         = nline;
@@ -3502,5 +3305,5 @@
                                       index);
                                 
-                            if( not_last_multi_req ) 
+                            if (not_last_multi_req ) 
                             {
                                 r_read_fsm = READ_INVAL_HEAP_REQ;
@@ -3512,10 +3315,12 @@
                             }    
 
-                            if(multi_req)
-                                m_cpt_getm_minval ++;
-                            else
+                            // <Activity counters>
+                            if (!multi_req)
+                            {
                                 m_cpt_getm_broadcast ++;
+                            }
+                            // </Activity counters>
 #if DEBUG_MEMC_READ
-                            if(m_debug)
+                            if (m_debug)
                             {
                                 std::cout
@@ -3534,10 +3339,10 @@
             case READ_INVAL_HEAP_REQ:
                 {
-                    if( r_alloc_heap_fsm.read() == ALLOC_HEAP_READ )
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_READ )
                     {
                         r_read_fsm = READ_INVAL_HEAP_ERASE;
                     }
 #if DEBUG_MEMC_READ
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " READ_INVAL_HEAP_REQ>"
                             << " Requesting HEAP lock" << std::endl;
@@ -3548,5 +3353,5 @@
             case READ_INVAL_HEAP_ERASE:
                 {
-                    if(r_alloc_heap_fsm.read() == ALLOC_HEAP_READ)
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_READ)
                     {
                         HeapEntry entry = m_heap.read(r_read_next_ptr.read());
@@ -3557,5 +3362,5 @@
                         r_read_next_ptr               = entry.next;
 
-                        if(entry.next == r_read_next_ptr.read())   // last copy
+                        if (entry.next == r_read_next_ptr.read())   // last copy
                         {
                             r_read_to_cc_send_multi_req     = true;
@@ -3568,5 +3373,5 @@
 
 #if DEBUG_MEMC_READ
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " READ_HEAP_ERASE>"
                                 << " Erase copy:"
@@ -3580,5 +3385,5 @@
             case READ_INVAL_HEAP_LAST:  // last copy
                 {
-                    if(r_alloc_heap_fsm.read() != ALLOC_HEAP_READ)
+                    if (r_alloc_heap_fsm.read() != ALLOC_HEAP_READ)
                     {
                         std::cout << "VCI_MEM_CACHE ERROR " << name() << " READ_INVAL_HEAP_LAST"
@@ -3591,5 +3396,5 @@
                     last_entry.owner.srcid    = 0;
                     last_entry.owner.inst     = false;
-                    if(m_heap.is_full())
+                    if (m_heap.is_full())
                     {
                         last_entry.next     = r_read_next_ptr.read();
@@ -3608,5 +3413,5 @@
 
 #if DEBUG_MEMC_READ
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " READ_INVAL_HEAP_LAST>"
                             << " Heap housekeeping" << std::endl;
@@ -3622,5 +3427,5 @@
                         addr_t nline            = m_nline[(addr_t)(m_cmd_read_addr_fifo.read())];
                         size_t set              = m_y[(addr_t)(m_cmd_read_addr_fifo.read())];
-                        if( m_ivt.is_full() or 
+                        if (m_ivt.is_full() or 
                             r_read_to_cc_send_multi_req.read() or 
                             r_read_to_cc_send_brdcast_req.read() or 
@@ -3629,5 +3434,5 @@
                             r_read_fsm = READ_WAIT;
 #if DEBUG_MEMC_READ
-                            if(m_debug)
+                            if (m_debug)
                             {
                                 std::cout
@@ -3652,5 +3457,5 @@
                             m_cache_directory.write(set, r_read_way.read(), entry);
                             
-                            if(r_read_need_block.read())
+                            if (r_read_need_block.read())
                             {
                                 r_read_to_multi_ack_nline       = nline;
@@ -3687,5 +3492,5 @@
 
 #if DEBUG_MEMC_READ
-                            if(m_debug)
+                            if (m_debug)
                             {
                                  std::cout
@@ -3709,5 +3514,5 @@
                     r_read_fsm = READ_DIR_REQ;
 #if DEBUG_MEMC_READ
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout
@@ -3747,9 +3552,9 @@
                     DirectoryEntry entry;
 
-                    if(inst_read)
+                    if (inst_read)
                     {
                         entry.state = ENTRY_SHARED;
                     }
-                    else if(is_getm)
+                    else if (is_getm)
                     {
                         entry.state = ENTRY_EXCLUSIVE;
@@ -3761,5 +3566,5 @@
  
                     //entry.cache_coherent = r_read_coherent.read() or inst_read or (!(cached_read)) or (r_read_copy.read() != m_cmd_read_srcid_fifo.read());
-                    if( entry.state == ENTRY_SHARED) r_read_shared = true;
+                    if (entry.state == ENTRY_SHARED) r_read_shared = true;
                         else    r_read_shared = false;
                     entry.is_cnt  = is_cnt;
@@ -3768,7 +3573,7 @@
                     entry.lock    = r_read_lock.read();
                     entry.ptr     = r_read_ptr.read();
-                    if(cached_read)   // Cached read => we must update the copies
-                    {
-                        if(is_getm)
+                    if (cached_read)   // Cached read => we must update the copies
+                    {
+                        if (is_getm)
                         {
                             entry.owner.srcid    = m_cmd_read_srcid_fifo.read();
@@ -3777,5 +3582,5 @@
  
                         }
-                        else if(!is_cnt)  // Not counter mode
+                        else if (!is_cnt)  // Not counter mode
                         {
                             entry.owner.srcid    = m_cmd_read_srcid_fifo.read();
@@ -3798,5 +3603,5 @@
 
 #if DEBUG_MEMC_READ
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " READ_DIR_HIT> Update directory entry:"
                             << " addr = " << std::hex << m_cmd_read_addr_fifo.read()
@@ -3818,18 +3623,14 @@
             case READ_HEAP_REQ:    // Get the lock to the HEAP directory
                 {
-                    if(r_alloc_heap_fsm.read() == ALLOC_HEAP_READ)
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_READ)
                     {
                         r_read_fsm = READ_HEAP_LOCK;
-                        m_cpt_read_fsm_n_heap_lock++;
                     }
 
 #if DEBUG_MEMC_READ
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " READ_HEAP_REQ>"
                             << " Requesting HEAP lock " << std::endl;
 #endif
-
-                    m_cpt_read_fsm_heap_lock++;
-
                     break;
                 }
@@ -3839,5 +3640,5 @@
                 // and prepare the HEAP update
                 {
-                    if(r_alloc_heap_fsm.read() == ALLOC_HEAP_READ)
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_READ)
                     {
                         // enter counter mode when we reach the limit of copies or the heap is full
@@ -3862,5 +3663,5 @@
                         r_read_shared = true;  //ack to cache L1 with shared state
     
-                        if(not go_cnt)         // Not entering counter mode
+                        if (not go_cnt)         // Not entering counter mode
                         {
                             entry.owner.srcid    = r_read_copy.read();
@@ -3878,5 +3679,5 @@
 
                         // prepare the heap update (add an entry, or clear the linked list)
-                        if(not go_cnt)      // not switching to counter mode
+                        if (not go_cnt)      // not switching to counter mode
                         {
                             // We test if the next free entry in the heap is the last
@@ -3889,5 +3690,5 @@
                         else            // switching to counter mode
                         {
-                            if(r_read_count.read() >1)              // heap must be cleared
+                            if (r_read_count.read() >1)              // heap must be cleared
                             {
                                 HeapEntry next_entry = m_heap.read(r_read_ptr.read());
@@ -3895,5 +3696,5 @@
                                 m_heap.write_free_ptr(r_read_ptr.read());
 
-                                if(next_entry.next == r_read_ptr.read())    // last entry
+                                if (next_entry.next == r_read_ptr.read())    // last entry
                                 {
                                     r_read_fsm = READ_HEAP_LAST;    // erase the entry
@@ -3912,5 +3713,5 @@
 
 #if DEBUG_MEMC_READ
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " READ_HEAP_LOCK> Update directory:"
                                 << " tag = " << std::hex << entry.tag
@@ -3932,5 +3733,5 @@
             case READ_HEAP_WRITE:       // add an entry in the heap
                 {
-                    if(r_alloc_heap_fsm.read() == ALLOC_HEAP_READ)
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_READ)
                     {
                         HeapEntry heap_entry;
@@ -3938,5 +3739,5 @@
                         heap_entry.owner.inst     = ((m_cmd_read_pktid_fifo.read() & 0x2) != 0);
 
-                        if(r_read_count.read() == 1)  // creation of a new linked list
+                        if (r_read_count.read() == 1)  // creation of a new linked list
                         {
                             heap_entry.next         = m_heap.next_free_ptr();
@@ -3948,10 +3749,10 @@
                         m_heap.write_free_entry(heap_entry);
                         m_heap.write_free_ptr(r_read_next_ptr.read());
-                        if(r_read_last_free.read())  m_heap.set_full();
+                        if (r_read_last_free.read())  m_heap.set_full();
 
                         r_read_fsm    = READ_RSP;
 
 #if DEBUG_MEMC_READ
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " READ_HEAP_WRITE> Add an entry in the heap:"
                                 << " owner_id = " << std::hex << heap_entry.owner.srcid
@@ -3970,8 +3771,8 @@
             case READ_HEAP_ERASE:
                 {
-                    if(r_alloc_heap_fsm.read() == ALLOC_HEAP_READ)
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_READ)
                     {
                         HeapEntry next_entry = m_heap.read(r_read_ptr.read());
-                        if(next_entry.next == r_read_ptr.read())
+                        if (next_entry.next == r_read_ptr.read())
                         {
                             r_read_fsm = READ_HEAP_LAST;
@@ -3995,5 +3796,5 @@
             case READ_HEAP_LAST:
                 {
-                    if(r_alloc_heap_fsm.read() == ALLOC_HEAP_READ)
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_READ)
                     {
                         HeapEntry last_entry;
@@ -4001,5 +3802,5 @@
                         last_entry.owner.inst     = false;
 
-                        if(m_heap.is_full())
+                        if (m_heap.is_full())
                         {
                             last_entry.next       = r_read_ptr.read();
@@ -4024,5 +3825,5 @@
             case READ_RSP:    //  request the TGT_RSP FSM to return data
                 {
-                    if(not r_read_to_tgt_rsp_req.read())
+                    if (not r_read_to_tgt_rsp_req.read())
                     {
                         for(size_t i=0 ; i<m_words ; i++)  r_read_to_tgt_rsp_data[i] = r_read_data[i];
@@ -4046,5 +3847,5 @@
 
 #if DEBUG_MEMC_READ
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " READ_RSP> Request TGT_RSP FSM to return data:"
                                 << " rsrcid = " << std::hex << m_cmd_read_srcid_fifo.read()
@@ -4058,5 +3859,5 @@
             case READ_TRT_LOCK: // read miss : check the Transaction Table
                 {
-                    if(r_alloc_trt_fsm.read() == ALLOC_TRT_READ)
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_READ)
                     {
                         size_t      index     = 0;
@@ -4067,21 +3868,30 @@
                         bool        wok       = !m_trt.full(index);
                         
-                        //if(hit_write) m_trt.print(index_write);
-                        if(hit_read or !wok or hit_write)    // missing line already requested or no space
-                        {
-                            if(!wok)
+                        //if (hit_write) m_trt.print(index_write);
+                        if (hit_read or !wok or hit_write)    // missing line already requested or no space
+                        {
+                            // <Activity counters>
+                            if (!wok)
                             {
                                 m_cpt_trt_full++;
                             }
-                            if(hit_read or hit_write)   m_cpt_trt_rb++;
+                            if (hit_read or hit_write)
+                            {
+                                m_cpt_trt_rb++;
+                            }
+                            // </Activity counters>
                             r_read_fsm = READ_IDLE;
                         }
-                        else                  // missing line is requested to the XRAM
-                        {
-
-                            if ( (m_cmd_read_pktid_fifo.read() & 0x7) == TYPE_WRITE )
-                                m_cpt_getm_miss ++;
-                            else
+                        else // missing line is requested to the XRAM
+                        {
+
+                            // <Activity counters>
+                            if ((m_cmd_read_pktid_fifo.read() & 0x7) == TYPE_WRITE) {
+                                m_cpt_getm_miss++;
+                            }
+                            else {
                                 m_cpt_read_miss++;
+                            }
+                            // </Activity counters>
 
                             r_read_trt_index = index;
@@ -4090,15 +3900,11 @@
 
 #if DEBUG_MEMC_READ
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " READ_TRT_LOCK> Check TRT:"
                                 << " hit_read = " << hit_read
                                 << " / hit_write = " << hit_write
                                 << " / full = " << !wok << std::endl;
-                        m_cpt_read_fsm_n_trt_lock++;
-#endif
-                    }
-
-                    m_cpt_read_fsm_trt_lock++;
-
+#endif
+                    }
                     break;
                 }
@@ -4107,5 +3913,5 @@
             case READ_TRT_SET:      // register get transaction in TRT
                 {
-                    if(r_alloc_trt_fsm.read() == ALLOC_TRT_READ)
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_READ)
                     {
                         m_trt.set(r_read_trt_index.read(),
@@ -4123,5 +3929,5 @@
 
 #if DEBUG_MEMC_READ
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " READ_TRT_SET> Set a GET in TGT:"
                                 << " address = " << std::hex << m_cmd_read_addr_fifo.read()
@@ -4136,5 +3942,5 @@
             case READ_TRT_REQ:   // consume the read request in FIFO and send it to IXR_CMD_FSM
                 {
-                    if(not r_read_to_ixr_cmd_req)
+                    if (not r_read_to_ixr_cmd_req)
                     {
                         cmd_read_fifo_get       = true;
@@ -4145,5 +3951,5 @@
 
 #if DEBUG_MEMC_READ
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " READ_TRT_REQ> Request GET transaction for address "
                                 << std::hex << m_cmd_read_addr_fifo.read() << std::endl;
@@ -4217,5 +4023,5 @@
                     for(size_t word=0 ; word<m_words ; word++)
                     {
-                        if(word == index) r_write_be[word] = m_cmd_write_be_fifo.read();
+                        if (word == index) r_write_be[word] = m_cmd_write_be_fifo.read();
                         else              r_write_be[word] = 0x0;
                     }
@@ -4231,5 +4037,5 @@
 
 #if DEBUG_MEMC_WRITE
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " WRITE_IDLE> Write request "
                             << " srcid = " << std::hex << m_cmd_write_srcid_fifo.read()
@@ -4295,5 +4101,4 @@
                     if (r_alloc_dir_fsm.read() != ALLOC_DIR_WRITE ) 
                     {
-                        m_cpt_write_fsm_n_dir_lock ++;
                         break;
                     }
@@ -4326,8 +4131,6 @@
                     }
 
-                    m_cpt_write_fsm_dir_lock ++;
-
 #if DEBUG_MEMC_WRITE
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " WRITE_DIR_REQ> Requesting DIR lock "
                             << std::endl;
@@ -4344,5 +4147,5 @@
                     DirectoryEntry entry(m_cache_directory.read(r_write_address.read(), way));
 
-                    if(entry.state != ENTRY_INVALID)    // hit
+                    if (entry.state != ENTRY_INVALID)    // hit
                     {
                         // copy directory entry in local buffer in case of hit
@@ -4357,5 +4160,5 @@
                         r_write_state      = entry.state;
 
-                        if( r_write_pktid == TYPE_DATA_UNC and entry.count != 0)
+                        if (r_write_pktid == TYPE_DATA_UNC and entry.count != 0)
                         {
                             assert( false && " found a copy for an uncached write quest");
@@ -4363,5 +4166,5 @@
                         else
                         { 
-                            if( not entry.count and (entry.state != ENTRY_LOCKED))
+                            if (not entry.count and (entry.state != ENTRY_LOCKED))
                             {
                                 r_write_fsm = WRITE_DIR_HIT;    
@@ -4369,5 +4172,4 @@
                             else if (entry.state == ENTRY_LOCKED)//the line is locked
                             {
-                                m_cpt_write_locked_rb ++;
                                 r_write_fsm = WRITE_WAIT;
                             }
@@ -4384,5 +4186,5 @@
 
 #if DEBUG_MEMC_WRITE
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout << "  <MEMC " << name() << " WRITE_DIR_LOCK> Check the directory: "
@@ -4391,5 +4193,5 @@
                             << " / count = " << entry.count
                             << " / is_cnt = " << entry.is_cnt ;
-                        if((r_write_pktid.read() & 0x7) == TYPE_SC)
+                        if ((r_write_pktid.read() & 0x7) == TYPE_SC)
                             std::cout << " / SC access" << std::endl;
                         else
@@ -4439,5 +4241,5 @@
 
 #if DEBUG_MEMC_WRITE
-                    if(m_debug)
+                    if (m_debug)
                     {
                          std::cout << "  <MEMC " << name() 
@@ -4451,18 +4253,14 @@
             case WRITE_HEAP_REQ:    // Get the lock to the HEAP directory
                 {
-                    if(r_alloc_heap_fsm.read() == ALLOC_HEAP_WRITE)
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_WRITE)
                     {
                         r_write_fsm = WRITE_HEAP_ERASE;
-                        m_cpt_write_fsm_n_heap_lock++;
                     }
 
 #if DEBUG_MEMC_WRITE
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " WRITE_HEAP_REQ>"
                             << " Requesting HEAP lock " << std::endl;
 #endif
-
-                    m_cpt_write_fsm_heap_lock++;
-
                     break;
                 }
@@ -4471,5 +4269,5 @@
             case WRITE_HEAP_ERASE:   // get access to heap
                 {
-                    if(r_alloc_heap_fsm.read() == ALLOC_HEAP_WRITE)
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_WRITE)
                     {
                         HeapEntry entry = m_heap.read(r_write_next_ptr.read());
@@ -4478,8 +4276,8 @@
                         write_to_cc_send_fifo_inst     = entry.owner.inst;
                         write_to_cc_send_fifo_put      = true;
-                        if(m_write_to_cc_send_inst_fifo.wok())
+                        if (m_write_to_cc_send_inst_fifo.wok())
                         {
                             r_write_next_ptr = entry.next;
-                            if(entry.next == r_write_next_ptr.read())   // last copy
+                            if (entry.next == r_write_next_ptr.read())   // last copy
                             {
                                 r_write_to_cc_send_multi_req = true;
@@ -4497,12 +4295,9 @@
 
 #if DEBUG_MEMC_WRITE
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() 
                                 << " WRITE_HEAP_LOCK> Get acces to the HEAP" << std::endl;
 #endif
                     }
-
-                    m_cpt_write_fsm_heap_lock++;
-
                     break;
                 }
@@ -4510,5 +4305,5 @@
             case WRITE_HEAP_LAST:  // last copy
                 {
-                    if(r_alloc_heap_fsm.read() != ALLOC_HEAP_WRITE)
+                    if (r_alloc_heap_fsm.read() != ALLOC_HEAP_WRITE)
                     {
                         std::cout << "VCI_MEM_CACHE ERROR " << name() << " WRITE_HEAP_LAST"
@@ -4521,5 +4316,5 @@
                     last_entry.owner.srcid    = 0;
                     last_entry.owner.inst     = false;
-                    if(m_heap.is_full())
+                    if (m_heap.is_full())
                     {
                         last_entry.next     = r_write_next_ptr.read();
@@ -4537,5 +4332,5 @@
 
 #if DEBUG_MEMC_XRAM_RSP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " WRITE_HEAP_LAST>"
                             << " Heap housekeeping" << std::endl;
@@ -4592,9 +4387,9 @@
                             for(size_t word=0 ; word<m_words ; word++)
                             {
-                                if(word == index) r_write_be[word] = m_cmd_write_be_fifo.read();
+                                if (word == index) r_write_be[word] = m_cmd_write_be_fifo.read();
                                 else              r_write_be[word] = 0x0;
                             }
 
-                            if( m_cmd_write_eop_fifo.read())
+                            if (m_cmd_write_eop_fifo.read())
                             {
                                 r_write_fsm = WRITE_DIR_REQ;
@@ -4607,5 +4402,5 @@
 
 #if DEBUG_MEMC_WRITE
-                        if(m_debug)
+                        if (m_debug)
                         {
                             std::cout << "  <MEMC " << name() << " WRITE_RSP> Post a request to TGT_RSP FSM"
@@ -4614,5 +4409,5 @@
                                 << " : sc_fail= " << std::hex << r_write_sc_fail.read()
                                 << std::endl;
-                            if(m_cmd_write_addr_fifo.rok())
+                            if (m_cmd_write_addr_fifo.rok())
                             {
                                 std::cout << "                    New Write request: "
@@ -4631,5 +4426,5 @@
             case WRITE_MISS_TRT_LOCK: // Miss : check Transaction Table
                 {
-                    if(r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE)
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE)
                     {
                         size_t  hit_index = 0;
@@ -4640,5 +4435,5 @@
                         bool    wok       = not m_trt.full(wok_index);
 #if DEBUG_MEMC_WRITE
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " WRITE_MISS_TRT_LOCK> Check the TRT" 
                                       << "hit read =" << hit_read
@@ -4649,9 +4444,10 @@
 
                         // wait an empty entry in TRT
-                        if(not hit_read and (not wok or hit_write))
+                        if (not hit_read and (not wok or hit_write))
                         {
                             r_write_fsm       = WRITE_WAIT;
+                            // <Activity counters>
                             m_cpt_trt_full++;
-
+                            // </Activity counters>
                             break;
                         }
@@ -4668,5 +4464,7 @@
                             r_write_trt_index = hit_index;
                             r_write_fsm       = WRITE_MISS_TRT_DATA;
+                            // <Activity counters>
                             m_cpt_write_miss++;
+                            // </Activity counters>
                             break;
                         }
@@ -4676,9 +4474,10 @@
                             r_write_trt_index = wok_index;
                             r_write_fsm       = WRITE_MISS_TRT_SET;
+                            // <Activity counters>
                             m_cpt_write_miss++;
+                            // </Activity counters>
                             break;
                         }
 
-                        m_cpt_write_fsm_n_trt_lock ++;
                         assert(false && "VCI_MEM_CACHE ERROR: this part must not be reached");
                     }
@@ -4692,5 +4491,5 @@
 
 #if DEBUG_MEMC_WRITE
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " WRITE_WAIT> Releases the locks before retry" << std::endl;
 #endif
@@ -4702,5 +4501,5 @@
             case WRITE_MISS_TRT_SET:  // register a new transaction in TRT (Write Buffer)
                 {
-                    if(r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE)
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE)
                     {
                         std::vector<be_t>   be_vector;
@@ -4727,5 +4526,5 @@
 
 #if DEBUG_MEMC_WRITE
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " WRITE_MISS_TRT_SET> Set a new entry in TRT" << std::endl;
 #endif
@@ -4737,5 +4536,5 @@
             case WRITE_MISS_TRT_DATA: // update an entry in TRT (used as a Write Buffer)
                 {
-                    if(r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE)
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_WRITE)
                     {
                         std::vector<be_t> be_vector;
@@ -4754,5 +4553,5 @@
 
 #if DEBUG_MEMC_WRITE
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " WRITE_MISS_TRT_DATA> Modify an existing entry in TRT" << std::endl;
 #endif
@@ -4764,5 +4563,5 @@
             case WRITE_MISS_XRAM_REQ: // send a GET request to IXR_CMD FSM
                 {
-                    if(not r_write_to_ixr_cmd_req.read())
+                    if (not r_write_to_ixr_cmd_req.read())
                     {
                         r_write_to_ixr_cmd_req   = true;
@@ -4771,5 +4570,5 @@
 
 #if DEBUG_MEMC_WRITE
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() 
                                 << " WRITE_MISS_XRAM_REQ> Post a GET request to the"
@@ -4796,5 +4595,5 @@
                                            // (r_write_inval_trt_send.read() or not r_write_to_cleanup_req.read());
 
-                    if(r_alloc_ivt_fsm.read() == ALLOC_IVT_WRITE)
+                    if (r_alloc_ivt_fsm.read() == ALLOC_IVT_WRITE)
                     {
                         bool        wok        = false;
@@ -4810,5 +4609,5 @@
                         //r_write_ivt_index = index;
 
-                        if(not ivt_full and cc_send_valid) //avoid to deadlock, we make sure that we can send cc_send request. 
+                        if (not ivt_full and cc_send_valid) //avoid to deadlock, we make sure that we can send cc_send request. 
                         {  
                             wok = m_ivt.set(false,        // it's an inval transaction
@@ -4824,10 +4623,13 @@
                                             index);
 
-                            if(is_brdcast)
-                                m_cpt_write_broadcast ++;
-                            else
-                                m_cpt_write_minval ++;
+                            // <Activity counters>
+                            if (is_brdcast)
+                            {
+                                m_cpt_write_broadcast++;
+                            }
+                            // </Activity counters>
+
 #if DEBUG_MEMC_WRITE
-                        if( m_debug and wok )
+                        if (m_debug and wok )
                             std::cout << "  <MEMC " << name() << " WRITE_INVAL_IVT_LOCK> Register broadcast inval in IVT"
                                 << "ivt index = " << index
@@ -4856,5 +4658,5 @@
                             {
                                
-                                if(r_write_state.read() == ENTRY_SHARED)
+                                if (r_write_state.read() == ENTRY_SHARED)
                                 {
                                     m_cache_data.write(way, set, word, r_write_data[word].read(), r_write_be[word].read());
@@ -4880,5 +4682,5 @@
             case WRITE_INVAL_CC_SEND:    // Post a coherence broadcast request to CC_SEND FSM
                 {
-                    if( not r_write_to_cc_send_multi_req.read()   and
+                    if (not r_write_to_cc_send_multi_req.read()   and
                         not r_write_to_cc_send_brdcast_req.read())
                     {
@@ -4894,5 +4696,5 @@
                         r_write_next_ptr               = r_write_ptr.read();
 
-                        if(r_write_state.read() == ENTRY_EXCLUSIVE)
+                        if (r_write_state.read() == ENTRY_EXCLUSIVE)
                         {
                             r_write_to_cleanup_req   = true;
@@ -4900,5 +4702,5 @@
                         }
 
-                        if( not last_multi_inval and multi_inval)
+                        if (not last_multi_inval and multi_inval)
                         {
                             r_write_fsm = WRITE_HEAP_REQ;
@@ -4909,5 +4711,5 @@
                         }
 #if DEBUG_MEMC_WRITE
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name()
                                 << " WRITE_INVAL_CC_SEND> Post a inval request to CC_SEND FSM" << std::endl;
@@ -4948,45 +4750,45 @@
             case IXR_CMD_READ_IDLE:
                 if     (r_write_to_ixr_cmd_req.read())      r_ixr_cmd_fsm = IXR_CMD_WRITE_TRT;
-                else if(r_cas_to_ixr_cmd_req.read())        r_ixr_cmd_fsm = IXR_CMD_CAS_TRT;
-                else if(r_cleanup_to_ixr_cmd_req.read())    r_ixr_cmd_fsm = IXR_CMD_CLEANUP_TRT;
-                else if(r_xram_rsp_to_ixr_cmd_req.read())   r_ixr_cmd_fsm = IXR_CMD_XRAM_TRT;
-                else if(r_config_to_ixr_cmd_req.read())     r_ixr_cmd_fsm = IXR_CMD_CONFIG_TRT;
-                else if(r_read_to_ixr_cmd_req.read())       r_ixr_cmd_fsm = IXR_CMD_READ_TRT;
+                else if (r_cas_to_ixr_cmd_req.read())        r_ixr_cmd_fsm = IXR_CMD_CAS_TRT;
+                else if (r_cleanup_to_ixr_cmd_req.read())    r_ixr_cmd_fsm = IXR_CMD_CLEANUP_TRT;
+                else if (r_xram_rsp_to_ixr_cmd_req.read())   r_ixr_cmd_fsm = IXR_CMD_XRAM_TRT;
+                else if (r_config_to_ixr_cmd_req.read())     r_ixr_cmd_fsm = IXR_CMD_CONFIG_TRT;
+                else if (r_read_to_ixr_cmd_req.read())       r_ixr_cmd_fsm = IXR_CMD_READ_TRT;
                 break;
                 ////////////////////////
             case IXR_CMD_WRITE_IDLE:
                 if     (r_cas_to_ixr_cmd_req.read())        r_ixr_cmd_fsm = IXR_CMD_CAS_TRT;
-                else if(r_cleanup_to_ixr_cmd_req.read())    r_ixr_cmd_fsm = IXR_CMD_CLEANUP_TRT;
-                else if(r_xram_rsp_to_ixr_cmd_req.read())   r_ixr_cmd_fsm = IXR_CMD_XRAM_TRT;
-                else if(r_config_to_ixr_cmd_req.read())     r_ixr_cmd_fsm = IXR_CMD_CONFIG_TRT;
-                else if(r_read_to_ixr_cmd_req.read())       r_ixr_cmd_fsm = IXR_CMD_READ_TRT;
-                else if(r_write_to_ixr_cmd_req.read())      r_ixr_cmd_fsm = IXR_CMD_WRITE_TRT;
+                else if (r_cleanup_to_ixr_cmd_req.read())    r_ixr_cmd_fsm = IXR_CMD_CLEANUP_TRT;
+                else if (r_xram_rsp_to_ixr_cmd_req.read())   r_ixr_cmd_fsm = IXR_CMD_XRAM_TRT;
+                else if (r_config_to_ixr_cmd_req.read())     r_ixr_cmd_fsm = IXR_CMD_CONFIG_TRT;
+                else if (r_read_to_ixr_cmd_req.read())       r_ixr_cmd_fsm = IXR_CMD_READ_TRT;
+                else if (r_write_to_ixr_cmd_req.read())      r_ixr_cmd_fsm = IXR_CMD_WRITE_TRT;
                 break;
                 ////////////////////////
             case IXR_CMD_CAS_IDLE:
                 if     (r_cleanup_to_ixr_cmd_req.read())    r_ixr_cmd_fsm = IXR_CMD_CLEANUP_TRT;
-                else if(r_xram_rsp_to_ixr_cmd_req.read())   r_ixr_cmd_fsm = IXR_CMD_XRAM_TRT;
-                else if(r_config_to_ixr_cmd_req.read())     r_ixr_cmd_fsm = IXR_CMD_CONFIG_TRT;
-                else if(r_read_to_ixr_cmd_req.read())       r_ixr_cmd_fsm = IXR_CMD_READ_TRT;
-                else if(r_write_to_ixr_cmd_req.read())      r_ixr_cmd_fsm = IXR_CMD_WRITE_TRT;
-                else if(r_cas_to_ixr_cmd_req.read())        r_ixr_cmd_fsm = IXR_CMD_CAS_TRT;
+                else if (r_xram_rsp_to_ixr_cmd_req.read())   r_ixr_cmd_fsm = IXR_CMD_XRAM_TRT;
+                else if (r_config_to_ixr_cmd_req.read())     r_ixr_cmd_fsm = IXR_CMD_CONFIG_TRT;
+                else if (r_read_to_ixr_cmd_req.read())       r_ixr_cmd_fsm = IXR_CMD_READ_TRT;
+                else if (r_write_to_ixr_cmd_req.read())      r_ixr_cmd_fsm = IXR_CMD_WRITE_TRT;
+                else if (r_cas_to_ixr_cmd_req.read())        r_ixr_cmd_fsm = IXR_CMD_CAS_TRT;
                 break;
                 ////////////////////////
             case IXR_CMD_XRAM_IDLE:
                 if     (r_config_to_ixr_cmd_req.read())     r_ixr_cmd_fsm = IXR_CMD_CONFIG_TRT;
-                else if(r_read_to_ixr_cmd_req.read())       r_ixr_cmd_fsm = IXR_CMD_READ_TRT;
-                else if(r_write_to_ixr_cmd_req.read())      r_ixr_cmd_fsm = IXR_CMD_WRITE_TRT;
-                else if(r_cas_to_ixr_cmd_req.read())        r_ixr_cmd_fsm = IXR_CMD_CAS_TRT;
-                else if(r_cleanup_to_ixr_cmd_req.read())    r_ixr_cmd_fsm = IXR_CMD_CLEANUP_TRT;
-                else if(r_xram_rsp_to_ixr_cmd_req.read())   r_ixr_cmd_fsm = IXR_CMD_XRAM_TRT;
+                else if (r_read_to_ixr_cmd_req.read())       r_ixr_cmd_fsm = IXR_CMD_READ_TRT;
+                else if (r_write_to_ixr_cmd_req.read())      r_ixr_cmd_fsm = IXR_CMD_WRITE_TRT;
+                else if (r_cas_to_ixr_cmd_req.read())        r_ixr_cmd_fsm = IXR_CMD_CAS_TRT;
+                else if (r_cleanup_to_ixr_cmd_req.read())    r_ixr_cmd_fsm = IXR_CMD_CLEANUP_TRT;
+                else if (r_xram_rsp_to_ixr_cmd_req.read())   r_ixr_cmd_fsm = IXR_CMD_XRAM_TRT;
                 break;
                 ////////////////////////
             case IXR_CMD_CLEANUP_IDLE:
                 if     (r_read_to_ixr_cmd_req.read())       r_ixr_cmd_fsm = IXR_CMD_READ_TRT;
-                else if(r_write_to_ixr_cmd_req.read())      r_ixr_cmd_fsm = IXR_CMD_WRITE_TRT;
-                else if(r_cas_to_ixr_cmd_req.read())        r_ixr_cmd_fsm = IXR_CMD_CAS_TRT;
-                else if(r_xram_rsp_to_ixr_cmd_req.read())   r_ixr_cmd_fsm = IXR_CMD_XRAM_TRT;
-                else if(r_config_to_ixr_cmd_req.read())     r_ixr_cmd_fsm = IXR_CMD_CONFIG_TRT;
-                else if(r_cleanup_to_ixr_cmd_req)           r_ixr_cmd_fsm = IXR_CMD_CLEANUP_TRT;
+                else if (r_write_to_ixr_cmd_req.read())      r_ixr_cmd_fsm = IXR_CMD_WRITE_TRT;
+                else if (r_cas_to_ixr_cmd_req.read())        r_ixr_cmd_fsm = IXR_CMD_CAS_TRT;
+                else if (r_xram_rsp_to_ixr_cmd_req.read())   r_ixr_cmd_fsm = IXR_CMD_XRAM_TRT;
+                else if (r_config_to_ixr_cmd_req.read())     r_ixr_cmd_fsm = IXR_CMD_CONFIG_TRT;
+                else if (r_cleanup_to_ixr_cmd_req)           r_ixr_cmd_fsm = IXR_CMD_CLEANUP_TRT;
                 break;      
                 /////////////////////////
@@ -4994,9 +4796,9 @@
                 {
                     if     (r_read_to_ixr_cmd_req.read())       r_ixr_cmd_fsm = IXR_CMD_READ_TRT;
-                    else if(r_write_to_ixr_cmd_req.read())      r_ixr_cmd_fsm = IXR_CMD_WRITE_TRT;
-                    else if(r_cas_to_ixr_cmd_req.read())        r_ixr_cmd_fsm = IXR_CMD_CAS_TRT;
-                    else if(r_cleanup_to_ixr_cmd_req)           r_ixr_cmd_fsm = IXR_CMD_CLEANUP_TRT;
-                    else if(r_xram_rsp_to_ixr_cmd_req.read())   r_ixr_cmd_fsm = IXR_CMD_XRAM_TRT;
-                    else if(r_config_to_ixr_cmd_req.read())     r_ixr_cmd_fsm = IXR_CMD_CONFIG_TRT;
+                    else if (r_write_to_ixr_cmd_req.read())      r_ixr_cmd_fsm = IXR_CMD_WRITE_TRT;
+                    else if (r_cas_to_ixr_cmd_req.read())        r_ixr_cmd_fsm = IXR_CMD_CAS_TRT;
+                    else if (r_cleanup_to_ixr_cmd_req)           r_ixr_cmd_fsm = IXR_CMD_CLEANUP_TRT;
+                    else if (r_xram_rsp_to_ixr_cmd_req.read())   r_ixr_cmd_fsm = IXR_CMD_XRAM_TRT;
+                    else if (r_config_to_ixr_cmd_req.read())     r_ixr_cmd_fsm = IXR_CMD_CONFIG_TRT;
                     break;
                 }
@@ -5005,5 +4807,5 @@
             case IXR_CMD_READ_TRT:       // access TRT for a GET
                 {
-                    if ( r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_CMD )
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_CMD )
                     {
                         TransactionTabEntry entry = m_trt.read( r_read_to_ixr_cmd_index.read() );
@@ -5015,5 +4817,5 @@
 
 #if DEBUG_MEMC_IXR_CMD
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " IXR_CMD_READ_TRT> TRT access"
                                 << " index = " << std::dec << r_read_to_ixr_cmd_index.read()
@@ -5026,5 +4828,5 @@
             case IXR_CMD_WRITE_TRT:       // access TRT for a PUT or a GET
                 {
-                    if ( r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_CMD )
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_CMD )
                     {
                         TransactionTabEntry entry = m_trt.read( r_write_to_ixr_cmd_index.read() );
@@ -5042,5 +4844,5 @@
 
 #if DEBUG_MEMC_IXR_CMD
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " IXR_CMD_WRITE_TRT> TRT access"
                                 << " index = " << std::dec << r_write_to_ixr_cmd_index.read()
@@ -5053,5 +4855,5 @@
             case IXR_CMD_CAS_TRT:       // access TRT for a PUT or a GET 
                 {
-                    if ( r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_CMD )
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_CMD )
                     {
                         TransactionTabEntry entry = m_trt.read( r_cas_to_ixr_cmd_index.read() );
@@ -5069,5 +4871,5 @@
 
 #if DEBUG_MEMC_IXR_CMD
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " IXR_CMD_CAS_TRT> TRT access"
                                 << " index = " << std::dec << r_cas_to_ixr_cmd_index.read()
@@ -5080,5 +4882,5 @@
             case IXR_CMD_XRAM_TRT:       // access TRT for a PUT 
                 {
-                    if ( r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_CMD )
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_CMD )
                     {
                         TransactionTabEntry entry = m_trt.read( r_xram_rsp_to_ixr_cmd_index.read() );
@@ -5089,8 +4891,6 @@
                         r_ixr_cmd_fsm     = IXR_CMD_XRAM_SEND;
                         for( size_t i=0 ; i<m_words ; i++ ) r_ixr_cmd_wdata[i] = entry.wdata[i];
-
-                        m_cpt_ixr_cmd_fsm_n_trt_lock ++;
 #if DEBUG_MEMC_IXR_CMD
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " IXR_CMD_XRAM_TRT> TRT access"
                                 << " index = " << std::dec << r_xram_rsp_to_ixr_cmd_index.read()
@@ -5103,5 +4903,5 @@
             case IXR_CMD_CLEANUP_TRT:       // access TRT for a PUT 
                 {
-                    if ( r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_CMD )
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_CMD )
                     {
 
@@ -5115,5 +4915,5 @@
 
 #if DEBUG_MEMC_IXR_CMD
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " IXR_CMD_CLEANUP_TRT> TRT access"
                                 << " index = " << std::dec << r_cleanup_to_ixr_cmd_index.read()
@@ -5126,5 +4926,5 @@
             case IXR_CMD_CONFIG_TRT:       // access TRT for a PUT
                 {
-                    if ( r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_CMD )
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_CMD )
                     {
                         TransactionTabEntry entry = m_trt.read( r_config_to_ixr_cmd_index.read() );
@@ -5137,5 +4937,5 @@
 
 #if DEBUG_MEMC_IXR_CMD
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " IXR_CMD_CONFIG_TRT> TRT access"
                                 << " index = " << std::dec << r_config_to_ixr_cmd_index.read()
@@ -5149,5 +4949,5 @@
             case IXR_CMD_READ_SEND:      // send a get from READ FSM
                 {
-                    if(p_vci_ixr.cmdack)
+                    if (p_vci_ixr.cmdack)
                     {
                         r_ixr_cmd_fsm         = IXR_CMD_READ_IDLE;
@@ -5155,5 +4955,5 @@
 
 #if DEBUG_MEMC_IXR_CMD
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " IXR_CMD_READ_SEND> GET request:" << std::hex
                                 << " address = " << r_ixr_cmd_address.read() + (r_ixr_cmd_word.read()<<2) << std::endl;
@@ -5165,9 +4965,9 @@
             case IXR_CMD_WRITE_SEND:     // send a put or get from WRITE FSM
                 {
-                    if(p_vci_ixr.cmdack)
+                    if (p_vci_ixr.cmdack)
                     {
                         if (not r_ixr_cmd_get.read())   // PUT
                         {
-                            if(r_ixr_cmd_word.read() == (m_words - 2))
+                            if (r_ixr_cmd_word.read() == (m_words - 2))
                             {
                                 r_ixr_cmd_fsm          = IXR_CMD_WRITE_IDLE;
@@ -5180,5 +4980,5 @@
 
 #if DEBUG_MEMC_IXR_CMD
-                            if(m_debug)
+                            if (m_debug)
                                 std::cout << "  <MEMC " << name() << " IXR_CMD_WRITE_SEND> PUT request:" << std::hex
                                     << " address = " << r_ixr_cmd_address.read() + (r_ixr_cmd_word.read()<<2) << std::endl;
@@ -5191,5 +4991,5 @@
 
 #if DEBUG_MEMC_IXR_CMD
-                            if(m_debug)
+                            if (m_debug)
                                 std::cout << "  <MEMC " << name() << " IXR_CMD_WRITE_SEND> GET request:" << std::hex
                                     << " address = " << r_ixr_cmd_address.read() + (r_ixr_cmd_word.read()<<2) << std::endl;
@@ -5202,9 +5002,9 @@
             case IXR_CMD_CAS_SEND:      // send a put or get command from CAS FSM
                 {
-                    if(p_vci_ixr.cmdack)
+                    if (p_vci_ixr.cmdack)
                     {
                         if (not r_ixr_cmd_get.read()) // PUT
                         {
-                            if(r_ixr_cmd_word.read() == (m_words - 2))
+                            if (r_ixr_cmd_word.read() == (m_words - 2))
                             {
                                 r_ixr_cmd_fsm        = IXR_CMD_CAS_IDLE;
@@ -5217,5 +5017,5 @@
 
 #if DEBUG_MEMC_IXR_CMD
-                            if(m_debug)
+                            if (m_debug)
                                 std::cout << "  <MEMC " << name() << " IXR_CMD_CAS_SEND> PUT request:" << std::hex
                                     << " address = " << r_ixr_cmd_address.read() + (r_ixr_cmd_word.read()<<2) << std::endl;
@@ -5228,5 +5028,5 @@
 
 #if DEBUG_MEMC_IXR_CMD
-                            if(m_debug)
+                            if (m_debug)
                                 std::cout << "  <MEMC " << name() << " IXR_CMD_CAS_SEND> GET request:" << std::hex
                                     << " address = " << r_ixr_cmd_address.read() + (r_ixr_cmd_word.read()<<2) << std::endl;
@@ -5239,7 +5039,7 @@
             case IXR_CMD_XRAM_SEND:     // send a put from XRAM_RSP FSM
                 {
-                    if(p_vci_ixr.cmdack.read())
-                    {
-                        if(r_ixr_cmd_word.read() == (m_words - 2))
+                    if (p_vci_ixr.cmdack.read())
+                    {
+                        if (r_ixr_cmd_word.read() == (m_words - 2))
                         {
                             r_ixr_cmd_fsm = IXR_CMD_XRAM_IDLE;
@@ -5251,5 +5051,5 @@
                         }
 #if DEBUG_MEMC_IXR_CMD
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " IXR_CMD_XRAM_SEND> PUT request:" << std::hex
                                 << " address = " << r_ixr_cmd_address.read() + (r_ixr_cmd_word.read()<<2) << std::endl;
@@ -5262,7 +5062,7 @@
             case IXR_CMD_CLEANUP_DATA_SEND:     // send a put command to XRAM
                 {
-                    if(p_vci_ixr.cmdack.read())
-                    {
-                        if(r_ixr_cmd_word.read() == (m_words - 2))
+                    if (p_vci_ixr.cmdack.read())
+                    {
+                        if (r_ixr_cmd_word.read() == (m_words - 2))
                         {
                             r_ixr_cmd_fsm = IXR_CMD_CLEANUP_IDLE;
@@ -5277,5 +5077,5 @@
 
 #if DEBUG_MEMC_IXR_CMD
-                        if(m_debug)
+                        if (m_debug)
                         {
                             std::cout << "  <MEMC " << name() << ".IXR_CMD_CLEANUP_DATA_SEND> Send a put request to xram" << std::endl;
@@ -5289,7 +5089,7 @@
             case IXR_CMD_CONFIG_SEND:     // send a put from CONFIG FSM
                 {
-                    if(p_vci_ixr.cmdack.read())
-                    {
-                        if(r_ixr_cmd_word.read() == (m_words - 2))
+                    if (p_vci_ixr.cmdack.read())
+                    {
+                        if (r_ixr_cmd_word.read() == (m_words - 2))
                         {
                             r_ixr_cmd_fsm = IXR_CMD_CONFIG_IDLE;
@@ -5302,5 +5102,5 @@
 
 #if DEBUG_MEMC_IXR_CMD
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " IXR_CMD_CONFIG_SEND> PUT request:" << std::hex
                                 << " address = " << r_ixr_cmd_address.read() + (r_ixr_cmd_word.read()<<2) << std::endl;
@@ -5337,5 +5137,5 @@
             case IXR_RSP_IDLE:  // test transaction type: PUT/GET
                 {
-                    if(p_vci_ixr.rspval.read())
+                    if (p_vci_ixr.rspval.read())
                     {
                         r_ixr_rsp_cpt       = 0;
@@ -5345,5 +5145,5 @@
                                 "MEMC ERROR in IXR_RSP state: XRAM response error !");
 
-                        if(p_vci_ixr.reop.read())   // PUT
+                        if (p_vci_ixr.reop.read())   // PUT
                         {
                             r_ixr_rsp_fsm = IXR_RSP_TRT_ERASE;
@@ -5355,5 +5155,5 @@
 
 #if DEBUG_MEMC_IXR_RSP
-                            if(m_debug)
+                            if (m_debug)
                                 std::cout << "  <MEMC " << name()
                                     << " IXR_RSP_IDLE> Response from XRAM to a get transaction" << std::endl;
@@ -5374,5 +5174,5 @@
                 // decrease the line counter if config request
                 {
-                    if(r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_RSP)
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_RSP)
                     {
                         size_t  index = r_ixr_rsp_trt_index.read(); 
@@ -5388,8 +5188,6 @@
                             r_ixr_rsp_fsm = IXR_RSP_IDLE;
                         }
-
-                        m_cpt_ixr_rsp_fsm_n_trt_lock ++;
 #if DEBUG_MEMC_IXR_RSP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " IXR_RSP_TRT_ERASE> Erase TRT entry "
                                 << r_ixr_rsp_trt_index.read() << std::endl;
@@ -5401,5 +5199,5 @@
             case IXR_RSP_TRT_READ:    // write a 64 bits data in the TRT
                 {
-                    if((r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_RSP) and  p_vci_ixr.rspval)
+                    if ((r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_RSP) and  p_vci_ixr.rspval)
                     {
                         size_t      index    = r_ixr_rsp_trt_index.read();
@@ -5418,5 +5216,5 @@
                         r_ixr_rsp_cpt = word + 2;
 
-                        if(eop)
+                        if (eop)
                         {
                             r_ixr_rsp_to_xram_rsp_rok[r_ixr_rsp_trt_index.read()]=true;
@@ -5425,5 +5223,5 @@
 
 #if DEBUG_MEMC_IXR_RSP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " IXR_RSP_TRT_READ> Writing a word in TRT : "
                                 << " index = " << std::dec << index
@@ -5431,7 +5229,5 @@
                                 << " / data = " << std::hex << data << std::endl;
 #endif
-                        m_cpt_ixr_rsp_fsm_n_trt_lock ++;
-                    }
-                    m_cpt_ixr_fsm_trt_lock++;
+                    }
                     break;
                 }
@@ -5471,5 +5267,5 @@
                     {
                         size_t index = (i+old+1) %lines;
-                        if(r_ixr_rsp_to_xram_rsp_rok[index])
+                        if (r_ixr_rsp_to_xram_rsp_rok[index])
                         {
                             r_xram_rsp_trt_index             = index;
@@ -5478,5 +5274,5 @@
 
 #if DEBUG_MEMC_XRAM_RSP
-                            if(m_debug)
+                            if (m_debug)
                                 std::cout << "  <MEMC " << name() << " XRAM_RSP_IDLE>"
                                     << " Available cache line in TRT:"
@@ -5492,5 +5288,5 @@
                 // Copy the TRT entry in a local buffer
                 {
-                    if((r_alloc_dir_fsm.read() == ALLOC_DIR_XRAM_RSP) and
+                    if ((r_alloc_dir_fsm.read() == ALLOC_DIR_XRAM_RSP) and
                             (r_alloc_trt_fsm.read() == ALLOC_TRT_XRAM_RSP))
                     {
@@ -5501,13 +5297,9 @@
 
 #if DEBUG_MEMC_XRAM_RSP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " XRAM_RSP_DIR_LOCK>"
                                 << " Get access to DIR and TRT" << std::endl;
 #endif
-                        m_cpt_xram_rsp_fsm_n_dir_lock++;
-                        m_cpt_xram_rsp_fsm_n_trt_lock++;
-                    }
-                    m_cpt_xram_rsp_fsm_dir_lock++;
-                    m_cpt_xram_rsp_fsm_trt_lock++;
+                    }
                     break;
                 }
@@ -5528,8 +5320,8 @@
                     DirectoryEntry victim(m_cache_directory.select(set, way));
 
-                    if( way == -1) 
+                    if (way == -1) 
                     {
 #if DEBUG_MEMC_XRAM_RSP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " XRAM_RSP_TRT_COPY>"
                             << " not a disponible victim"
@@ -5559,9 +5351,9 @@
                     assert( victim.state != ENTRY_LOCKED && "XRAM RSP SELECTED A LOCKED VICTIM ");
 
-                    if( not r_xram_rsp_trt_buf.rerror ) r_xram_rsp_fsm = XRAM_RSP_IVT_LOCK;
+                    if (not r_xram_rsp_trt_buf.rerror ) r_xram_rsp_fsm = XRAM_RSP_IVT_LOCK;
                     else                                r_xram_rsp_fsm = XRAM_RSP_ERROR_ERASE;
                     
 #if DEBUG_MEMC_XRAM_RSP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " XRAM_RSP_TRT_COPY>"
                             << " Select a victim slot: "
@@ -5585,13 +5377,13 @@
                             "MEMC ERROR in XRAM_RSP_IVT_LOCK state: Bad TRT allocation");
 
-                    if(r_alloc_ivt_fsm == ALLOC_IVT_XRAM_RSP)
+                    if (r_alloc_ivt_fsm == ALLOC_IVT_XRAM_RSP)
                     {
                         size_t index = 0;
-                        if(m_ivt.search_inval(r_xram_rsp_trt_buf.nline, index))  // pending inval
+                        if (m_ivt.search_inval(r_xram_rsp_trt_buf.nline, index))  // pending inval
                         {
                             r_xram_rsp_fsm = XRAM_RSP_INVAL_WAIT;
 
 #if DEBUG_MEMC_XRAM_RSP
-                            if(m_debug)
+                            if (m_debug)
                                 std::cout << "  <MEMC " << name() << " XRAM_RSP_IVT_LOCK>"
                                     << " Get acces to IVT, but line invalidation registered"
@@ -5601,10 +5393,10 @@
 
                         }
-                        else if(m_ivt.is_full() and r_xram_rsp_victim_inval.read()) // IVT full
+                        else if (m_ivt.is_full() and r_xram_rsp_victim_inval.read()) // IVT full
                         {
                             r_xram_rsp_fsm = XRAM_RSP_INVAL_WAIT;
 
 #if DEBUG_MEMC_XRAM_RSP
-                            if(m_debug)
+                            if (m_debug)
                                 std::cout << "  <MEMC " << name() << " XRAM_RSP_IVT_LOCK>"
                                     << " Get acces to IVT, but inval required and IVT full" << std::endl;
@@ -5616,5 +5408,5 @@
 
 #if DEBUG_MEMC_XRAM_RSP
-                            if(m_debug)
+                            if (m_debug)
                                 std::cout << "  <MEMC " << name() << " XRAM_RSP_IVT_LOCK>"
                                     << " Get acces to IVT / no pending inval request" << std::endl;
@@ -5629,5 +5421,5 @@
 
 #if DEBUG_MEMC_XRAM_RSP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " XRAM_RSP_INVAL_WAIT>"
                             << " Release all locks and retry" << std::endl;
@@ -5680,5 +5472,5 @@
                     DirectoryEntry entry;
 
-                    if(inst_read and (r_xram_rsp_trt_buf.proc_read))
+                    if (inst_read and (r_xram_rsp_trt_buf.proc_read))
                     {
                         entry.state = ENTRY_SHARED;
@@ -5694,5 +5486,5 @@
                     entry.tag     = r_xram_rsp_trt_buf.nline / m_sets;
                     entry.ptr     = 0;
-                    if(cached_read and r_xram_rsp_trt_buf.proc_read)
+                    if (cached_read and r_xram_rsp_trt_buf.proc_read)
                     {
                         entry.owner.srcid   = r_xram_rsp_trt_buf.srcid;
@@ -5710,5 +5502,5 @@
                     r_xram_rsp_coherent = inst_read; 
                     // request an invalidattion request in IVT for victim line
-                    if(r_xram_rsp_victim_inval.read())
+                    if (r_xram_rsp_victim_inval.read())
                     {
                         bool   broadcast    = r_xram_rsp_victim_is_cnt.read();
@@ -5743,5 +5535,5 @@
                    // }
 #if DEBUG_MEMC_XRAM_RSP
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout << "  <MEMC " << name() << " XRAM_RSP_DIR_UPDT>"
@@ -5754,5 +5546,5 @@
                             << " / nline = " << r_xram_rsp_trt_buf.nline
                             << " / is_cnt = " << entry.is_cnt << std::endl;
-                        if(r_xram_rsp_victim_inval.read())
+                        if (r_xram_rsp_victim_inval.read())
                             std::cout << "                           Invalidation request for victim line "
                                 << std::hex << r_xram_rsp_victim_nline.read()
@@ -5763,12 +5555,12 @@
                     // If the victim is not dirty (RWT: if it is not coherent, we can not know wether it is dirty or not), we don't need another XRAM  put transaction,
                     // and we can erase the TRT entry
-                    if( (not r_xram_rsp_victim_dirty.read()) or (r_xram_rsp_victim_state.read() == ENTRY_INVALID))  
+                    if ((not r_xram_rsp_victim_dirty.read()) or (r_xram_rsp_victim_state.read() == ENTRY_INVALID))  
                     {
                         m_trt.erase(r_xram_rsp_trt_index.read());
                     }
                     // Next state
-                    if(r_xram_rsp_victim_dirty.read())       r_xram_rsp_fsm = XRAM_RSP_TRT_DIRTY;
-                    else if(r_xram_rsp_trt_buf.proc_read)    r_xram_rsp_fsm = XRAM_RSP_DIR_RSP;
-                    else if(r_xram_rsp_victim_inval.read())  r_xram_rsp_fsm = XRAM_RSP_INVAL;
+                    if (r_xram_rsp_victim_dirty.read())       r_xram_rsp_fsm = XRAM_RSP_TRT_DIRTY;
+                    else if (r_xram_rsp_trt_buf.proc_read)    r_xram_rsp_fsm = XRAM_RSP_DIR_RSP;
+                    else if (r_xram_rsp_victim_inval.read())  r_xram_rsp_fsm = XRAM_RSP_INVAL;
                     else                                     r_xram_rsp_fsm = XRAM_RSP_IDLE;
                     break;
@@ -5777,5 +5569,5 @@
             case XRAM_RSP_TRT_DIRTY:  // set the TRT entry (write to XRAM) if the victim is dirty or not coherent (RWT)
                 {
-                    if(r_alloc_trt_fsm.read() == ALLOC_TRT_XRAM_RSP)
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_XRAM_RSP)
                     {
                         std::vector<data_t> data_vector;
@@ -5798,5 +5590,5 @@
                                    data_vector);
 #if DEBUG_MEMC_XRAM_RSP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " XRAM_RSP_TRT_DIRTY>"
                                 << " Set TRT entry for the put transaction"
@@ -5804,14 +5596,10 @@
 #endif
 
-                        //        if( not r_xram_rsp_victim_coherent )
+                        //        if (not r_xram_rsp_victim_coherent )
                         //            std::cout << "a victim coherent not sent trt index =" << r_xram_rsp_trt_index.read() << std::endl;
-                        if(r_xram_rsp_trt_buf.proc_read)         r_xram_rsp_fsm = XRAM_RSP_DIR_RSP;
-                        else if(r_xram_rsp_victim_inval.read())  r_xram_rsp_fsm = XRAM_RSP_INVAL;
+                        if (r_xram_rsp_trt_buf.proc_read)         r_xram_rsp_fsm = XRAM_RSP_DIR_RSP;
+                        else if (r_xram_rsp_victim_inval.read())  r_xram_rsp_fsm = XRAM_RSP_INVAL;
                         else                                     r_xram_rsp_fsm = XRAM_RSP_WRITE_DIRTY;
-                        m_cpt_xram_rsp_fsm_n_trt_lock++;
-                    }
-
-                    m_cpt_xram_rsp_fsm_trt_lock++;
-
+                    }
                     break;
                 }
@@ -5819,5 +5607,5 @@
             case XRAM_RSP_DIR_RSP:     // Request a response to TGT_RSP FSM
                 {
-                    if( not r_xram_rsp_to_tgt_rsp_req.read())
+                    if (not r_xram_rsp_to_tgt_rsp_req.read())
                     {
                         r_xram_rsp_to_tgt_rsp_srcid = r_xram_rsp_trt_buf.srcid;
@@ -5842,10 +5630,10 @@
 
 
-                        if(r_xram_rsp_victim_inval)      r_xram_rsp_fsm = XRAM_RSP_INVAL;
-                        else if(r_xram_rsp_victim_dirty) r_xram_rsp_fsm = XRAM_RSP_WRITE_DIRTY;
+                        if (r_xram_rsp_victim_inval)      r_xram_rsp_fsm = XRAM_RSP_INVAL;
+                        else if (r_xram_rsp_victim_dirty) r_xram_rsp_fsm = XRAM_RSP_WRITE_DIRTY;
                         else                             r_xram_rsp_fsm = XRAM_RSP_IDLE;
 
 #if DEBUG_MEMC_XRAM_RSP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " XRAM_RSP_DIR_RSP>"
                                 << " Request the TGT_RSP FSM to return data:"
@@ -5861,5 +5649,5 @@
             case XRAM_RSP_INVAL:  // send invalidate request to CC_SEND FSM
                 {
-                    if(!r_xram_rsp_to_cc_send_multi_req.read() and
+                    if (!r_xram_rsp_to_cc_send_multi_req.read() and
                             !r_xram_rsp_to_cc_send_brdcast_req.read())
                     {
@@ -5877,12 +5665,12 @@
                         r_xram_rsp_next_ptr                = r_xram_rsp_victim_ptr.read();
 
-                        if(r_xram_rsp_victim_dirty.read() and (r_xram_rsp_victim_state.read() == ENTRY_SHARED))  
+                        if (r_xram_rsp_victim_dirty.read() and (r_xram_rsp_victim_state.read() == ENTRY_SHARED))  
                                                      r_xram_rsp_fsm = XRAM_RSP_WRITE_DIRTY;
-                        else if(not_last_multi_req)  r_xram_rsp_fsm = XRAM_RSP_HEAP_REQ;
+                        else if (not_last_multi_req)  r_xram_rsp_fsm = XRAM_RSP_HEAP_REQ;
                         else                         r_xram_rsp_fsm = XRAM_RSP_IDLE;
 
                         // std::cout << "cleanup sent for trt index =" << r_xram_rsp_trt_index.read() << std::endl;
 #if DEBUG_MEMC_XRAM_RSP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " XRAM_RSP_INVAL>"
                                 << " Send an inval request to CC_SEND FSM"
@@ -5893,5 +5681,5 @@
                     {
 #if DEBUG_MEMC_XRAM_RSP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " XRAM_RSP_INVAL>"
                                 << " multi req = " << r_xram_rsp_to_cc_send_multi_req.read()
@@ -5904,7 +5692,7 @@
             case XRAM_RSP_WRITE_DIRTY:  // send a write request to IXR_CMD FSM
                 {
-                    if ( not r_xram_rsp_to_ixr_cmd_req.read() )
-                    {
-                        if((r_xram_rsp_victim_state.read() == ENTRY_EXCLUSIVE) and (r_xram_rsp_victim_count.read() == 1))
+                    if (not r_xram_rsp_to_ixr_cmd_req.read() )
+                    {
+                        if ((r_xram_rsp_victim_state.read() == ENTRY_EXCLUSIVE) and (r_xram_rsp_victim_count.read() == 1))
                         {
                             std::cout << "can't send a trt req when the line state is exlusive" << std::endl;
@@ -5914,5 +5702,7 @@
                         r_xram_rsp_to_ixr_cmd_index = r_xram_rsp_trt_index.read();
 
+                        // <Activity counters>
                         m_cpt_write_dirty++;
+                        // </Activity counters>
 
                         bool multi_req = not r_xram_rsp_victim_is_cnt.read() and 
@@ -5920,9 +5710,9 @@
                         bool not_last_multi_req = multi_req and (r_xram_rsp_victim_count.read() != 1);
 
-                        if(not_last_multi_req)   r_xram_rsp_fsm = XRAM_RSP_HEAP_REQ;
+                        if (not_last_multi_req)   r_xram_rsp_fsm = XRAM_RSP_HEAP_REQ;
                         else                     r_xram_rsp_fsm = XRAM_RSP_IDLE;
 
 #if DEBUG_MEMC_XRAM_RSP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " XRAM_RSP_WRITE_DIRTY>"
                                 << " Send the put request to IXR_CMD FSM"
@@ -5935,18 +5725,14 @@
             case XRAM_RSP_HEAP_REQ:    // Get the lock to the HEAP
                 {
-                    if(r_alloc_heap_fsm.read() == ALLOC_HEAP_XRAM_RSP)
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_XRAM_RSP)
                     {
                         r_xram_rsp_fsm = XRAM_RSP_HEAP_ERASE;
-                        m_cpt_xram_rsp_fsm_n_heap_lock++;
                     }
 
 #if DEBUG_MEMC_XRAM_RSP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " XRAM_RSP_HEAP_REQ>"
                             << " Requesting HEAP lock" << std::endl;
 #endif
-
-                    m_cpt_xram_rsp_fsm_heap_lock++;
-
                     break;
                 }
@@ -5954,5 +5740,5 @@
             case XRAM_RSP_HEAP_ERASE: // erase the copies and send invalidations
                 {
-                    if(r_alloc_heap_fsm.read() == ALLOC_HEAP_XRAM_RSP)
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_XRAM_RSP)
                     {
                         HeapEntry entry = m_heap.read(r_xram_rsp_next_ptr.read());
@@ -5961,8 +5747,8 @@
                         xram_rsp_to_cc_send_fifo_inst  = entry.owner.inst;
                         xram_rsp_to_cc_send_fifo_put   = true;
-                        if(m_xram_rsp_to_cc_send_inst_fifo.wok())
+                        if (m_xram_rsp_to_cc_send_inst_fifo.wok())
                         {
                             r_xram_rsp_next_ptr = entry.next;
-                            if(entry.next == r_xram_rsp_next_ptr.read())   // last copy
+                            if (entry.next == r_xram_rsp_next_ptr.read())   // last copy
                             {
                                 r_xram_rsp_to_cc_send_multi_req = true;
@@ -5980,5 +5766,5 @@
 
 #if DEBUG_MEMC_XRAM_RSP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " XRAM_RSP_HEAP_ERASE>"
                                 << " Erase copy:"
@@ -5994,5 +5780,5 @@
             case XRAM_RSP_HEAP_LAST:  // last copy
                 {
-                    if(r_alloc_heap_fsm.read() != ALLOC_HEAP_XRAM_RSP)
+                    if (r_alloc_heap_fsm.read() != ALLOC_HEAP_XRAM_RSP)
                     {
                         std::cout << "VCI_MEM_CACHE ERROR " << name() << " XRAM_RSP_HEAP_LAST"
@@ -6005,5 +5791,5 @@
                     last_entry.owner.srcid    = 0;
                     last_entry.owner.inst     = false;
-                    if(m_heap.is_full())
+                    if (m_heap.is_full())
                     {
                         last_entry.next     = r_xram_rsp_next_ptr.read();
@@ -6021,5 +5807,5 @@
 
 #if DEBUG_MEMC_XRAM_RSP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " XRAM_RSP_HEAP_LAST>"
                             << " Heap housekeeping" << std::endl;
@@ -6033,9 +5819,9 @@
 
                     // Next state
-                    if(r_xram_rsp_trt_buf.proc_read) r_xram_rsp_fsm = XRAM_RSP_ERROR_RSP;
+                    if (r_xram_rsp_trt_buf.proc_read) r_xram_rsp_fsm = XRAM_RSP_ERROR_RSP;
                     else                             r_xram_rsp_fsm = XRAM_RSP_IDLE;
 
 #if DEBUG_MEMC_XRAM_RSP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " XRAM_RSP_ERROR_ERASE>"
                             << " Error reported by XRAM / erase the TRT entry" << std::endl;
@@ -6046,5 +5832,5 @@
             case XRAM_RSP_ERROR_RSP:     // Request an error response to TGT_RSP FSM
                 {
-                    if(!r_xram_rsp_to_tgt_rsp_req.read())
+                    if (!r_xram_rsp_to_tgt_rsp_req.read())
                     {
                         r_xram_rsp_to_tgt_rsp_srcid  = r_xram_rsp_trt_buf.srcid;
@@ -6063,5 +5849,5 @@
 
 #if DEBUG_MEMC_XRAM_RSP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name()
                                 << " XRAM_RSP_ERROR_RSP> Request a response error to TGT_RSP FSM:"
@@ -6085,52 +5871,43 @@
             case CLEANUP_IDLE:     // Get first DSPIN flit of the CLEANUP command
                 {
-                    if(not m_cc_receive_to_cleanup_fifo.rok()) break;
+                    if (not m_cc_receive_to_cleanup_fifo.rok()) break;
 
                     uint64_t flit = m_cc_receive_to_cleanup_fifo.read();
 
                     uint32_t srcid =
-                        DspinDhccpParam::dspin_get(
+                        DspinHmesiParam::dspin_get(
                                 flit,
-                                DspinDhccpParam::CLEANUP_SRCID);
+                                DspinHmesiParam::CLEANUP_SRCID);
 
                     uint8_t type =
-                        DspinDhccpParam::dspin_get(
+                        DspinHmesiParam::dspin_get(
                                 flit,
-                                DspinDhccpParam::P2M_TYPE);
+                                DspinHmesiParam::P2M_TYPE);
 
                     r_cleanup_way_index =
-                        DspinDhccpParam::dspin_get(
+                        DspinHmesiParam::dspin_get(
                                 flit,
-                                DspinDhccpParam::CLEANUP_WAY_INDEX);
+                                DspinHmesiParam::CLEANUP_WAY_INDEX);
 
                     r_cleanup_nline =
-                        DspinDhccpParam::dspin_get(
+                        DspinHmesiParam::dspin_get(
                                 flit,
-                                DspinDhccpParam::CLEANUP_NLINE_MSB) << 32;
-
-                    r_cleanup_inst  = (type == DspinDhccpParam::TYPE_CLEANUP_INST);
+                                DspinHmesiParam::CLEANUP_NLINE_MSB) << 32;
+
+                    r_cleanup_inst  = (type == DspinHmesiParam::TYPE_CLEANUP_INST);
                     r_cleanup_srcid = srcid;
                     r_cleanup_ncc = 
-                        DspinDhccpParam::dspin_get(
+                        DspinHmesiParam::dspin_get(
                                 flit,
-                                DspinDhccpParam::DATA_NO_SHARED);
+                                DspinHmesiParam::DATA_NO_SHARED);
 
                     assert( (srcid < m_initiators) and
                             "MEMC ERROR in CLEANUP_IDLE state : illegal SRCID value");
 
-                    // <Activity Counters>
-                    if (is_local_req(srcid)) {
-                        m_cpt_cleanup_local++;
-                    }
-                    else {
-                        m_cpt_cleanup_remote++;
-                        m_cpt_cleanup_cost += req_distance(srcid);
-                    }
-                    // </Activity Counters>
                     cc_receive_to_cleanup_fifo_get = true;
                     r_cleanup_fsm                  = CLEANUP_GET_NLINE;
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout
@@ -6138,8 +5915,8 @@
                             << " CLEANUP_IDLE> Cleanup request:" << std::hex
                             << " / owner_id = "   << srcid
-                            << " / owner_ins = "  << (type == DspinDhccpParam::TYPE_CLEANUP_INST)
-                            << " / ncc = " << DspinDhccpParam::dspin_get(
+                            << " / owner_ins = "  << (type == DspinHmesiParam::TYPE_CLEANUP_INST)
+                            << " / ncc = " << DspinHmesiParam::dspin_get(
                                     flit,
-                                    DspinDhccpParam::DATA_NO_SHARED)
+                                    DspinHmesiParam::DATA_NO_SHARED)
                             << std::endl;
                     }
@@ -6151,14 +5928,15 @@
             case CLEANUP_GET_NLINE:  // GET second DSPIN flit of the cleanup command
                 {
-                    if(not m_cc_receive_to_cleanup_fifo.rok()) break;
+                    if (not m_cc_receive_to_cleanup_fifo.rok()) break;
 
                     uint64_t flit = m_cc_receive_to_cleanup_fifo.read();
+                    uint32_t srcid = r_cleanup_srcid.read();
 
                     addr_t nline = r_cleanup_nline.read() |
-                        DspinDhccpParam::dspin_get(flit, DspinDhccpParam::CLEANUP_NLINE_LSB);
+                        DspinHmesiParam::dspin_get(flit, DspinHmesiParam::CLEANUP_NLINE_LSB);
 
                     //A MODIFIER POUR DIRTY //
                     bool eop =
-                        DspinDhccpParam::dspin_get(flit, DspinDhccpParam::P2M_EOP) == 0x1;
+                        DspinHmesiParam::dspin_get(flit, DspinHmesiParam::P2M_EOP) == 0x1;
                     if (! eop)
                     {
@@ -6166,21 +5944,38 @@
                         r_cleanup_data_index    = 0;
                         r_cleanup_contains_data = true;
-                        m_cpt_cleanup_with_data ++;
+                        // <Activity Counters>
+                        if (is_local_req(srcid)) {
+                            m_cpt_cleanup_local++;
+                            m_cpt_cleanup_data_local++;
+                        }
+                        else {
+                            m_cpt_cleanup_remote++;
+                            m_cpt_cleanup_data_remote++;
+                        }
+                        // 2 + m_words flits for cleanup with data
+                        m_cpt_cleanup_cost += (m_words + 2) * req_distance(srcid);
+                        m_cpt_cleanup_data_cost += (m_words + 2)  * req_distance(srcid);
+                        // </Activity Counters>
                     }
                     else
                     {
-                       /*// if( (r_write_to_cleanup_req.read() == true) and (r_write_to_cleanup_nline.read() == nline ))
-                        {
-                            std::cout << "receive write nline without data" << std::hex << nline << std::endl;
-
-                        }*/
                         r_cleanup_contains_data = false;
                         r_cleanup_fsm = CLEANUP_DIR_REQ;
+                        // <Activity Counters>
+                        if (is_local_req(srcid)) {
+                            m_cpt_cleanup_local++;
+                        }
+                        else {
+                            m_cpt_cleanup_remote++;
+                        }
+                        // 2 flits for cleanup without data
+                        m_cpt_cleanup_cost += 2 * req_distance(srcid);
+                        // </Activity Counters>
                     }
                     cc_receive_to_cleanup_fifo_get = true;
-                    r_cleanup_nline                = nline;
+                    r_cleanup_nline = nline;
                     
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout
@@ -6203,13 +5998,13 @@
 
                         uint32_t data = 
-                            DspinDhccpParam::dspin_get (flit, DspinDhccpParam::CLEANUP_DATA_UPDT);
-
-                        if( (r_write_to_cleanup_req.read() == true) and (r_write_to_cleanup_nline.read() == r_cleanup_nline.read()) )
+                            DspinHmesiParam::dspin_get (flit, DspinHmesiParam::CLEANUP_DATA_UPDT);
+
+                        if ((r_write_to_cleanup_req.read() == true) and (r_write_to_cleanup_nline.read() == r_cleanup_nline.read()) )
                         {
                             data_t mask = 0;
-                            if(r_write_to_cleanup_be[r_cleanup_data_index.read()].read() & 0x1) mask = mask | 0x000000FF;
-                            if(r_write_to_cleanup_be[r_cleanup_data_index.read()].read() & 0x2) mask = mask | 0x0000FF00;
-                            if(r_write_to_cleanup_be[r_cleanup_data_index.read()].read() & 0x4) mask = mask | 0x00FF0000;
-                            if(r_write_to_cleanup_be[r_cleanup_data_index.read()].read() & 0x8) mask = mask | 0xFF000000;
+                            if (r_write_to_cleanup_be[r_cleanup_data_index.read()].read() & 0x1) mask = mask | 0x000000FF;
+                            if (r_write_to_cleanup_be[r_cleanup_data_index.read()].read() & 0x2) mask = mask | 0x0000FF00;
+                            if (r_write_to_cleanup_be[r_cleanup_data_index.read()].read() & 0x4) mask = mask | 0x00FF0000;
+                            if (r_write_to_cleanup_be[r_cleanup_data_index.read()].read() & 0x8) mask = mask | 0xFF000000;
         
                             // complete only if mask is not null (for energy consumption)
@@ -6231,5 +6026,5 @@
                         }
 #if DEBUG_MEMC_CLEANUP
-                        if(m_debug)
+                        if (m_debug)
                         {
                             std::cout
@@ -6247,6 +6042,5 @@
             case CLEANUP_DIR_REQ:   // Get the lock to the directory
                 {
-                    m_cpt_cleanup_fsm_dir_lock++;
-                    if(r_alloc_dir_fsm.read() != ALLOC_DIR_CLEANUP) break;
+                    if (r_alloc_dir_fsm.read() != ALLOC_DIR_CLEANUP) break;
 
                     r_cleanup_fsm = CLEANUP_DIR_LOCK;
@@ -6254,10 +6048,7 @@
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CLEANUP_DIR_REQ> Requesting DIR lock" << std::endl;
 #endif
-
-                    m_cpt_cleanup_fsm_n_dir_lock++;
-
                     break;
                 }
@@ -6267,5 +6058,5 @@
                 {
                     // test directory status
-                    if(r_alloc_dir_fsm.read() != ALLOC_DIR_CLEANUP)
+                    if (r_alloc_dir_fsm.read() != ALLOC_DIR_CLEANUP)
                     {
                         std::cout
@@ -6292,5 +6083,5 @@
                     r_cleanup_state        = entry.state;
 
-                    if(entry.state == ENTRY_LOCKED)      
+                    if (entry.state == ENTRY_LOCKED)      
                     {
                         assert(
@@ -6302,5 +6093,5 @@
                         r_cleanup_fsm = CLEANUP_LOCKED_IVT_LOCK;
                     }
-                    else if(entry.state == ENTRY_INVALID)
+                    else if (entry.state == ENTRY_INVALID)
                     {
                         r_cleanup_fsm = CLEANUP_MISS_IVT_LOCK;
@@ -6313,9 +6104,9 @@
                                 "In CLEANUP_DIR_LOCK, CLEANUP command on a valid entry "
                                 "with no copies");
-                        if((entry.state == ENTRY_SHARED) and (entry.is_cnt == true))
+                        if ((entry.state == ENTRY_SHARED) and (entry.is_cnt == true))
                         {
                             r_cleanup_fsm = CLEANUP_DIR_WRITE;
                         }
-                        else if((entry.state == ENTRY_EXCLUSIVE) or (entry.count == 1))
+                        else if ((entry.state == ENTRY_EXCLUSIVE) or (entry.count == 1))
                         {
                             r_cleanup_fsm = CLEANUP_DIR_WRITE;
@@ -6328,5 +6119,5 @@
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout
@@ -6353,5 +6144,5 @@
                 {
                     // Update the directory entry without heap access
-                    if(r_alloc_dir_fsm.read() != ALLOC_DIR_CLEANUP)
+                    if (r_alloc_dir_fsm.read() != ALLOC_DIR_CLEANUP)
                     {
                         std::cout
@@ -6370,5 +6161,5 @@
                     bool   match       = match_srcid and match_inst;
 
-                    if( (r_cleanup_state.read() == ENTRY_EXCLUSIVE) and not match )
+                    if ((r_cleanup_state.read() == ENTRY_EXCLUSIVE) and not match )
                     {
                         std::cout
@@ -6392,5 +6183,5 @@
                     entry.state          = r_cleanup_state.read();
 
-                    if( entry.count == 0) 
+                    if (entry.count == 0) 
                     {
                         entry.is_cnt = 0;
@@ -6416,5 +6207,5 @@
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout
@@ -6438,7 +6229,5 @@
                 {
                     //Search for a matching inval in the ivt (there must be one) and check if there is a pending read or cas.
-
-                    m_cpt_cleanup_fsm_ivt_lock++;
-                    if(r_alloc_ivt_fsm.read() == ALLOC_IVT_CLEANUP)
+                    if (r_alloc_ivt_fsm.read() == ALLOC_IVT_CLEANUP)
                     {
                         size_t index = 0;
@@ -6468,5 +6257,5 @@
                         r_cleanup_locked_is_read    = m_ivt.is_read(index);
 
-                        if( m_ivt.is_update(index) and not m_ivt.is_changed(index))
+                        if (m_ivt.is_update(index) and not m_ivt.is_changed(index))
                         {
                             r_cleanup_fsm = CLEANUP_LOCKED_IVT_CLEAR;
@@ -6493,5 +6282,5 @@
                     m_ivt.decrement(r_cleanup_locked_index.read(), count);
 
-                    if(count == 0)
+                    if (count == 0)
                     {
                         r_cleanup_fsm = CLEANUP_LOCKED_IVT_CLEAR;
@@ -6504,5 +6293,5 @@
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CLEANUP_LOCKED_IVT_DECREMENT>"
                             << " Decrement response counter in IVT:"
@@ -6534,7 +6323,7 @@
                     entry.ptr           = r_cleanup_ptr.read();
                    
-                    if( not r_cleanup_contains_data.read() ) 
-                    {
-                        if(r_write_to_cleanup_req.read() and r_write_to_cleanup_nline.read() == r_cleanup_nline.read()) 
+                    if (not r_cleanup_contains_data.read() ) 
+                    {
+                        if (r_write_to_cleanup_req.read() and r_write_to_cleanup_nline.read() == r_cleanup_nline.read()) 
                         //update the line with the data saved in write_to_cleanup_data table if the cleanup without data
                         {
@@ -6556,5 +6345,5 @@
                         }
 
-                        if((r_cleanup_locked_pktid.read() & 0x7) != TYPE_SC) 
+                        if ((r_cleanup_locked_pktid.read() & 0x7) != TYPE_SC) 
                         {
                            // addr_t min = r_cleanup_nline.read()*m_words*4 ;
@@ -6564,5 +6353,5 @@
                     }
 
-                    if(r_cleanup_locked_is_updt.read() and not r_cleanup_locked_is_changed.read()) //cleanup req cross with multi ack rsp. here, just decrements the count and remains the state.
+                    if (r_cleanup_locked_is_updt.read() and not r_cleanup_locked_is_changed.read()) //cleanup req cross with multi ack rsp. here, just decrements the count and remains the state.
                     {
                         assert(r_cleanup_count.read() == 1 && " only one copy when cleanup fsm receives a req for is_updt command");
@@ -6573,8 +6362,8 @@
                         r_cleanup_fsm       = CLEANUP_SEND_CLACK;
                     }
-                    else if(r_cleanup_locked_is_updt.read() and r_cleanup_locked_is_changed.read())
+                    else if (r_cleanup_locked_is_updt.read() and r_cleanup_locked_is_changed.read())
                     {
                         entry.state = ENTRY_SHARED;
-                        if(match_ll)
+                        if (match_ll)
                         {
                             entry.count       = 0;
@@ -6587,5 +6376,5 @@
                         }
 
-                        if((r_cleanup_locked_pktid.read() & 0x7) == TYPE_READ_INS_MISS) 
+                        if ((r_cleanup_locked_pktid.read() & 0x7) == TYPE_READ_INS_MISS) 
                         {
                             entry.owner.inst = true;
@@ -6601,5 +6390,5 @@
                     else // cas, getm, one copy updated in dir
                     {
-                        if(r_cleanup_locked_is_read.read())
+                        if (r_cleanup_locked_is_read.read())
                         {
                             entry.state         = ENTRY_EXCLUSIVE;
@@ -6638,5 +6427,5 @@
             case CLEANUP_LOCKED_RSP:
                 {
-                    if(r_cleanup_to_tgt_rsp_req.read()) break;
+                    if (r_cleanup_to_tgt_rsp_req.read()) break;
 
                     r_cleanup_to_tgt_rsp_req     = true;
@@ -6645,5 +6434,5 @@
                     r_cleanup_to_tgt_rsp_nline   = r_cleanup_nline.read();
                     
-                    if(r_cleanup_locked_is_changed.read() and r_cleanup_locked_is_updt.read())
+                    if (r_cleanup_locked_is_changed.read() and r_cleanup_locked_is_updt.read())
                     {
                         r_cleanup_to_tgt_rsp_pktid   = r_cleanup_locked_pktid.read(); // rsp for is_updt in shared state
@@ -6655,5 +6444,5 @@
                     }
 
-                    if(r_read_to_multi_ack_req.read() and (r_read_to_multi_ack_nline.read() == r_cleanup_nline.read()) and // rsp for LL or pheriph
+                    if (r_read_to_multi_ack_req.read() and (r_read_to_multi_ack_nline.read() == r_cleanup_nline.read()) and // rsp for LL or pheriph
                       (r_cleanup_locked_is_changed.read() and r_cleanup_locked_is_updt.read()))
                     {
@@ -6663,5 +6452,5 @@
                         r_read_to_multi_ack_req           = false;
                     } 
-                    else if(r_read_to_cleanup_req.read() and (r_read_to_cleanup_nline.read() == r_cleanup_nline.read())) // rsp for LL or pheriph
+                    else if (r_read_to_cleanup_req.read() and (r_read_to_cleanup_nline.read() == r_cleanup_nline.read())) // rsp for LL or pheriph
                     {
                         r_cleanup_to_tgt_rsp_ll_key     = r_read_to_cleanup_ll_key.read(); 
@@ -6677,5 +6466,5 @@
                     }
 
-                    if(r_write_to_cleanup_req.read() and r_write_to_cleanup_nline.read() == r_cleanup_nline.read())
+                    if (r_write_to_cleanup_req.read() and r_write_to_cleanup_nline.read() == r_cleanup_nline.read())
                         r_write_to_cleanup_req = false;
 
@@ -6708,11 +6497,10 @@
                 {
                     // get the lock to the HEAP directory
-                    m_cpt_cleanup_fsm_heap_lock ++;
-                    if(r_alloc_heap_fsm.read() != ALLOC_HEAP_CLEANUP) break;
+                    if (r_alloc_heap_fsm.read() != ALLOC_HEAP_CLEANUP) break;
 
                     r_cleanup_fsm = CLEANUP_HEAP_LOCK;
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout
@@ -6722,5 +6510,4 @@
                     }
 #endif
-                    m_cpt_cleanup_fsm_n_heap_lock++;
                     break;
                 }
@@ -6773,5 +6560,5 @@
                     // it must be replaced by the first copy registered in
                     // the heap. The corresponding entry must be freed
-                    if(match_dir)
+                    if (match_dir)
                     {
                         dir_entry.ptr            = heap_entry.next;
@@ -6785,5 +6572,5 @@
                     // It must be freed and the copy registered in directory
                     // must point to the next copy in heap
-                    else if(match_heap)
+                    else if (match_heap)
                     {
                         dir_entry.ptr            = heap_entry.next;
@@ -6808,5 +6595,5 @@
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout
@@ -6845,5 +6632,5 @@
 
                     // the matching copy must be removed
-                    if(match_heap)
+                    if (match_heap)
                     {
                         // re-use ressources
@@ -6862,7 +6649,7 @@
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
-                    {
-                        if(not match_heap)
+                    if (m_debug)
+                    {
+                        if (not match_heap)
                         {
                             std::cout
@@ -6903,5 +6690,5 @@
 
                     // this is the last entry of the list of copies
-                    if(last)
+                    if (last)
                     {
                         heap_entry.next = r_cleanup_prev_ptr.read();
@@ -6918,5 +6705,5 @@
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CLEANUP_HEAP_SEARCH>"
                             << " Remove the copy in the linked list" << std::endl;
@@ -6934,5 +6721,5 @@
                     heap_entry.owner.inst     = false;
 
-                    if(m_heap.is_full())
+                    if (m_heap.is_full())
                     {
                         heap_entry.next = r_cleanup_next_ptr.read();
@@ -6950,5 +6737,5 @@
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CLEANUP_HEAP_FREE>"
                             << " Update the list of free entries" << std::endl;
@@ -6960,19 +6747,16 @@
                 // invalidate transaction matching the cleanup 
                 {
-                    m_cpt_cleanup_fsm_ivt_lock++;
-                    if(r_alloc_ivt_fsm.read() != ALLOC_IVT_CLEANUP) break;
+                    if (r_alloc_ivt_fsm.read() != ALLOC_IVT_CLEANUP) break;
 
                     size_t index = 0;
                     bool   match_inval;
 
-                    m_cpt_cleanup_fsm_n_ivt_lock++;
-
                     match_inval = m_ivt.search_inval(r_cleanup_nline.read(), index);
-                    if ( not match_inval )     // no pending inval
+                    if (not match_inval )     // no pending inval
                     {
                         r_cleanup_fsm = CLEANUP_SEND_CLACK;
 
 #if DEBUG_MEMC_CLEANUP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name()
                                 << " CLEANUP_MISS_IVT_LOCK> Unexpected cleanup"
@@ -6982,5 +6766,4 @@
                                 << std::endl;
 #endif
-                        m_cpt_cleanup_fsm_n_ivt_lock++;
                     }
                     else
@@ -6995,5 +6778,5 @@
                         r_cleanup_fsm               = CLEANUP_MISS_IVT_DECREMENT;
 #if DEBUG_MEMC_CLEANUP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name()
                                 << " CLEANUP_MISS_IVT_LOCK> Cleanup matching pending"
@@ -7015,5 +6798,5 @@
                     m_ivt.decrement(r_cleanup_miss_index.read(), count);
 
-                    if(count == 0)   // multi inval transaction completed
+                    if (count == 0)   // multi inval transaction completed
                     {
                         r_cleanup_fsm = CLEANUP_MISS_IVT_CLEAR;
@@ -7025,5 +6808,5 @@
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CLEANUP_MISS_IVT_DECREMENT>"
                             << " Decrement response counter in IVT:"
@@ -7041,5 +6824,5 @@
                     m_ivt.clear(r_cleanup_miss_index.read());
 
-                    if ( r_cleanup_miss_need_ack.read() )
+                    if (r_cleanup_miss_need_ack.read() )
                     {
                         assert( (r_config_rsp_lines.read() > 0) and
@@ -7054,5 +6837,5 @@
                         r_cleanup_fsm = CLEANUP_MISS_RSP;
                     }
-                    else if ( r_cleanup_ncc.read() )
+                    else if (r_cleanup_ncc.read() )
                     {
                         r_cleanup_fsm = CLEANUP_MISS_IXR_REQ;
@@ -7064,5 +6847,5 @@
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC "      << name()
                             << " CLEANUP_MISS_IVT_CLEAR> Clear entry in IVT:"
@@ -7075,5 +6858,5 @@
                 // wait if pending request to the TGT_RSP FSM
                 {
-                    if(r_cleanup_to_tgt_rsp_req.read()) break;
+                    if (r_cleanup_to_tgt_rsp_req.read()) break;
 
                     // no pending request
@@ -7084,5 +6867,5 @@
                     r_cleanup_to_tgt_rsp_type    = true; 
 
-                    if ( r_cleanup_ncc.read() )
+                    if (r_cleanup_ncc.read() )
                     {
                         r_cleanup_fsm = CLEANUP_MISS_IXR_REQ;
@@ -7094,5 +6877,5 @@
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CLEANUP_MISS_RSP>"
                             << " Send a response to a previous write request: "
@@ -7109,5 +6892,5 @@
                     if (r_alloc_trt_fsm.read() == ALLOC_TRT_CLEANUP)
                     {
-                        if( not r_cleanup_to_ixr_cmd_req.read())
+                        if (not r_cleanup_to_ixr_cmd_req.read())
                         {
                             size_t index = 0;
@@ -7147,5 +6930,5 @@
                             r_cleanup_fsm               = CLEANUP_SEND_CLACK;
 #if DEBUG_MEMC_CLEANUP
-                            if(m_debug)
+                            if (m_debug)
                             {
                                 std::cout
@@ -7161,5 +6944,5 @@
                             r_cleanup_fsm = CLEANUP_WAIT;
 #if DEBUG_MEMC_CLEANUP
-                            if(m_debug)
+                            if (m_debug)
                             {
                                 std::cout
@@ -7186,10 +6969,10 @@
                 // on the coherence CLACK network.
                 {
-                    if(not p_dspin_clack.read) break;
+                    if (not p_dspin_clack.read) break;
 
                     r_cleanup_fsm = CLEANUP_IDLE;
 
 #if DEBUG_MEMC_CLEANUP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name()
                             << " CLEANUP_SEND_CLACK> Send the response to a cleanup request:"
@@ -7233,9 +7016,9 @@
             case CAS_IDLE:     // fill the local rdata buffers
                 {
-                    if(m_cmd_cas_addr_fifo.rok())
+                    if (m_cmd_cas_addr_fifo.rok())
                     {
 
 #if DEBUG_MEMC_CAS
-                        if(m_debug)
+                        if (m_debug)
                         {
                             std::cout << "  <MEMC " << name() << " CAS_IDLE> CAS command: " << std::hex
@@ -7247,5 +7030,5 @@
                         }
 #endif
-                        if(m_cmd_cas_eop_fifo.read())
+                        if (m_cmd_cas_eop_fifo.read())
                         {
                             r_cas_fsm = CAS_DIR_REQ;
@@ -7256,8 +7039,8 @@
                         }
                         // We fill the two buffers
-                        if(r_cas_cpt.read() < 2)    // 32 bits access
+                        if (r_cas_cpt.read() < 2)    // 32 bits access
                             r_cas_rdata[r_cas_cpt.read()] = m_cmd_cas_wdata_fifo.read();
 
-                        if((r_cas_cpt.read() == 1) and m_cmd_cas_eop_fifo.read())
+                        if ((r_cas_cpt.read() == 1) and m_cmd_cas_eop_fifo.read())
                             r_cas_wdata = m_cmd_cas_wdata_fifo.read();
 
@@ -7265,5 +7048,5 @@
                                 "MEMC ERROR in CAS_IDLE state: illegal CAS command");
 
-                        if(r_cas_cpt.read() ==2)
+                        if (r_cas_cpt.read() ==2)
                             r_cas_wdata = m_cmd_cas_wdata_fifo.read();
 
@@ -7276,12 +7059,11 @@
             case CAS_DIR_REQ:
                 {
-                    if(r_alloc_dir_fsm.read() == ALLOC_DIR_CAS)
+                    if (r_alloc_dir_fsm.read() == ALLOC_DIR_CAS)
                     {
                         r_cas_fsm = CAS_DIR_LOCK;
-                        m_cpt_cas_fsm_n_dir_lock++;
                     }
 
 #if DEBUG_MEMC_CAS
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout
@@ -7290,7 +7072,4 @@
                     }
 #endif
-
-                    m_cpt_cas_fsm_dir_lock++;
-
                     break;
                 }
@@ -7315,10 +7094,9 @@
                     r_cas_count      = entry.count;
                     
-                    if(entry.state == ENTRY_LOCKED)  
+                    if (entry.state == ENTRY_LOCKED)  
                     {
                         r_cas_fsm = CAS_WAIT;
-                        m_cpt_cas_locked_rb ++;
-                    }
-                    else if(entry.state == ENTRY_INVALID)  
+                    }
+                    else if (entry.state == ENTRY_INVALID)  
                     {
                         r_cas_fsm = CAS_MISS_TRT_LOCK;
@@ -7329,5 +7107,5 @@
                     }
 #if DEBUG_MEMC_CAS
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout << "  <MEMC " << name() << " CAS_DIR_LOCK> Directory acces"
@@ -7367,5 +7145,5 @@
 
 #if DEBUG_MEMC_CAS
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CAS_DIR_HIT_READ> Read data from "
                             << " cache and store it in buffer" << std::endl;
@@ -7381,5 +7159,5 @@
                     bool ok = (r_cas_rdata[0].read() == r_cas_data[word].read());
 
-                    if(r_cas_cpt.read() == 4)     // 64 bits CAS
+                    if (r_cas_cpt.read() == 4)     // 64 bits CAS
                         ok &= (r_cas_rdata[1] == r_cas_data[word+1]);
 
@@ -7389,5 +7167,5 @@
 
                     // cas success
-                    if(ok and not forced_fail)
+                    if (ok and not forced_fail)
                     {
                         r_cas_fsm = CAS_DIR_HIT_WRITE;
@@ -7400,5 +7178,5 @@
 
 #if DEBUG_MEMC_CAS
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CAS_DIR_HIT_COMPARE> Compare the old"
                             << " and the new data"
@@ -7420,7 +7198,7 @@
 
                     // test coherence request
-                    if(r_cas_count.read())   // replicated line
-                    {
-                        if(r_cas_count.read() == 1 and r_cas_state.read() == ENTRY_SHARED and r_cas_copy.read() == m_cmd_cas_srcid_fifo.read())
+                    if (r_cas_count.read())   // replicated line
+                    {
+                        if (r_cas_count.read() == 1 and r_cas_state.read() == ENTRY_SHARED and r_cas_copy.read() == m_cmd_cas_srcid_fifo.read())
                         {
                             DirectoryEntry entry;
@@ -7442,5 +7220,5 @@
                             // cache update
                             m_cache_data.write(way, set, word, r_cas_wdata.read());
-                            if(r_cas_cpt.read() == 4)
+                            if (r_cas_cpt.read() == 4)
                                 m_cache_data.write(way, set, word+1, m_cmd_cas_wdata_fifo.read());
 
@@ -7452,5 +7230,5 @@
                             r_cas_fsm = CAS_INVAL_IVT_LOCK;       // multi invalidate required
 #if DEBUG_MEMC_CAS
-                            if(m_debug)
+                            if (m_debug)
                                 std::cout << "  <MEMC " << name() << " CAS_DIR_HIT_WRITE>"
                                     << " Multi Inval required" 
@@ -7467,5 +7245,5 @@
                         // cache update
                         m_cache_data.write(way, set, word, r_cas_wdata.read());
-                        if(r_cas_cpt.read() == 4)
+                        if (r_cas_cpt.read() == 4)
                             m_cache_data.write(way, set, word+1, m_cmd_cas_wdata_fifo.read());
 
@@ -7473,5 +7251,5 @@
 
 #if DEBUG_MEMC_CAS
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " CAS_DIR_HIT_WRITE> Update cache:"
                                 << " way = " << std::dec << way
@@ -7490,5 +7268,5 @@
                 // releases locks to retry later if ivt full
                 {
-                    if(r_alloc_ivt_fsm.read() == ALLOC_IVT_CAS  and 
+                    if (r_alloc_ivt_fsm.read() == ALLOC_IVT_CAS  and 
                         not r_cas_to_cc_send_multi_req.read()   and
                         not r_cas_to_cc_send_brdcast_req.read() and 
@@ -7513,5 +7291,5 @@
                                         false,   // is a command write
                                         index);
-                        if(wok)   // coherence transaction registered in ivt
+                        if (wok)   // coherence transaction registered in ivt
                         {
                             // cache update
@@ -7538,14 +7316,9 @@
                             m_cache_data.write(way, set, word, r_cas_wdata.read());
 
-                            if(r_cas_cpt.read() == 4)
+                            if (r_cas_cpt.read() == 4)
                                 m_cache_data.write(way, set, word+1, m_cmd_cas_wdata_fifo.read());
 
-                            if(r_cas_is_cnt.read())
-                                m_cpt_cas_broadcast ++;
-                            else
-                                m_cpt_cas_minval ++;
-
                             //r_cas_ivt_index = index;
-                            if((r_cas_count.read() != 1) and not r_cas_is_cnt.read())
+                            if ((r_cas_count.read() != 1) and not r_cas_is_cnt.read())
                             {
                                 r_cas_fsm = CAS_MULTI_INVAL_HEAP_LOCK;
@@ -7555,5 +7328,5 @@
                                 assert(not r_cas_copy_inst.read() && "cas fsm: cas has a copy inst");
 
-                                if(not r_cas_is_cnt.read())
+                                if (not r_cas_is_cnt.read())
                                 {
                                     cas_to_cc_send_fifo_put       = true;
@@ -7574,5 +7347,5 @@
                             }
 #if DEBUG_MEMC_CAS
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name()
                                 << " CAS_INVAL_IVT_LOCK> Line is locked"
@@ -7597,5 +7370,5 @@
 
 #if DEBUG_MEMC_CAS
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout << "  <MEMC " << name()
@@ -7609,9 +7382,9 @@
             case CAS_MULTI_INVAL_HEAP_LOCK:  // lock the heap
                 {
-                    if(r_alloc_heap_fsm.read() == ALLOC_HEAP_CAS)
+                    if (r_alloc_heap_fsm.read() == ALLOC_HEAP_CAS)
                     {
 
 #if DEBUG_MEMC_CAS
-                        if(m_debug)
+                        if (m_debug)
                         {
                             std::cout << "  <MEMC " << name()
@@ -7620,9 +7393,5 @@
 #endif
                         r_cas_fsm = CAS_MULTI_INVAL_REQ;
-                        m_cpt_cas_fsm_n_heap_lock++;
-                    }
-
-                    m_cpt_cas_fsm_heap_lock++;
-
+                    }
                     break;
                 }
@@ -7635,5 +7404,5 @@
                     assert(not r_cas_copy_inst.read() && "cas fsm: cas has a copy inst");
 
-                    if(not r_cas_to_cc_send_multi_req.read() and not r_cas_to_cc_send_brdcast_req.read())
+                    if (not r_cas_to_cc_send_multi_req.read() and not r_cas_to_cc_send_brdcast_req.read())
                     {
                         r_cas_next_ptr                = r_cas_ptr.read();
@@ -7644,5 +7413,5 @@
                         cas_to_cc_send_fifo_srcid     = r_cas_copy.read();
                         // We put the first copy in the fifo
-                        if(r_cas_count.read() == 1)  // one single copy
+                        if (r_cas_count.read() == 1)  // one single copy
                         {
                             assert( false && "it should be more than one copies in cas_multi_inval_req!!!!");
@@ -7654,5 +7423,5 @@
 
 #if DEBUG_MEMC_CAS
-                        if(m_debug)
+                        if (m_debug)
                         {
                             std::cout << "  <MEMC " << name() << " CAS_MULTI_INVAL_REQ> Send the first update request to CC_SEND FSM "
@@ -7680,5 +7449,5 @@
                     assert(not entry.owner.inst && "cas fsm: cas has a copy inst");
 
-                    if(m_cas_to_cc_send_inst_fifo.wok())   // request accepted by CC_SEND FSM
+                    if (m_cas_to_cc_send_inst_fifo.wok())   // request accepted by CC_SEND FSM
                     {   
                         cas_to_cc_send_fifo_srcid    = entry.owner.srcid;
@@ -7686,5 +7455,5 @@
                         cas_to_cc_send_fifo_put      = true;
                         r_cas_next_ptr               = entry.next;
-                        if(entry.next == r_cas_next_ptr.read())    // last copy
+                        if (entry.next == r_cas_next_ptr.read())    // last copy
                         {
                             r_cas_to_cc_send_multi_req  = true;
@@ -7693,5 +7462,5 @@
                     }
 #if DEBUG_MEMC_CAS
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout << "  <MEMC " << name() << " CAS_HEAP_NEXT> Send the next update request to CC_SEND FSM "
@@ -7707,5 +7476,5 @@
             case CAS_HEAP_LAST:  // last copy
                 {
-                    if(r_alloc_heap_fsm.read() != ALLOC_HEAP_CAS)
+                    if (r_alloc_heap_fsm.read() != ALLOC_HEAP_CAS)
                     {
                         std::cout << "VCI_MEM_CACHE ERROR " << name() << " CAS_HEAP_LAST"
@@ -7718,5 +7487,5 @@
                     last_entry.owner.srcid    = 0;
                     last_entry.owner.inst     = false;
-                    if(m_heap.is_full())
+                    if (m_heap.is_full())
                     {
                         last_entry.next     = r_cas_next_ptr.read();
@@ -7736,5 +7505,5 @@
  
 #if DEBUG_MEMC_XRAM_RSP
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name() << " CAS_HEAP_LAST>"
                             << " Heap housekeeping" << std::endl;
@@ -7745,5 +7514,5 @@
             case CAS_RSP_FAIL:  // request TGT_RSP FSM to send a failure response
                 {
-                    if( not r_cas_to_tgt_rsp_req.read() )
+                    if (not r_cas_to_tgt_rsp_req.read() )
                     {
                         cmd_cas_fifo_get       = true;
@@ -7757,5 +7526,5 @@
 
 #if DEBUG_MEMC_CAS
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name()
                                 << " CAS_RSP_FAIL> Request TGT_RSP to send a failure response" << std::endl;
@@ -7767,5 +7536,5 @@
             case CAS_RSP_SUCCESS:  // request TGT_RSP FSM to send a success response
                 {
-                    if( not r_cas_to_tgt_rsp_req.read() )
+                    if (not r_cas_to_tgt_rsp_req.read() )
                     {
                         cmd_cas_fifo_get       = true;
@@ -7779,5 +7548,5 @@
 
 #if DEBUG_MEMC_CAS
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name()
                                 << " CAS_RSP_SUCCESS> Request TGT_RSP to send a success response" << std::endl;
@@ -7789,5 +7558,5 @@
             case CAS_MISS_TRT_LOCK:         // cache miss : request access to transaction Table
                 {
-                    if(r_alloc_trt_fsm.read() == ALLOC_TRT_CAS)
+                    if (r_alloc_trt_fsm.read() == ALLOC_TRT_CAS)
                     {
                         size_t   index = 0;
@@ -7799,5 +7568,5 @@
 
 #if DEBUG_MEMC_CAS
-                        if(m_debug)
+                        if (m_debug)
                         {
                             std::cout << "  <MEMC " << name() << " CAS_MISS_TRT_LOCK> Check TRT state"
@@ -7809,5 +7578,5 @@
 #endif
 
-                        if(hit_read or !wok or hit_write)    // missing line already requested or no space in TRT
+                        if (hit_read or !wok or hit_write)    // missing line already requested or no space in TRT
                         {
                             r_cas_fsm = CAS_WAIT;
@@ -7817,11 +7586,6 @@
                             r_cas_trt_index = index;
                             r_cas_fsm       = CAS_MISS_TRT_SET;
-                            m_cpt_cas_miss ++;
-                        }
-                        m_cpt_cas_fsm_n_trt_lock++;
-                    }
-
-                    m_cpt_cas_fsm_trt_lock++;
-
+                        }
+                    }
                     break;
                 }
@@ -7856,5 +7620,5 @@
 
 #if DEBUG_MEMC_CAS
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout << "  <MEMC " << name() << " CAS_MISS_TRT_SET> Register a GET transaction in TRT" << std::hex
@@ -7868,5 +7632,5 @@
             case CAS_MISS_XRAM_REQ:  // request the IXR_CMD FSM to fetch the missing line
                 {
-                    if( not r_cas_to_ixr_cmd_req.read() )
+                    if (not r_cas_to_ixr_cmd_req.read() )
                     {
                         r_cas_to_ixr_cmd_req        = true;
@@ -7875,5 +7639,5 @@
 
 #if DEBUG_MEMC_CAS
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " CAS_MISS_XRAM_REQ> Request a GET transaction"
                                 << " / address = " << std::hex << (addr_t) m_cmd_cas_addr_fifo.read()
@@ -7923,5 +7687,5 @@
                                               m_read_to_cc_send_srcid_fifo.read() == r_cleanup_to_tgt_rsp_srcid.read();
                     // XRAM_RSP
-                    if(m_xram_rsp_to_cc_send_inst_fifo.rok() or
+                    if (m_xram_rsp_to_cc_send_inst_fifo.rok() or
                             r_xram_rsp_to_cc_send_multi_req.read())
                     {
@@ -7929,5 +7693,5 @@
                         break;
                     }
-                    if(r_xram_rsp_to_cc_send_brdcast_req.read())
+                    if (r_xram_rsp_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_XRAM_RSP_BRDCAST_HEADER;
@@ -7935,5 +7699,5 @@
                     }
                     // CAS
-                    if(m_cas_to_cc_send_inst_fifo.rok() or
+                    if (m_cas_to_cc_send_inst_fifo.rok() or
                             r_cas_to_cc_send_multi_req.read())
                     {
@@ -7941,5 +7705,5 @@
                         break;
                     }
-                    if(r_cas_to_cc_send_brdcast_req.read())
+                    if (r_cas_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CAS_BRDCAST_HEADER;
@@ -7948,5 +7712,5 @@
 
                     // READ
-                    if((m_read_to_cc_send_inst_fifo.rok() or 
+                    if ((m_read_to_cc_send_inst_fifo.rok() or 
                             r_read_to_cc_send_multi_req.read()) and not cc_send_updt_delay)
                     {
@@ -7954,5 +7718,5 @@
                         break;
                     }
-                    if(r_read_to_cc_send_brdcast_req.read())
+                    if (r_read_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_READ_BRDCAST_HEADER;
@@ -7961,5 +7725,5 @@
 
                     // WRITE
-                    if(m_write_to_cc_send_inst_fifo.rok() or
+                    if (m_write_to_cc_send_inst_fifo.rok() or
                             r_write_to_cc_send_multi_req.read())
                     {
@@ -7967,5 +7731,5 @@
                         break;
                     }
-                    if(r_write_to_cc_send_brdcast_req.read())
+                    if (r_write_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_WRITE_BRDCAST_HEADER;
@@ -7973,10 +7737,10 @@
                     }
                     // CONFIG
-                    if(r_config_to_cc_send_multi_req.read())
+                    if (r_config_to_cc_send_multi_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CONFIG_INVAL_HEADER;
                         break;
                     }
-                    if(r_config_to_cc_send_brdcast_req.read())
+                    if (r_config_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CONFIG_BRDCAST_HEADER;
@@ -7992,10 +7756,10 @@
                                               m_read_to_cc_send_srcid_fifo.read() == r_cleanup_to_tgt_rsp_srcid.read();
                     // CONFIG
-                    if(r_config_to_cc_send_multi_req.read())
+                    if (r_config_to_cc_send_multi_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CONFIG_INVAL_HEADER;
                         break;
                     }
-                    if(r_config_to_cc_send_brdcast_req.read())
+                    if (r_config_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CONFIG_BRDCAST_HEADER;
@@ -8003,5 +7767,5 @@
                     }
                     // XRAM_RSP
-                    if(m_xram_rsp_to_cc_send_inst_fifo.rok() or
+                    if (m_xram_rsp_to_cc_send_inst_fifo.rok() or
                             r_xram_rsp_to_cc_send_multi_req.read())
                     {
@@ -8009,5 +7773,5 @@
                         break;
                     }
-                    if(r_xram_rsp_to_cc_send_brdcast_req.read())
+                    if (r_xram_rsp_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_XRAM_RSP_BRDCAST_HEADER;
@@ -8015,5 +7779,5 @@
                     }
                     // CAS
-                    if(m_cas_to_cc_send_inst_fifo.rok() or
+                    if (m_cas_to_cc_send_inst_fifo.rok() or
                             r_cas_to_cc_send_multi_req.read())
                     {
@@ -8021,5 +7785,5 @@
                         break;
                     }
-                    if(r_cas_to_cc_send_brdcast_req.read())
+                    if (r_cas_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CAS_BRDCAST_HEADER;
@@ -8027,5 +7791,5 @@
                     }
                     // READ
-                    if((m_read_to_cc_send_inst_fifo.rok() or 
+                    if ((m_read_to_cc_send_inst_fifo.rok() or 
                             r_read_to_cc_send_multi_req.read()) and not cc_send_updt_delay)
                     {
@@ -8033,5 +7797,5 @@
                         break;
                     }
-                    if(r_read_to_cc_send_brdcast_req.read())
+                    if (r_read_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_READ_BRDCAST_HEADER;
@@ -8039,5 +7803,5 @@
                     }
                     // WRITE
-                    if(m_write_to_cc_send_inst_fifo.rok() or
+                    if (m_write_to_cc_send_inst_fifo.rok() or
                             r_write_to_cc_send_multi_req.read())
                     {
@@ -8045,5 +7809,5 @@
                         break;
                     }
-                    if(r_write_to_cc_send_brdcast_req.read())
+                    if (r_write_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_WRITE_BRDCAST_HEADER;
@@ -8059,5 +7823,5 @@
                                               m_read_to_cc_send_srcid_fifo.read() == r_cleanup_to_tgt_rsp_srcid.read();
                     // CAS
-                    if(m_cas_to_cc_send_inst_fifo.rok() or
+                    if (m_cas_to_cc_send_inst_fifo.rok() or
                             r_cas_to_cc_send_multi_req.read())
                     {
@@ -8065,5 +7829,5 @@
                         break;
                     }
-                    if(r_cas_to_cc_send_brdcast_req.read())
+                    if (r_cas_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CAS_BRDCAST_HEADER;
@@ -8071,5 +7835,5 @@
                     }
                     // READ
-                    if((m_read_to_cc_send_inst_fifo.rok() or 
+                    if ((m_read_to_cc_send_inst_fifo.rok() or 
                             r_read_to_cc_send_multi_req.read()) and not cc_send_updt_delay)
                     {
@@ -8077,5 +7841,5 @@
                         break;
                     }
-                    if(r_read_to_cc_send_brdcast_req.read())
+                    if (r_read_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_READ_BRDCAST_HEADER;
@@ -8083,5 +7847,5 @@
                     }
                     //WRITE
-                    if(m_write_to_cc_send_inst_fifo.rok() or
+                    if (m_write_to_cc_send_inst_fifo.rok() or
                             r_write_to_cc_send_multi_req.read())
                     {
@@ -8089,5 +7853,5 @@
                         break;
                     }
-                    if(r_write_to_cc_send_brdcast_req.read())
+                    if (r_write_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_WRITE_BRDCAST_HEADER;
@@ -8095,10 +7859,10 @@
                     }
                     // CONFIG
-                    if(r_config_to_cc_send_multi_req.read())
+                    if (r_config_to_cc_send_multi_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CONFIG_INVAL_HEADER;
                         break;
                     }
-                    if(r_config_to_cc_send_brdcast_req.read())
+                    if (r_config_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CONFIG_BRDCAST_HEADER;
@@ -8106,5 +7870,5 @@
                     }
                     // XRAM_RSP
-                    if(m_xram_rsp_to_cc_send_inst_fifo.rok() or
+                    if (m_xram_rsp_to_cc_send_inst_fifo.rok() or
                             r_xram_rsp_to_cc_send_multi_req.read())
                     {
@@ -8112,5 +7876,5 @@
                         break;
                     }
-                    if(r_xram_rsp_to_cc_send_brdcast_req.read())
+                    if (r_xram_rsp_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_XRAM_RSP_BRDCAST_HEADER;
@@ -8126,5 +7890,5 @@
                                               m_read_to_cc_send_srcid_fifo.read() == r_cleanup_to_tgt_rsp_srcid.read();
                     // READ
-                    if((m_read_to_cc_send_inst_fifo.rok() or 
+                    if ((m_read_to_cc_send_inst_fifo.rok() or 
                             r_read_to_cc_send_multi_req.read()) and not cc_send_updt_delay)
                     {
@@ -8132,5 +7896,5 @@
                         break;
                     }
-                    if(r_read_to_cc_send_brdcast_req.read())
+                    if (r_read_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_READ_BRDCAST_HEADER;
@@ -8138,5 +7902,5 @@
                     }
                     //WRITE
-                    if(m_write_to_cc_send_inst_fifo.rok() or
+                    if (m_write_to_cc_send_inst_fifo.rok() or
                             r_write_to_cc_send_multi_req.read())
                     {
@@ -8144,5 +7908,5 @@
                         break;
                     }
-                    if(r_write_to_cc_send_brdcast_req.read())
+                    if (r_write_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_WRITE_BRDCAST_HEADER;
@@ -8150,10 +7914,10 @@
                     }
                     // CONFIG
-                    if(r_config_to_cc_send_multi_req.read())
+                    if (r_config_to_cc_send_multi_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CONFIG_INVAL_HEADER;
                         break;
                     }
-                    if(r_config_to_cc_send_brdcast_req.read())
+                    if (r_config_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CONFIG_BRDCAST_HEADER;
@@ -8161,5 +7925,5 @@
                     }
                     //xram
-                    if(m_xram_rsp_to_cc_send_inst_fifo.rok() or
+                    if (m_xram_rsp_to_cc_send_inst_fifo.rok() or
                             r_xram_rsp_to_cc_send_multi_req.read())
                     {
@@ -8167,5 +7931,5 @@
                         break;
                     }
-                    if(r_xram_rsp_to_cc_send_brdcast_req.read())
+                    if (r_xram_rsp_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_XRAM_RSP_BRDCAST_HEADER;
@@ -8173,5 +7937,5 @@
                     }
                     //cas
-                    if(m_cas_to_cc_send_inst_fifo.rok() or
+                    if (m_cas_to_cc_send_inst_fifo.rok() or
                             r_cas_to_cc_send_multi_req.read())
                     {
@@ -8179,5 +7943,5 @@
                         break;
                     }
-                    if(r_cas_to_cc_send_brdcast_req.read())
+                    if (r_cas_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CAS_BRDCAST_HEADER;
@@ -8193,5 +7957,5 @@
                                               m_read_to_cc_send_srcid_fifo.read() == r_cleanup_to_tgt_rsp_srcid.read();
                     //WRITE
-                    if(m_write_to_cc_send_inst_fifo.rok() or
+                    if (m_write_to_cc_send_inst_fifo.rok() or
                             r_write_to_cc_send_multi_req.read())
                     {
@@ -8199,5 +7963,5 @@
                         break;
                     }
-                    if(r_write_to_cc_send_brdcast_req.read())
+                    if (r_write_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_WRITE_BRDCAST_HEADER;
@@ -8205,10 +7969,10 @@
                     }
                     // CONFIG
-                    if(r_config_to_cc_send_multi_req.read())
+                    if (r_config_to_cc_send_multi_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CONFIG_INVAL_HEADER;
                         break;
                     }
-                    if(r_config_to_cc_send_brdcast_req.read())
+                    if (r_config_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CONFIG_BRDCAST_HEADER;
@@ -8216,5 +7980,5 @@
                     }
                     //xram
-                    if(m_xram_rsp_to_cc_send_inst_fifo.rok() or
+                    if (m_xram_rsp_to_cc_send_inst_fifo.rok() or
                             r_xram_rsp_to_cc_send_multi_req.read())
                     {
@@ -8222,5 +7986,5 @@
                         break;
                     }
-                    if(r_xram_rsp_to_cc_send_brdcast_req.read())
+                    if (r_xram_rsp_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_XRAM_RSP_BRDCAST_HEADER;
@@ -8228,5 +7992,5 @@
                     }
                     //cas
-                    if(m_cas_to_cc_send_inst_fifo.rok() or
+                    if (m_cas_to_cc_send_inst_fifo.rok() or
                             r_cas_to_cc_send_multi_req.read())
                     {
@@ -8234,5 +7998,5 @@
                         break;
                     }
-                    if(r_cas_to_cc_send_brdcast_req.read())
+                    if (r_cas_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_CAS_BRDCAST_HEADER;
@@ -8240,5 +8004,5 @@
                     }
                     // READ
-                    if((m_read_to_cc_send_inst_fifo.rok() or 
+                    if ((m_read_to_cc_send_inst_fifo.rok() or 
                             r_read_to_cc_send_multi_req.read()) and not cc_send_updt_delay)
                     {
@@ -8246,5 +8010,5 @@
                         break;
                     }
-                    if(r_read_to_cc_send_brdcast_req.read())
+                    if (r_read_to_cc_send_brdcast_req.read())
                     {
                         r_cc_send_fsm = CC_SEND_READ_BRDCAST_HEADER;
@@ -8257,7 +8021,8 @@
             case CC_SEND_CONFIG_INVAL_HEADER:   // send first flit multi-inval (from CONFIG FSM)
                 {
-                    if(m_config_to_cc_send_inst_fifo.rok())
-                    {
-                        if(not p_dspin_m2p.read) break;
+                    if (m_config_to_cc_send_inst_fifo.rok())
+                    {
+                        if (not p_dspin_m2p.read) break;
+
                         // <Activity Counters>
                         if (is_local_req(m_config_to_cc_send_srcid_fifo.read()))
@@ -8268,13 +8033,15 @@
                         {
                             m_cpt_minval_remote++;
-                            m_cpt_minval_cost += req_distance(m_config_to_cc_send_srcid_fifo.read());
-                        }
-                        // </Activity Counters>
-                        m_cpt_minval++;
+                        }
+                        // 2 flits for multi inval
+                        m_cpt_minval_cost += 2 * req_distance(m_config_to_cc_send_srcid_fifo.read());
                         // </Activity Counters>
                         r_cc_send_fsm = CC_SEND_CONFIG_INVAL_NLINE;
                         break;
                     }
-                    if(r_config_to_cc_send_multi_req.read()) r_config_to_cc_send_multi_req = false;
+                    if (r_config_to_cc_send_multi_req.read()) r_config_to_cc_send_multi_req = false;
+                    // <Activity Counters>
+                    m_cpt_minval++;
+                    // </Activity Counters>
                     r_cc_send_fsm = CC_SEND_CONFIG_IDLE;
                     break;
@@ -8283,10 +8050,10 @@
             case CC_SEND_CONFIG_INVAL_NLINE:    // send second flit multi-inval (from CONFIG FSM)
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
                     config_to_cc_send_fifo_get = true;
                     r_cc_send_fsm = CC_SEND_CONFIG_INVAL_HEADER;
 
 #if DEBUG_MEMC_CC_SEND
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name()
                             << " CC_SEND_CONFIG_INVAL_NLINE> multi-inval for line "
@@ -8298,5 +8065,5 @@
             case CC_SEND_CONFIG_BRDCAST_HEADER:   // send first flit BC-inval (from CONFIG FSM)
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
                     r_cc_send_fsm = CC_SEND_CONFIG_BRDCAST_NLINE;
                     break;
@@ -8305,5 +8072,5 @@
             case CC_SEND_CONFIG_BRDCAST_NLINE:    // send second flit BC-inval (from CONFIG FSM)
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
                     // <Activity Counters>
                     m_cpt_binval++;
@@ -8313,5 +8080,5 @@
 
 #if DEBUG_MEMC_CC_SEND
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name()
                             << " CC_SEND_CONFIG_BRDCAST_NLINE> BC-Inval for line "
@@ -8320,10 +8087,11 @@
                     break;
                 }
-                ///////////////////////////////////
-            case CC_SEND_XRAM_RSP_INVAL_HEADER:   // send first flit multi-inval (from XRAM_RSP FSM)
-                {
-                    if(m_xram_rsp_to_cc_send_inst_fifo.rok())
-                    {
-                        if(not p_dspin_m2p.read) break;
+            ///////////////////////////////////
+            case CC_SEND_XRAM_RSP_INVAL_HEADER:
+                // send first flit multi-inval (from XRAM_RSP FSM)
+                {
+                    if (m_xram_rsp_to_cc_send_inst_fifo.rok())
+                    {
+                        if (not p_dspin_m2p.read) break;
                         // <Activity Counters>
                         if (is_local_req(m_xram_rsp_to_cc_send_srcid_fifo.read()))
@@ -8334,14 +8102,16 @@
                         {
                             m_cpt_minval_remote++;
-                            m_cpt_minval_cost += req_distance(m_xram_rsp_to_cc_send_srcid_fifo.read());
-                        }
-                        // </Activity Counters>
-                        m_cpt_minval++;
+                        }
+                        // 2 flits for multi inval
+                        m_cpt_minval_cost += 2 * req_distance(m_xram_rsp_to_cc_send_srcid_fifo.read());
                         // </Activity Counters>
                         r_cc_send_fsm = CC_SEND_XRAM_RSP_INVAL_NLINE;
                         break;
                     }
-                    if(r_xram_rsp_to_cc_send_multi_req.read()) r_xram_rsp_to_cc_send_multi_req = false;
-
+                    if (r_xram_rsp_to_cc_send_multi_req.read()) r_xram_rsp_to_cc_send_multi_req = false;
+ 
+                    // <Activity Counters>
+                    m_cpt_minval++;
+                    // </Activity Counters>
                     r_cc_send_fsm = CC_SEND_XRAM_RSP_IDLE;
                     break;
@@ -8350,10 +8120,10 @@
             case CC_SEND_XRAM_RSP_INVAL_NLINE:   // send second flit multi-inval (from XRAM_RSP FSM)
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
                     xram_rsp_to_cc_send_fifo_get = true;
                     r_cc_send_fsm = CC_SEND_XRAM_RSP_INVAL_HEADER;
 
 #if DEBUG_MEMC_CC_SEND
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name()
                             << " CC_SEND_XRAM_RSP_INVAL_NLINE> Multicast-Inval for line "
@@ -8365,5 +8135,5 @@
             case CC_SEND_XRAM_RSP_BRDCAST_HEADER:  // send first flit broadcast-inval (from XRAM_RSP FSM)
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
                     r_cc_send_fsm = CC_SEND_XRAM_RSP_BRDCAST_NLINE;
                     break;
@@ -8372,5 +8142,5 @@
             case CC_SEND_XRAM_RSP_BRDCAST_NLINE:   // send second flit broadcast-inval (from XRAM_RSP FSM)
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
                     // <Activity Counters>
                     m_cpt_binval++;
@@ -8380,5 +8150,5 @@
 
 #if DEBUG_MEMC_CC_SEND
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name()
                             << " CC_SEND_XRAM_RSP_BRDCAST_NLINE> BC-Inval for line "
@@ -8390,5 +8160,5 @@
             case CC_SEND_READ_BRDCAST_HEADER:
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
                     // <Activity Counters>
                     m_cpt_binval++;
@@ -8399,5 +8169,5 @@
             case CC_SEND_READ_BRDCAST_NLINE:
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
                     r_read_to_cc_send_brdcast_req = false;
                     r_cc_send_fsm = CC_SEND_READ_IDLE;
@@ -8406,31 +8176,23 @@
             case CC_SEND_READ_MULTI_HEADER:
                 {
-                    if(m_read_to_cc_send_inst_fifo.rok())
-                    {
-                        if(not p_dspin_m2p.read) break;
+                    if (m_read_to_cc_send_inst_fifo.rok())
+                    {
+                        if (not p_dspin_m2p.read) break;
+
                         // <Activity Counters>
-                        if (is_local_req(m_read_to_cc_send_srcid_fifo.read()))
-                        {
-                            if(r_read_to_cc_send_type.read())
-                                m_cpt_minval_local ++;
-                            else
-                                m_cpt_update_local ++;
-                        }
-                        else
-                        {
-                            if(r_read_to_cc_send_type.read())
+                        if (r_read_to_cc_send_type.read()) {
+                            // Can be either an inval RO or a multi inval;
+                            // Counting only multi inval here
+                            if (is_local_req(m_read_to_cc_send_srcid_fifo.read()))
                             {
-                                m_cpt_minval_remote++;
-                                m_cpt_minval_cost += req_distance(m_read_to_cc_send_srcid_fifo.read());
+                                m_cpt_minval_local++;
                             }
                             else
                             {
-                                m_cpt_update_remote++;
-                                m_cpt_update_cost += req_distance(m_read_to_cc_send_srcid_fifo.read());
+                                m_cpt_minval_remote++;
                             }
-                        }
-                        // </Activity Counters>
-                        if(r_read_to_cc_send_type.read())
-                            m_cpt_minval++;
+                            // 2 flits for multi inval
+                            m_cpt_minval_cost += 2 * req_distance(m_read_to_cc_send_srcid_fifo.read());
+                        }
                         // </Activity Counters>
                         r_cc_send_fsm = CC_SEND_READ_MULTI_NLINE;
@@ -8438,9 +8200,12 @@
                     }
 
-                    if(r_read_to_cc_send_multi_req.read())
+                    if (r_read_to_cc_send_multi_req.read())
                     {
                        r_read_to_cc_send_multi_req = false;
                     }
 
+                    // <Activity Counters>
+                    m_cpt_minval++;
+                    // </Activity Counters>
                     r_cc_send_fsm = CC_SEND_READ_IDLE;
                     break;
@@ -8449,5 +8214,5 @@
             case CC_SEND_READ_MULTI_NLINE:
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
 
                     read_to_cc_send_fifo_get = true;
@@ -8455,5 +8220,5 @@
 
 #if DEBUG_MEMC_CC_SEND
-                    if(m_debug)
+                    if (m_debug)
                     {
                         std::cout
@@ -8469,5 +8234,5 @@
             case CC_SEND_WRITE_BRDCAST_HEADER:   // send first flit broadcast-inval (from WRITE FSM)
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
                     r_cc_send_fsm = CC_SEND_WRITE_BRDCAST_NLINE;
                     break;
@@ -8476,5 +8241,5 @@
             case CC_SEND_WRITE_BRDCAST_NLINE:   // send second flit broadcast-inval (from WRITE FSM)
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
 
                     // <Activity Counters>
@@ -8486,5 +8251,5 @@
 
 #if DEBUG_MEMC_CC_SEND
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name()
                             << " CC_SEND_WRITE_BRDCAST_NLINE> BC-Inval for line "
@@ -8496,7 +8261,7 @@
             case CC_SEND_WRITE_INVAL_HEADER:   // send first flit for a multi-inval (from WRITE FSM)
                 {
-                    if(m_write_to_cc_send_inst_fifo.rok())
-                    {
-                        if(not p_dspin_m2p.read) break;
+                    if (m_write_to_cc_send_inst_fifo.rok())
+                    {
+                        if (not p_dspin_m2p.read) break;
                         // <Activity Counters>
                         if (is_local_req(m_write_to_cc_send_srcid_fifo.read()))
@@ -8507,8 +8272,7 @@
                         {
                             m_cpt_minval_remote++;
-                            m_cpt_minval_cost += req_distance(m_write_to_cc_send_srcid_fifo.read());
-                        }
-                        // </Activity Counters>
-                        m_cpt_minval++;
+                        }
+                        // 2 flits for multi inval
+                        m_cpt_minval_cost += 2 * req_distance(m_write_to_cc_send_srcid_fifo.read());
                         // </Activity Counters> 
                         r_cc_send_fsm = CC_SEND_WRITE_INVAL_NLINE;
@@ -8516,9 +8280,12 @@
                     }
 
-                    if(r_write_to_cc_send_multi_req.read())
+                    if (r_write_to_cc_send_multi_req.read())
                     {
                         r_write_to_cc_send_multi_req = false;
                     }
 
+                    // <Activity Counters> 
+                    m_cpt_minval++;
+                    // </Activity Counters> 
                     r_cc_send_fsm = CC_SEND_WRITE_IDLE;
                     break;
@@ -8527,10 +8294,10 @@
             case CC_SEND_WRITE_INVAL_NLINE:   // send second flit for a multi-update (from WRITE FSM)
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
                     write_to_cc_send_fifo_get = true;
                     r_cc_send_fsm = CC_SEND_WRITE_INVAL_HEADER;
 
 #if DEBUG_MEMC_CC_SEND
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name()
                             << " CC_SEND_WRITE_INVAL_NLINE> Multicast-Inval for line "
@@ -8542,5 +8309,5 @@
             case CC_SEND_CAS_BRDCAST_HEADER:   // send first flit  broadcast-inval (from CAS FSM)
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
                     r_cc_send_fsm = CC_SEND_CAS_BRDCAST_NLINE;
                     break;
@@ -8549,5 +8316,5 @@
             case CC_SEND_CAS_BRDCAST_NLINE:   // send second flit broadcast-inval (from CAS FSM)
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
                     // <Activity Counters>
                     m_cpt_binval++;
@@ -8558,5 +8325,5 @@
 
 #if DEBUG_MEMC_CC_SEND
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name()
                             << " CC_SEND_CAS_BRDCAST_NLINE> Broadcast-Inval for line "
@@ -8568,7 +8335,7 @@
             case CC_SEND_CAS_INVAL_HEADER:   // send first flit for a multi-update (from CAS FSM)
                 {
-                    if(m_cas_to_cc_send_inst_fifo.rok())
-                    {
-                        if(not p_dspin_m2p.read) break;
+                    if (m_cas_to_cc_send_inst_fifo.rok())
+                    {
+                        if (not p_dspin_m2p.read) break;
                         // <Activity Counters>
                         if (is_local_req(m_cas_to_cc_send_srcid_fifo.read()))
@@ -8579,8 +8346,7 @@
                         {
                             m_cpt_minval_remote++;
-                            m_cpt_minval_cost += req_distance(m_cas_to_cc_send_srcid_fifo.read());
-                        }
-                        // <Activity Counters>
-                        m_cpt_minval++;
+                        }
+                        // 2 flits for multi inval
+                        m_cpt_minval_cost += 2 * req_distance(m_cas_to_cc_send_srcid_fifo.read());
                         // </Activity Counters>
                         r_cc_send_fsm = CC_SEND_CAS_INVAL_NLINE;
@@ -8589,9 +8355,12 @@
 
                     // no more packets to send for the multi-update
-                    if(r_cas_to_cc_send_multi_req.read())
+                    if (r_cas_to_cc_send_multi_req.read())
                     {
                         r_cas_to_cc_send_multi_req = false;
                     }
 
+                    // <Activity Counters>
+                    m_cpt_minval++;
+                    // </Activity Counters>
                     r_cc_send_fsm = CC_SEND_CAS_IDLE;
                     break;
@@ -8600,10 +8369,10 @@
             case CC_SEND_CAS_INVAL_NLINE:   // send second flit for a multi-update (from CAS FSM)
                 {
-                    if(not p_dspin_m2p.read) break;
+                    if (not p_dspin_m2p.read) break;
                     cas_to_cc_send_fifo_get = true;
                     r_cc_send_fsm = CC_SEND_CAS_INVAL_HEADER;
 
 #if DEBUG_MEMC_CC_SEND
-                    if(m_debug)
+                    if (m_debug)
                         std::cout << "  <MEMC " << name()
                             << " CC_SEND_CAS_INVAL_NLINE> Multicast-Inval for line "
@@ -8627,13 +8396,13 @@
             case CC_RECEIVE_IDLE:
                 {
-                    if(not p_dspin_p2m.write) break;
+                    if (not p_dspin_p2m.write) break;
 
                     uint8_t type =
-                        DspinDhccpParam::dspin_get(
+                        DspinHmesiParam::dspin_get(
                                 p_dspin_p2m.data.read(),
-                                DspinDhccpParam::P2M_TYPE);
-
-                    if((type == DspinDhccpParam::TYPE_CLEANUP_DATA) or
-                            (type == DspinDhccpParam::TYPE_CLEANUP_INST))
+                                DspinHmesiParam::P2M_TYPE);
+
+                    if ((type == DspinHmesiParam::TYPE_CLEANUP_DATA) or
+                            (type == DspinHmesiParam::TYPE_CLEANUP_INST))
                     {
                         r_cc_receive_fsm = CC_RECEIVE_CLEANUP;
@@ -8641,5 +8410,5 @@
                     }
 
-                    if(type == DspinDhccpParam::TYPE_MULTI_ACK)
+                    if (type == DspinHmesiParam::TYPE_MULTI_ACK)
                     {
                         r_cc_receive_fsm = CC_RECEIVE_MULTI_ACK;
@@ -8658,9 +8427,9 @@
                     // write first CLEANUP flit in CC_RECEIVE to CLEANUP fifo
 
-                    if(not p_dspin_p2m.write or not m_cc_receive_to_cleanup_fifo.wok())
+                    if (not p_dspin_p2m.write or not m_cc_receive_to_cleanup_fifo.wok())
                         break;
 
                     cc_receive_to_cleanup_fifo_put = true;
-                    if(p_dspin_p2m.eop.read())
+                    if (p_dspin_p2m.eop.read())
                         r_cc_receive_fsm               = CC_RECEIVE_IDLE;
 
@@ -8672,5 +8441,5 @@
                     // write second CLEANUP flit in CC_RECEIVE to CLEANUP fifo
 
-                    if(not p_dspin_p2m.write or not m_cc_receive_to_cleanup_fifo.wok())
+                    if (not p_dspin_p2m.write or not m_cc_receive_to_cleanup_fifo.wok())
                         break;
 
@@ -8680,5 +8449,5 @@
 
                     cc_receive_to_cleanup_fifo_put = true;
-                    if(p_dspin_p2m.eop.read())
+                    if (p_dspin_p2m.eop.read())
                         r_cc_receive_fsm               = CC_RECEIVE_IDLE;
                     break;
@@ -8691,8 +8460,8 @@
 
                     // wait for a WOK in the CC_RECEIVE to MULTI_ACK fifo
-                    if(not p_dspin_p2m.write or not m_cc_receive_to_multi_ack_fifo.wok())
+                    if (not p_dspin_p2m.write or not m_cc_receive_to_multi_ack_fifo.wok())
                         break;
 
-                    if( p_dspin_p2m.eop.read()) 
+                    if (p_dspin_p2m.eop.read()) 
                         r_cc_receive_fsm             = CC_RECEIVE_IDLE;
 
@@ -8724,28 +8493,28 @@
             case TGT_RSP_CONFIG_IDLE:  // tgt_cmd requests have the highest priority
                 {
-                    if(r_tgt_cmd_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
-                    else if(r_read_to_tgt_rsp_req)
+                    if (r_tgt_cmd_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
+                    else if (r_read_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_READ;
                         r_tgt_rsp_cpt = r_read_to_tgt_rsp_word.read();
                     }
-                    else if(r_write_to_tgt_rsp_req)     r_tgt_rsp_fsm = TGT_RSP_WRITE;
-                    else if(r_cas_to_tgt_rsp_req)       r_tgt_rsp_fsm = TGT_RSP_CAS;
-                    else if(r_xram_rsp_to_tgt_rsp_req)
+                    else if (r_write_to_tgt_rsp_req)     r_tgt_rsp_fsm = TGT_RSP_WRITE;
+                    else if (r_cas_to_tgt_rsp_req)       r_tgt_rsp_fsm = TGT_RSP_CAS;
+                    else if (r_xram_rsp_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_XRAM;
                         r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
                     }
-                    else if(r_multi_ack_to_tgt_rsp_req) 
+                    else if (r_multi_ack_to_tgt_rsp_req) 
                     {
                         r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK;
                         r_tgt_rsp_cpt = r_multi_ack_to_tgt_rsp_word.read();
                     }
-                    else if(r_cleanup_to_tgt_rsp_req)  
+                    else if (r_cleanup_to_tgt_rsp_req)  
                     {
                         r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
                         r_tgt_rsp_cpt = r_cleanup_to_tgt_rsp_first_word.read();
                     }
-                    else if(r_config_to_tgt_rsp_req)    r_tgt_rsp_fsm = TGT_RSP_CONFIG;
+                    else if (r_config_to_tgt_rsp_req)    r_tgt_rsp_fsm = TGT_RSP_CONFIG;
                     break;
                 }
@@ -8753,28 +8522,28 @@
             case TGT_RSP_TGT_CMD_IDLE: // read requests have the highest priority
                 {
-                    if(r_read_to_tgt_rsp_req)
+                    if (r_read_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_READ;
                         r_tgt_rsp_cpt = r_read_to_tgt_rsp_word.read();
                     }
-                    else if(r_write_to_tgt_rsp_req)     r_tgt_rsp_fsm = TGT_RSP_WRITE;
-                    else if(r_cas_to_tgt_rsp_req)       r_tgt_rsp_fsm = TGT_RSP_CAS;
-                    else if(r_xram_rsp_to_tgt_rsp_req)
+                    else if (r_write_to_tgt_rsp_req)     r_tgt_rsp_fsm = TGT_RSP_WRITE;
+                    else if (r_cas_to_tgt_rsp_req)       r_tgt_rsp_fsm = TGT_RSP_CAS;
+                    else if (r_xram_rsp_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_XRAM;
                         r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
                     }
-                    else if(r_multi_ack_to_tgt_rsp_req) 
+                    else if (r_multi_ack_to_tgt_rsp_req) 
                     {
                         r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK;
                         r_tgt_rsp_cpt = r_multi_ack_to_tgt_rsp_word.read();
                     }
-                    else if(r_cleanup_to_tgt_rsp_req)
+                    else if (r_cleanup_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
                         r_tgt_rsp_cpt = r_cleanup_to_tgt_rsp_first_word.read();
                     }
-                    else if(r_config_to_tgt_rsp_req)    r_tgt_rsp_fsm = TGT_RSP_CONFIG;
-                    else if(r_tgt_cmd_to_tgt_rsp_req)   r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
+                    else if (r_config_to_tgt_rsp_req)    r_tgt_rsp_fsm = TGT_RSP_CONFIG;
+                    else if (r_tgt_cmd_to_tgt_rsp_req)   r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
                     break;
                 }
@@ -8782,24 +8551,24 @@
             case TGT_RSP_READ_IDLE: // write requests have the highest priority
                 {
-                    if(r_write_to_tgt_rsp_req)          r_tgt_rsp_fsm = TGT_RSP_WRITE;
-                    else if(r_cas_to_tgt_rsp_req)       r_tgt_rsp_fsm = TGT_RSP_CAS;
-                    else if(r_xram_rsp_to_tgt_rsp_req)
+                    if (r_write_to_tgt_rsp_req)          r_tgt_rsp_fsm = TGT_RSP_WRITE;
+                    else if (r_cas_to_tgt_rsp_req)       r_tgt_rsp_fsm = TGT_RSP_CAS;
+                    else if (r_xram_rsp_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_XRAM;
                         r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
                     }
-                    else if(r_multi_ack_to_tgt_rsp_req) 
+                    else if (r_multi_ack_to_tgt_rsp_req) 
                     {
                         r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK;
                         r_tgt_rsp_cpt = r_multi_ack_to_tgt_rsp_word.read();
                     }
-                    else if(r_cleanup_to_tgt_rsp_req) 
+                    else if (r_cleanup_to_tgt_rsp_req) 
                     {
                         r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
                         r_tgt_rsp_cpt = r_cleanup_to_tgt_rsp_first_word.read();
                     }
-                    else if(r_config_to_tgt_rsp_req)    r_tgt_rsp_fsm = TGT_RSP_CONFIG;
-                    else if(r_tgt_cmd_to_tgt_rsp_req)   r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
-                    else if(r_read_to_tgt_rsp_req)
+                    else if (r_config_to_tgt_rsp_req)    r_tgt_rsp_fsm = TGT_RSP_CONFIG;
+                    else if (r_tgt_cmd_to_tgt_rsp_req)   r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
+                    else if (r_read_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_READ;
@@ -8811,28 +8580,28 @@
             case TGT_RSP_WRITE_IDLE: // cas requests have the highest priority
                 {
-                    if(r_cas_to_tgt_rsp_req)            r_tgt_rsp_fsm = TGT_RSP_CAS;
-                    else if(r_xram_rsp_to_tgt_rsp_req)
+                    if (r_cas_to_tgt_rsp_req)            r_tgt_rsp_fsm = TGT_RSP_CAS;
+                    else if (r_xram_rsp_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_XRAM;
                         r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
                     }
-                    else if(r_multi_ack_to_tgt_rsp_req) 
+                    else if (r_multi_ack_to_tgt_rsp_req) 
                     {
                         r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK;
                         r_tgt_rsp_cpt = r_multi_ack_to_tgt_rsp_word.read();
                     }
-                    else if(r_cleanup_to_tgt_rsp_req)
+                    else if (r_cleanup_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
                         r_tgt_rsp_cpt = r_cleanup_to_tgt_rsp_first_word.read();
                     }
-                    else if(r_config_to_tgt_rsp_req)    r_tgt_rsp_fsm = TGT_RSP_CONFIG;
-                    else if(r_tgt_cmd_to_tgt_rsp_req)   r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
-                    else if(r_read_to_tgt_rsp_req)
+                    else if (r_config_to_tgt_rsp_req)    r_tgt_rsp_fsm = TGT_RSP_CONFIG;
+                    else if (r_tgt_cmd_to_tgt_rsp_req)   r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
+                    else if (r_read_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_READ;
                         r_tgt_rsp_cpt = r_read_to_tgt_rsp_word.read();
                     }
-                    else if(r_write_to_tgt_rsp_req)     r_tgt_rsp_fsm = TGT_RSP_WRITE;
+                    else if (r_write_to_tgt_rsp_req)     r_tgt_rsp_fsm = TGT_RSP_WRITE;
                     break;
                 }
@@ -8840,28 +8609,28 @@
             case TGT_RSP_CAS_IDLE: // xram_rsp requests have the highest priority
                 {
-                    if(r_xram_rsp_to_tgt_rsp_req)
+                    if (r_xram_rsp_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_XRAM;
                         r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
                     }
-                    else if(r_multi_ack_to_tgt_rsp_req) 
+                    else if (r_multi_ack_to_tgt_rsp_req) 
                     {
                         r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK;
                         r_tgt_rsp_cpt = r_multi_ack_to_tgt_rsp_word.read();
                     }
-                    else if(r_cleanup_to_tgt_rsp_req)
+                    else if (r_cleanup_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
                         r_tgt_rsp_cpt = r_cleanup_to_tgt_rsp_first_word.read();
                     }
-                    else if(r_config_to_tgt_rsp_req)    r_tgt_rsp_fsm = TGT_RSP_CONFIG;
-                    else if(r_tgt_cmd_to_tgt_rsp_req)   r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
-                    else if(r_read_to_tgt_rsp_req)
+                    else if (r_config_to_tgt_rsp_req)    r_tgt_rsp_fsm = TGT_RSP_CONFIG;
+                    else if (r_tgt_cmd_to_tgt_rsp_req)   r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
+                    else if (r_read_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_READ;
                         r_tgt_rsp_cpt = r_read_to_tgt_rsp_word.read();
                     }
-                    else if(r_write_to_tgt_rsp_req)     r_tgt_rsp_fsm = TGT_RSP_WRITE;
-                    else if(r_cas_to_tgt_rsp_req)       r_tgt_rsp_fsm = TGT_RSP_CAS  ;
+                    else if (r_write_to_tgt_rsp_req)     r_tgt_rsp_fsm = TGT_RSP_WRITE;
+                    else if (r_cas_to_tgt_rsp_req)       r_tgt_rsp_fsm = TGT_RSP_CAS  ;
                     break;
                 }
@@ -8869,24 +8638,24 @@
             case TGT_RSP_XRAM_IDLE: // multi ack requests have the highest priority
                 {
-                    if(r_multi_ack_to_tgt_rsp_req.read()) 
+                    if (r_multi_ack_to_tgt_rsp_req.read()) 
                     {
                         r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK;
                         r_tgt_rsp_cpt = r_multi_ack_to_tgt_rsp_word.read();
                     }
-                    else if(r_cleanup_to_tgt_rsp_req)
+                    else if (r_cleanup_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
                         r_tgt_rsp_cpt = r_cleanup_to_tgt_rsp_first_word.read();
                     }
-                    else if(r_config_to_tgt_rsp_req)    r_tgt_rsp_fsm = TGT_RSP_CONFIG;
-                    else if(r_tgt_cmd_to_tgt_rsp_req)   r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
-                    else if(r_read_to_tgt_rsp_req)
+                    else if (r_config_to_tgt_rsp_req)    r_tgt_rsp_fsm = TGT_RSP_CONFIG;
+                    else if (r_tgt_cmd_to_tgt_rsp_req)   r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
+                    else if (r_read_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_READ;
                         r_tgt_rsp_cpt = r_read_to_tgt_rsp_word.read();
                     }
-                    else if(r_write_to_tgt_rsp_req)     r_tgt_rsp_fsm = TGT_RSP_WRITE;
-                    else if(r_cas_to_tgt_rsp_req)       r_tgt_rsp_fsm = TGT_RSP_CAS  ;
-                    else if(r_xram_rsp_to_tgt_rsp_req)
+                    else if (r_write_to_tgt_rsp_req)     r_tgt_rsp_fsm = TGT_RSP_WRITE;
+                    else if (r_cas_to_tgt_rsp_req)       r_tgt_rsp_fsm = TGT_RSP_CAS  ;
+                    else if (r_xram_rsp_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_XRAM;
@@ -8898,24 +8667,24 @@
             case TGT_RSP_MULTI_ACK_IDLE: // cleanup requests have the highest priority
                 {
-                    if(r_cleanup_to_tgt_rsp_req)
+                    if (r_cleanup_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
                         r_tgt_rsp_cpt = r_cleanup_to_tgt_rsp_first_word.read();
                     }
-                    else if(r_config_to_tgt_rsp_req)    r_tgt_rsp_fsm = TGT_RSP_CONFIG;
-                    else if(r_tgt_cmd_to_tgt_rsp_req)   r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
-                    else if(r_read_to_tgt_rsp_req)
+                    else if (r_config_to_tgt_rsp_req)    r_tgt_rsp_fsm = TGT_RSP_CONFIG;
+                    else if (r_tgt_cmd_to_tgt_rsp_req)   r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
+                    else if (r_read_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_READ;
                         r_tgt_rsp_cpt = r_read_to_tgt_rsp_word.read();
                     }
-                    else if(r_write_to_tgt_rsp_req)     r_tgt_rsp_fsm = TGT_RSP_WRITE;
-                    else if(r_cas_to_tgt_rsp_req)       r_tgt_rsp_fsm = TGT_RSP_CAS  ;
-                    else if(r_xram_rsp_to_tgt_rsp_req)
+                    else if (r_write_to_tgt_rsp_req)     r_tgt_rsp_fsm = TGT_RSP_WRITE;
+                    else if (r_cas_to_tgt_rsp_req)       r_tgt_rsp_fsm = TGT_RSP_CAS  ;
+                    else if (r_xram_rsp_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_XRAM;
                         r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
                     }
-                    else if(r_multi_ack_to_tgt_rsp_req) 
+                    else if (r_multi_ack_to_tgt_rsp_req) 
                     {
                         r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK;
@@ -8927,24 +8696,24 @@
             case TGT_RSP_CLEANUP_IDLE: // tgt cmd requests have the highest priority
                 {
-                    if(r_config_to_tgt_rsp_req)         r_tgt_rsp_fsm = TGT_RSP_CONFIG;
-                    else if(r_tgt_cmd_to_tgt_rsp_req)   r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
-                    else if(r_read_to_tgt_rsp_req)
+                    if (r_config_to_tgt_rsp_req)         r_tgt_rsp_fsm = TGT_RSP_CONFIG;
+                    else if (r_tgt_cmd_to_tgt_rsp_req)   r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
+                    else if (r_read_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_READ;
                         r_tgt_rsp_cpt = r_read_to_tgt_rsp_word.read();
                     }
-                    else if(r_write_to_tgt_rsp_req)     r_tgt_rsp_fsm = TGT_RSP_WRITE;
-                    else if(r_cas_to_tgt_rsp_req)       r_tgt_rsp_fsm = TGT_RSP_CAS  ;
-                    else if(r_xram_rsp_to_tgt_rsp_req)
+                    else if (r_write_to_tgt_rsp_req)     r_tgt_rsp_fsm = TGT_RSP_WRITE;
+                    else if (r_cas_to_tgt_rsp_req)       r_tgt_rsp_fsm = TGT_RSP_CAS  ;
+                    else if (r_xram_rsp_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_XRAM;
                         r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
                     }
-                    else if(r_multi_ack_to_tgt_rsp_req) 
+                    else if (r_multi_ack_to_tgt_rsp_req) 
                     {
                         r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK;
                         r_tgt_rsp_cpt = r_multi_ack_to_tgt_rsp_word.read();
                     }
-                    else if(r_cleanup_to_tgt_rsp_req)
+                    else if (r_cleanup_to_tgt_rsp_req)
                     {
                         r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
@@ -8956,5 +8725,5 @@
             case TGT_RSP_CONFIG:  // send the response for a config transaction
                 {
-                    if ( p_vci_tgt.rspack )
+                    if (p_vci_tgt.rspack )
                     {
                         r_config_to_tgt_rsp_req = false;
@@ -8962,5 +8731,5 @@
 
 #if DEBUG_MEMC_TGT_RSP
-                        if( m_debug )
+                        if (m_debug )
                         {
                             std::cout
@@ -8979,5 +8748,5 @@
             case TGT_RSP_TGT_CMD: // send the response for a configuration access
                 {
-                    if ( p_vci_tgt.rspack )
+                    if (p_vci_tgt.rspack )
                     {
                         r_tgt_cmd_to_tgt_rsp_req = false;
@@ -8985,5 +8754,5 @@
 
 #if DEBUG_MEMC_TGT_RSP
-                        if( m_debug )
+                        if (m_debug )
                         {
                             std::cout
@@ -9003,9 +8772,9 @@
             case TGT_RSP_READ:    // send the response to a read
                 {
-                    if ( p_vci_tgt.rspack )
+                    if (p_vci_tgt.rspack )
                     {
 
 #if DEBUG_MEMC_TGT_RSP
-                        if( m_debug )
+                        if (m_debug )
                         {
                             std::cout
@@ -9050,9 +8819,9 @@
             case TGT_RSP_WRITE:   // send the write acknowledge
                 {
-                    if(p_vci_tgt.rspack)
+                    if (p_vci_tgt.rspack)
                     {
 
 #if DEBUG_MEMC_TGT_RSP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " TGT_RSP_WRITE> Write response"
                                 << " / rsrcid = " << std::hex << r_write_to_tgt_rsp_srcid.read()
@@ -9068,10 +8837,10 @@
             case TGT_RSP_CLEANUP:   // pas clair pour moi (AG)
                 {
-                    if(p_vci_tgt.rspack)
+                    if (p_vci_tgt.rspack)
                     {
                         uint32_t last_word_idx = r_cleanup_to_tgt_rsp_first_word.read() + r_cleanup_to_tgt_rsp_length.read() - 1;
                         bool is_ll    = ((r_cleanup_to_tgt_rsp_pktid.read() & 0x7) == TYPE_LL);
 #if DEBUG_MEMC_TGT_RSP
-                        if(m_debug)
+                        if (m_debug)
                         {
                             std::cout << "  <MEMC " << name() << " TGT_RSP_CLEANUP> Cleanup response"
@@ -9111,9 +8880,9 @@
             case TGT_RSP_CAS:    // send one atomic word response
                 {
-                    if(p_vci_tgt.rspack)
+                    if (p_vci_tgt.rspack)
                     {
 
 #if DEBUG_MEMC_TGT_RSP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " TGT_RSP_CAS> CAS response"
                                 << " / rsrcid = " << std::hex << r_cas_to_tgt_rsp_srcid.read()
@@ -9129,9 +8898,9 @@
             case TGT_RSP_XRAM:    // send the response after XRAM access
                 {
-                    if ( p_vci_tgt.rspack )
+                    if (p_vci_tgt.rspack )
                     {
 
 #if DEBUG_MEMC_TGT_RSP
-                        if( m_debug )
+                        if (m_debug )
                             std::cout << "  <MEMC " << name() << " TGT_RSP_XRAM> Response following XRAM access"
                                 << " / rsrcid = " << std::hex << r_xram_rsp_to_tgt_rsp_srcid.read()
@@ -9172,5 +8941,5 @@
             case TGT_RSP_MULTI_ACK:    // send the read /LL response after coherence transaction
                 {
-                    if(p_vci_tgt.rspack)
+                    if (p_vci_tgt.rspack)
                     {
 
@@ -9182,5 +8951,5 @@
 
 #if DEBUG_MEMC_TGT_RSP
-                        if(m_debug)
+                        if (m_debug)
                             std::cout << "  <MEMC " << name() << " TGT_RSP_MULTI_ACK> Write response after coherence transaction"
                                 << " / rsrcid = " << std::hex << r_multi_ack_to_tgt_rsp_srcid.read()
@@ -9235,5 +9004,5 @@
                 if (r_write_fsm.read() != WRITE_INVAL_IVT_LOCK) 
                 {
-                    if((r_read_fsm.read() == READ_IVT_INVAL_LOCK) or
+                    if ((r_read_fsm.read() == READ_IVT_INVAL_LOCK) or
                        (r_read_fsm.read() == READ_IVT_UPDT_LOCK))
                         r_alloc_ivt_fsm = ALLOC_IVT_READ;
@@ -9255,6 +9024,4 @@
                         r_alloc_ivt_fsm = ALLOC_IVT_MULTI_ACK;
 
-                    else
-                        m_cpt_ivt_unused++;
                 }
                 break;
@@ -9262,5 +9029,5 @@
                 //////////////////////////
             case ALLOC_IVT_READ:            // allocated to READ FSM
-               if((r_read_fsm.read() != READ_IVT_INVAL_LOCK) and
+               if ((r_read_fsm.read() != READ_IVT_INVAL_LOCK) and
                   (r_read_fsm.read() != READ_IVT_UPDT_LOCK))
                {
@@ -9284,6 +9051,4 @@
                         r_alloc_ivt_fsm = ALLOC_IVT_WRITE;
 
-                    else
-                        m_cpt_ivt_unused++;
                 }
                 break;
@@ -9291,5 +9056,5 @@
                 //////////////////////////
             case ALLOC_IVT_XRAM_RSP:         // allocated to XRAM_RSP FSM
-                if(r_xram_rsp_fsm.read() != XRAM_RSP_IVT_LOCK)
+                if (r_xram_rsp_fsm.read() != XRAM_RSP_IVT_LOCK)
                 {
                     if ((r_cleanup_fsm.read() == CLEANUP_MISS_IVT_LOCK) or
@@ -9309,10 +9074,8 @@
                         r_alloc_ivt_fsm = ALLOC_IVT_WRITE;
 
-                    else if((r_read_fsm.read() == READ_IVT_INVAL_LOCK) or
+                    else if ((r_read_fsm.read() == READ_IVT_INVAL_LOCK) or
                             (r_read_fsm.read() == READ_IVT_UPDT_LOCK))
                         r_alloc_ivt_fsm = ALLOC_IVT_READ;
 
-                    else
-                        m_cpt_ivt_unused++;
                 }
                 break;
@@ -9337,5 +9100,5 @@
                         r_alloc_ivt_fsm = ALLOC_IVT_WRITE;
 
-                    else if((r_read_fsm.read() == READ_IVT_INVAL_LOCK) or
+                    else if ((r_read_fsm.read() == READ_IVT_INVAL_LOCK) or
                            (r_read_fsm.read() == READ_IVT_UPDT_LOCK))
                         r_alloc_ivt_fsm = ALLOC_IVT_READ;
@@ -9343,7 +9106,4 @@
                     else if (r_xram_rsp_fsm.read() == XRAM_RSP_IVT_LOCK)
                         r_alloc_ivt_fsm = ALLOC_IVT_XRAM_RSP;
-
-                    else
-                        m_cpt_ivt_unused++;
                 }
                 break;
@@ -9362,5 +9122,5 @@
                         r_alloc_ivt_fsm = ALLOC_IVT_WRITE;
 
-                    else if((r_read_fsm.read() == READ_IVT_INVAL_LOCK) or
+                    else if ((r_read_fsm.read() == READ_IVT_INVAL_LOCK) or
                             (r_read_fsm.read() == READ_IVT_UPDT_LOCK))
                         r_alloc_ivt_fsm = ALLOC_IVT_READ;
@@ -9372,7 +9132,4 @@
                              (r_cleanup_fsm.read() == CLEANUP_LOCKED_IVT_LOCK))
                         r_alloc_ivt_fsm = ALLOC_IVT_CLEANUP;
-
-                    else
-                        m_cpt_ivt_unused++;
                 }
                 break;
@@ -9388,5 +9145,5 @@
                         r_alloc_ivt_fsm = ALLOC_IVT_WRITE;
 
-                    else if((r_read_fsm.read() == READ_IVT_INVAL_LOCK) or
+                    else if ((r_read_fsm.read() == READ_IVT_INVAL_LOCK) or
                             (r_read_fsm.read() == READ_IVT_UPDT_LOCK))
                         r_alloc_ivt_fsm = ALLOC_IVT_READ;
@@ -9401,7 +9158,4 @@
                     else if (r_cas_fsm.read() == CAS_INVAL_IVT_LOCK) 
                         r_alloc_ivt_fsm = ALLOC_IVT_CAS;
-
-                    else
-                        m_cpt_ivt_unused++;
                 }
                 break;
@@ -9417,5 +9171,5 @@
                         r_alloc_ivt_fsm = ALLOC_IVT_WRITE;
 
-                    else if((r_read_fsm.read() == READ_IVT_INVAL_LOCK) or
+                    else if ((r_read_fsm.read() == READ_IVT_INVAL_LOCK) or
                             (r_read_fsm.read() == READ_IVT_UPDT_LOCK))
                         r_alloc_ivt_fsm = ALLOC_IVT_READ;
@@ -9433,7 +9187,4 @@
                     else if (r_config_fsm.read() == CONFIG_IVT_LOCK)
                         r_alloc_ivt_fsm = ALLOC_IVT_CONFIG;
-
-                    else
-                        m_cpt_ivt_unused++;
                 }
                 break;
@@ -9459,5 +9210,5 @@
                 r_alloc_dir_reset_cpt.write(r_alloc_dir_reset_cpt.read() + 1);
 
-                if(r_alloc_dir_reset_cpt.read() == (m_sets - 1))
+                if (r_alloc_dir_reset_cpt.read() == (m_sets - 1))
                 {
                     m_cache_directory.init();
@@ -9468,5 +9219,5 @@
                 //////////////////////
             case ALLOC_DIR_CONFIG:    // allocated to CONFIG FSM
-                if ( (r_config_fsm.read()    != CONFIG_DIR_REQ) and
+                if ((r_config_fsm.read()    != CONFIG_DIR_REQ) and
                      (r_config_fsm.read()    != CONFIG_DIR_ACCESS) and
                      (r_config_fsm.read()    != CONFIG_TRT_LOCK) and
@@ -9474,25 +9225,21 @@
                      (r_config_fsm.read()    != CONFIG_IVT_LOCK) )
                 {
-                    if(r_read_fsm.read() == READ_DIR_REQ)
+                    if (r_read_fsm.read() == READ_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_READ;
 
-                    else if(r_write_fsm.read() == WRITE_DIR_REQ)
+                    else if (r_write_fsm.read() == WRITE_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_DIR_REQ)
+                    else if (r_cas_fsm.read() == CAS_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CAS;
 
-                    else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)
+                    else if (r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK;
 
-                    else if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ)
+                    else if (r_cleanup_fsm.read() == CLEANUP_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CLEANUP;
 
-                    else if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)
+                    else if (r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)
                         r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP;
-
-                    else
-                        m_cpt_dir_unused++;
- 
                 }
                 break;
@@ -9500,5 +9247,5 @@
                 ////////////////////
             case ALLOC_DIR_READ:    // allocated to READ FSM
-                if( ((r_read_fsm.read()      != READ_DIR_REQ)   and
+                if (((r_read_fsm.read()      != READ_DIR_REQ)   and
                      (r_read_fsm.read()      != READ_DIR_LOCK)   and
                      (r_read_fsm.read()      != READ_TRT_LOCK)   and
@@ -9511,32 +9258,27 @@
                      (r_alloc_trt_fsm.read()  == ALLOC_TRT_READ)) )
                 {
-                    if(r_write_fsm.read() == WRITE_DIR_REQ)
+                    if (r_write_fsm.read() == WRITE_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_DIR_REQ)
+                    else if (r_cas_fsm.read() == CAS_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CAS;
 
-                    else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)
+                    else if (r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK;
 
-                    else if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ)
+                    else if (r_cleanup_fsm.read() == CLEANUP_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CLEANUP;
 
-                    else if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)
+                    else if (r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)
                         r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP;
 
-                    else if(r_config_fsm.read() == CONFIG_DIR_REQ)
+                    else if (r_config_fsm.read() == CONFIG_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CONFIG;
-
-                    else
-                        m_cpt_dir_unused++;
-                }
-                else
-                    m_cpt_read_fsm_dir_used++;
+                }
                 break;
 
                 /////////////////////
             case ALLOC_DIR_WRITE:
-                if(((r_write_fsm.read()       != WRITE_DIR_REQ)  and
+                if (((r_write_fsm.read()       != WRITE_DIR_REQ)  and
                     (r_write_fsm.read()       != WRITE_DIR_LOCK)  and
                     (r_write_fsm.read()       != WRITE_DIR_HIT)  and
@@ -9552,32 +9294,27 @@
                      (r_alloc_trt_fsm.read()  == ALLOC_TRT_WRITE)))
                 {
-                    if(r_cas_fsm.read() == CAS_DIR_REQ)
+                    if (r_cas_fsm.read() == CAS_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CAS;
 
-                    else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)
+                    else if (r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK;
 
-                    else if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ)
+                    else if (r_cleanup_fsm.read() == CLEANUP_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CLEANUP;
 
-                    else if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)
+                    else if (r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)
                         r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP;
 
-                    else if(r_config_fsm.read() == CONFIG_DIR_REQ)
+                    else if (r_config_fsm.read() == CONFIG_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CONFIG;
 
-                    else if(r_read_fsm.read() == READ_DIR_REQ)
+                    else if (r_read_fsm.read() == READ_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_READ;
-
-                    else
-                        m_cpt_dir_unused++;
-                }
-                else
-                    m_cpt_write_fsm_dir_used++;
+                }
                 break;
 
                 ///////////////////
             case ALLOC_DIR_CAS:    // allocated to CAS FSM
-                if(((r_cas_fsm.read()         != CAS_DIR_REQ)  and
+                if (((r_cas_fsm.read()         != CAS_DIR_REQ)  and
                     (r_cas_fsm.read()         != CAS_DIR_LOCK)  and
                     (r_cas_fsm.read()         != CAS_DIR_HIT_READ)  and
@@ -9594,31 +9331,26 @@
                      (r_alloc_trt_fsm.read()  == ALLOC_TRT_CAS)))
                 {                   
-                    if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)
+                    if (r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK;
 
-                    else if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ)
+                    else if (r_cleanup_fsm.read() == CLEANUP_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CLEANUP;
 
-                    else if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)
+                    else if (r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)
                         r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP;
 
-                    else if(r_config_fsm.read() == CONFIG_DIR_REQ)
+                    else if (r_config_fsm.read() == CONFIG_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CONFIG;
 
-                    else if(r_read_fsm.read() == READ_DIR_REQ)
+                    else if (r_read_fsm.read() == READ_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_READ;
 
-                    else if(r_write_fsm.read() == WRITE_DIR_REQ)
+                    else if (r_write_fsm.read() == WRITE_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_WRITE;
-
-                    else
-                        m_cpt_dir_unused++;
-                }
-                else
-                    m_cpt_cas_fsm_dir_used++;
+                }
                 break;
                 ////////////////////////
             case ALLOC_DIR_MULTI_ACK:    // allocated to MULTI_ACK FSM
-                if(((r_multi_ack_fsm.read() != MULTI_ACK_DIR_REQ) and
+                if (((r_multi_ack_fsm.read() != MULTI_ACK_DIR_REQ) and
                     (r_multi_ack_fsm.read() != MULTI_ACK_DIR_LOCK) and
                     (r_multi_ack_fsm.read() != MULTI_ACK_IVT_LOCK) and
@@ -9631,31 +9363,26 @@
                  //    (r_alloc_heap_fsm.read() == ALLOC_HEAP_MULTI_ACK)))
                 {
-                    if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ)
+                    if (r_cleanup_fsm.read() == CLEANUP_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CLEANUP;
 
-                    else if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)
+                    else if (r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)
                         r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP;
 
-                    else if(r_config_fsm.read() == CONFIG_DIR_REQ)
+                    else if (r_config_fsm.read() == CONFIG_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CONFIG;
 
-                    else if(r_read_fsm.read() == READ_DIR_REQ)
+                    else if (r_read_fsm.read() == READ_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_READ;
 
-                    else if(r_write_fsm.read() == WRITE_DIR_REQ)
+                    else if (r_write_fsm.read() == WRITE_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_DIR_REQ)
+                    else if (r_cas_fsm.read() == CAS_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CAS;
-
-                    else
-                        m_cpt_dir_unused++;
-                }
-                else
-                    m_cpt_multi_ack_fsm_dir_used++;
+                }
                 break;
                 ///////////////////////
             case ALLOC_DIR_CLEANUP:    // allocated to CLEANUP FSM
-                if((r_cleanup_fsm.read() != CLEANUP_DIR_REQ) and
+                if ((r_cleanup_fsm.read() != CLEANUP_DIR_REQ) and
                    (r_cleanup_fsm.read() != CLEANUP_DIR_LOCK) and
                    (r_cleanup_fsm.read() != CLEANUP_LOCKED_IVT_LOCK) and
@@ -9664,58 +9391,48 @@
                    (r_cleanup_fsm.read() != CLEANUP_HEAP_LOCK))
                 {
-                    if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)
+                    if (r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)
                         r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP;
 
-                    else if(r_config_fsm.read() == CONFIG_DIR_REQ)
+                    else if (r_config_fsm.read() == CONFIG_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CONFIG;
 
-                    else if(r_read_fsm.read() == READ_DIR_REQ)
+                    else if (r_read_fsm.read() == READ_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_READ;
 
-                    else if(r_write_fsm.read() == WRITE_DIR_REQ)
+                    else if (r_write_fsm.read() == WRITE_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_DIR_REQ)
+                    else if (r_cas_fsm.read() == CAS_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CAS;
 
-                    else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)
+                    else if (r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK;
-
-                    else
-                        m_cpt_dir_unused++;
-                }
-                else
-                    m_cpt_cleanup_fsm_dir_used++;
+                }
                 break;
 
                 ////////////////////////
             case ALLOC_DIR_XRAM_RSP:    // allocated to XRAM_RSP FSM
-                if( (r_xram_rsp_fsm.read() != XRAM_RSP_DIR_LOCK) and
+                if ((r_xram_rsp_fsm.read() != XRAM_RSP_DIR_LOCK) and
                     (r_xram_rsp_fsm.read() != XRAM_RSP_TRT_COPY) and
                     (r_xram_rsp_fsm.read() != XRAM_RSP_IVT_LOCK))
                 {
-                    if(r_config_fsm.read() == CONFIG_DIR_REQ)
+                    if (r_config_fsm.read() == CONFIG_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CONFIG;
 
-                    else if(r_read_fsm.read() == READ_DIR_REQ)
+                    else if (r_read_fsm.read() == READ_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_READ;
 
-                    else if(r_write_fsm.read() == WRITE_DIR_REQ)
+                    else if (r_write_fsm.read() == WRITE_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_DIR_REQ)
+                    else if (r_cas_fsm.read() == CAS_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CAS;
 
-                    else if(r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)
+                    else if (r_multi_ack_fsm.read() == MULTI_ACK_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_MULTI_ACK;
 
-                    else if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ)
+                    else if (r_cleanup_fsm.read() == CLEANUP_DIR_REQ)
                         r_alloc_dir_fsm = ALLOC_DIR_CLEANUP;
-
-                    else
-                        m_cpt_dir_unused++;
-                }
-                else
-                    m_cpt_xram_rsp_fsm_dir_used++;
+                }
                 break;
 
@@ -9735,13 +9452,13 @@
             ////////////////////
             case ALLOC_TRT_READ:
-                if(r_read_fsm.read() != READ_TRT_LOCK)
-                {
-                    if(r_write_fsm.read() == WRITE_MISS_TRT_LOCK) 
+                if (r_read_fsm.read() != READ_TRT_LOCK)
+                {
+                    if (r_write_fsm.read() == WRITE_MISS_TRT_LOCK) 
                         r_alloc_trt_fsm = ALLOC_TRT_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_MISS_TRT_LOCK) 
+                    else if (r_cas_fsm.read() == CAS_MISS_TRT_LOCK) 
                         r_alloc_trt_fsm = ALLOC_TRT_CAS;
 
-                    else if((r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or
+                    else if ((r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or
                             (r_ixr_cmd_fsm.read() == IXR_CMD_WRITE_TRT) or
                             (r_ixr_cmd_fsm.read() == IXR_CMD_CAS_TRT) or
@@ -9751,34 +9468,29 @@
                         r_alloc_trt_fsm = ALLOC_TRT_IXR_CMD;
 
-                    else if((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) and
+                    else if ((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) and
                             (r_alloc_dir_fsm.read() == ALLOC_DIR_XRAM_RSP))
                         r_alloc_trt_fsm = ALLOC_TRT_XRAM_RSP;
 
-                    else if((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) or
+                    else if ((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) or
                             (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ))
                         r_alloc_trt_fsm = ALLOC_TRT_IXR_RSP;
 
-                    else if( r_config_fsm.read() == CONFIG_TRT_LOCK ) 
+                    else if (r_config_fsm.read() == CONFIG_TRT_LOCK ) 
                         r_alloc_trt_fsm = ALLOC_TRT_CONFIG;
 
                     else if (r_cleanup_fsm.read() == CLEANUP_MISS_IXR_REQ)
                         r_alloc_trt_fsm = ALLOC_TRT_CLEANUP;
-
-                    else
-                        m_cpt_trt_unused++;
-                }
-                else
-                    m_cpt_read_fsm_trt_used++;
+                }
                 break;
 
                 /////////////////////
             case ALLOC_TRT_WRITE:
-                if((r_write_fsm.read() != WRITE_MISS_TRT_LOCK) and
+                if ((r_write_fsm.read() != WRITE_MISS_TRT_LOCK) and
                    (r_write_fsm.read() != WRITE_INVAL_IVT_LOCK))
                 {
-                    if(r_cas_fsm.read() == CAS_MISS_TRT_LOCK) 
+                    if (r_cas_fsm.read() == CAS_MISS_TRT_LOCK) 
                         r_alloc_trt_fsm = ALLOC_TRT_CAS;
 
-                    else if((r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or
+                    else if ((r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or
                             (r_ixr_cmd_fsm.read() == IXR_CMD_WRITE_TRT) or
                             (r_ixr_cmd_fsm.read() == IXR_CMD_CAS_TRT) or
@@ -9788,13 +9500,13 @@
                         r_alloc_trt_fsm = ALLOC_TRT_IXR_CMD;
 
-                    else if((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) and
+                    else if ((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) and
                             (r_alloc_dir_fsm.read() == ALLOC_DIR_XRAM_RSP))
                         r_alloc_trt_fsm = ALLOC_TRT_XRAM_RSP;
 
-                    else if((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) or
+                    else if ((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) or
                             (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ))
                         r_alloc_trt_fsm = ALLOC_TRT_IXR_RSP;
 
-                    else if( r_config_fsm.read() == CONFIG_TRT_LOCK ) 
+                    else if (r_config_fsm.read() == CONFIG_TRT_LOCK ) 
                         r_alloc_trt_fsm = ALLOC_TRT_CONFIG;
 
@@ -9802,19 +9514,14 @@
                         r_alloc_trt_fsm = ALLOC_TRT_CLEANUP;
 
-                    else if(r_read_fsm.read() == READ_TRT_LOCK)
+                    else if (r_read_fsm.read() == READ_TRT_LOCK)
                         r_alloc_trt_fsm = ALLOC_TRT_READ;
-
-                    else
-                        m_cpt_trt_unused++;
-                }
-                else
-                    m_cpt_write_fsm_trt_used++;
+                }
                 break;
 
                 ////////////////////
             case ALLOC_TRT_CAS:
-                if(r_cas_fsm.read() != CAS_MISS_TRT_LOCK) 
-                {
-                    if((r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or
+                if (r_cas_fsm.read() != CAS_MISS_TRT_LOCK) 
+                {
+                    if ((r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or
                             (r_ixr_cmd_fsm.read() == IXR_CMD_WRITE_TRT) or
                             (r_ixr_cmd_fsm.read() == IXR_CMD_CAS_TRT) or
@@ -9824,13 +9531,13 @@
                         r_alloc_trt_fsm = ALLOC_TRT_IXR_CMD;
 
-                    else if((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) and
+                    else if ((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) and
                             (r_alloc_dir_fsm.read() == ALLOC_DIR_XRAM_RSP))
                         r_alloc_trt_fsm = ALLOC_TRT_XRAM_RSP;
 
-                    else if((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) or
+                    else if ((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) or
                             (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ))
                         r_alloc_trt_fsm = ALLOC_TRT_IXR_RSP;
 
-                    else if( r_config_fsm.read() == CONFIG_TRT_LOCK ) 
+                    else if (r_config_fsm.read() == CONFIG_TRT_LOCK ) 
                         r_alloc_trt_fsm = ALLOC_TRT_CONFIG;
 
@@ -9838,19 +9545,14 @@
                         r_alloc_trt_fsm = ALLOC_TRT_CLEANUP;
 
-                    else if(r_read_fsm.read() == READ_TRT_LOCK)
+                    else if (r_read_fsm.read() == READ_TRT_LOCK)
                         r_alloc_trt_fsm = ALLOC_TRT_READ;
 
-                    else if(r_write_fsm.read() == WRITE_MISS_TRT_LOCK)
+                    else if (r_write_fsm.read() == WRITE_MISS_TRT_LOCK)
                         r_alloc_trt_fsm = ALLOC_TRT_WRITE;
-
-                    else
-                        m_cpt_trt_unused++;
-                }
-                else
-                    m_cpt_cas_fsm_trt_used++;
+                }
                 break;
                 ///////////////////////
             case ALLOC_TRT_IXR_CMD:
-                if((r_ixr_cmd_fsm.read() != IXR_CMD_READ_TRT) and
+                if ((r_ixr_cmd_fsm.read() != IXR_CMD_READ_TRT) and
                         (r_ixr_cmd_fsm.read() != IXR_CMD_WRITE_TRT) and
                         (r_ixr_cmd_fsm.read() != IXR_CMD_CAS_TRT) and
@@ -9859,13 +9561,13 @@
                         (r_ixr_cmd_fsm.read() != IXR_CMD_CONFIG_TRT))
                 {
-                    if((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) and
+                    if ((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) and
                             (r_alloc_dir_fsm.read() == ALLOC_DIR_XRAM_RSP))
                         r_alloc_trt_fsm = ALLOC_TRT_XRAM_RSP;
 
-                    else if((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) or
+                    else if ((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) or
                             (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ))
                         r_alloc_trt_fsm = ALLOC_TRT_IXR_RSP;
 
-                    else if( r_config_fsm.read() == CONFIG_TRT_LOCK ) 
+                    else if (r_config_fsm.read() == CONFIG_TRT_LOCK ) 
                         r_alloc_trt_fsm = ALLOC_TRT_CONFIG;
 
@@ -9873,25 +9575,18 @@
                         r_alloc_trt_fsm = ALLOC_TRT_CLEANUP;
 
-                    else if(r_read_fsm.read() == READ_TRT_LOCK)
+                    else if (r_read_fsm.read() == READ_TRT_LOCK)
                         r_alloc_trt_fsm = ALLOC_TRT_READ;
 
-                    else if(r_write_fsm.read() == WRITE_MISS_TRT_LOCK) 
+                    else if (r_write_fsm.read() == WRITE_MISS_TRT_LOCK) 
                         r_alloc_trt_fsm = ALLOC_TRT_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_MISS_TRT_LOCK)
+                    else if (r_cas_fsm.read() == CAS_MISS_TRT_LOCK)
                         r_alloc_trt_fsm = ALLOC_TRT_CAS;
-
-                    else
-                        m_cpt_trt_unused++;
-                        
-                }
-                else
-                    m_cpt_ixr_cmd_fsm_trt_used++;
-                    
+                }
                 break;
 
                 ////////////////////////
             case ALLOC_TRT_XRAM_RSP:
-                if(((r_xram_rsp_fsm.read()  != XRAM_RSP_DIR_LOCK)  or
+                if (((r_xram_rsp_fsm.read()  != XRAM_RSP_DIR_LOCK)  or
                             (r_alloc_dir_fsm.read() != ALLOC_DIR_XRAM_RSP)) and
                         (r_xram_rsp_fsm.read()  != XRAM_RSP_TRT_COPY)  and
@@ -9899,9 +9594,9 @@
                         (r_xram_rsp_fsm.read()  != XRAM_RSP_IVT_LOCK))
                 {
-                    if((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) or
+                    if ((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) or
                             (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ))
                         r_alloc_trt_fsm = ALLOC_TRT_IXR_RSP;
 
-                    else if( r_config_fsm.read() == CONFIG_TRT_LOCK ) 
+                    else if (r_config_fsm.read() == CONFIG_TRT_LOCK ) 
                         r_alloc_trt_fsm = ALLOC_TRT_CONFIG;
 
@@ -9909,14 +9604,14 @@
                         r_alloc_trt_fsm = ALLOC_TRT_CLEANUP;
 
-                    else if(r_read_fsm.read() == READ_TRT_LOCK)
+                    else if (r_read_fsm.read() == READ_TRT_LOCK)
                         r_alloc_trt_fsm = ALLOC_TRT_READ;
 
-                    else if(r_write_fsm.read() == WRITE_MISS_TRT_LOCK) 
+                    else if (r_write_fsm.read() == WRITE_MISS_TRT_LOCK) 
                         r_alloc_trt_fsm = ALLOC_TRT_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_MISS_TRT_LOCK) 
+                    else if (r_cas_fsm.read() == CAS_MISS_TRT_LOCK) 
                         r_alloc_trt_fsm = ALLOC_TRT_CAS;
 
-                    else if((r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or
+                    else if ((r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or
                             (r_ixr_cmd_fsm.read() == IXR_CMD_WRITE_TRT) or
                             (r_ixr_cmd_fsm.read() == IXR_CMD_CAS_TRT) or
@@ -9925,18 +9620,13 @@
                             (r_ixr_cmd_fsm.read() == IXR_CMD_CONFIG_TRT) )
                         r_alloc_trt_fsm = ALLOC_TRT_IXR_CMD;
-
-                    else
-                        m_cpt_trt_unused++;
-                }
-                else
-                    m_cpt_xram_rsp_fsm_trt_used++;
+                }
                 break;
 
                 ////////////////////////
             case ALLOC_TRT_IXR_RSP:
-                if((r_ixr_rsp_fsm.read() != IXR_RSP_TRT_ERASE) and
+                if ((r_ixr_rsp_fsm.read() != IXR_RSP_TRT_ERASE) and
                         (r_ixr_rsp_fsm.read() != IXR_RSP_TRT_READ))
                 {
-                    if( r_config_fsm.read() == CONFIG_TRT_LOCK ) 
+                    if (r_config_fsm.read() == CONFIG_TRT_LOCK ) 
                         r_alloc_trt_fsm = ALLOC_TRT_CONFIG;
 
@@ -9944,14 +9634,14 @@
                         r_alloc_trt_fsm = ALLOC_TRT_CLEANUP;
 
-                    else if(r_read_fsm.read() == READ_TRT_LOCK)
+                    else if (r_read_fsm.read() == READ_TRT_LOCK)
                         r_alloc_trt_fsm = ALLOC_TRT_READ;
 
-                    else if(r_write_fsm.read() == WRITE_MISS_TRT_LOCK) 
+                    else if (r_write_fsm.read() == WRITE_MISS_TRT_LOCK) 
                         r_alloc_trt_fsm = ALLOC_TRT_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_MISS_TRT_LOCK) 
+                    else if (r_cas_fsm.read() == CAS_MISS_TRT_LOCK) 
                         r_alloc_trt_fsm = ALLOC_TRT_CAS;
 
-                    else if((r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or
+                    else if ((r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or
                             (r_ixr_cmd_fsm.read() == IXR_CMD_WRITE_TRT) or
                             (r_ixr_cmd_fsm.read() == IXR_CMD_CAS_TRT) or
@@ -9961,18 +9651,13 @@
                         r_alloc_trt_fsm = ALLOC_TRT_IXR_CMD;
 
-                    else if((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) &&
+                    else if ((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) &&
                             (r_alloc_dir_fsm.read() == ALLOC_DIR_XRAM_RSP))
                         r_alloc_trt_fsm = ALLOC_TRT_XRAM_RSP;
-
-                    else
-                        m_cpt_trt_unused++;
-                }
-                else
-                    m_cpt_ixr_rsp_fsm_trt_used++;
+                }
                 break;
 
                 //////////////////////
             case ALLOC_TRT_CONFIG:
-                if((r_config_fsm.read() != CONFIG_TRT_LOCK) and
+                if ((r_config_fsm.read() != CONFIG_TRT_LOCK) and
                         (r_config_fsm.read() != CONFIG_TRT_SET))
                 {
@@ -9980,14 +9665,14 @@
                         r_alloc_trt_fsm = ALLOC_TRT_CLEANUP;
 
-                    else if(r_read_fsm.read() == READ_TRT_LOCK)
+                    else if (r_read_fsm.read() == READ_TRT_LOCK)
                         r_alloc_trt_fsm = ALLOC_TRT_READ;
 
-                    else if(r_write_fsm.read() == WRITE_MISS_TRT_LOCK) 
+                    else if (r_write_fsm.read() == WRITE_MISS_TRT_LOCK) 
                         r_alloc_trt_fsm = ALLOC_TRT_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_MISS_TRT_LOCK) 
+                    else if (r_cas_fsm.read() == CAS_MISS_TRT_LOCK) 
                         r_alloc_trt_fsm = ALLOC_TRT_CAS;
 
-                    else if((r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or
+                    else if ((r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or
                             (r_ixr_cmd_fsm.read() == IXR_CMD_WRITE_TRT) or
                             (r_ixr_cmd_fsm.read() == IXR_CMD_CAS_TRT) or
@@ -9997,9 +9682,9 @@
                         r_alloc_trt_fsm = ALLOC_TRT_IXR_CMD;
 
-                    else if((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) and
+                    else if ((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) and
                             (r_alloc_dir_fsm.read() == ALLOC_DIR_XRAM_RSP))
                         r_alloc_trt_fsm = ALLOC_TRT_XRAM_RSP;
 
-                    else if((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) or
+                    else if ((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) or
                             (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ))
                         r_alloc_trt_fsm = ALLOC_TRT_IXR_RSP;
@@ -10009,16 +9694,16 @@
                 ////////////////////////
             case ALLOC_TRT_CLEANUP:
-                if(r_cleanup_fsm.read() != CLEANUP_MISS_IXR_REQ)
-                {
-                    if(r_read_fsm.read() == READ_TRT_LOCK)
+                if (r_cleanup_fsm.read() != CLEANUP_MISS_IXR_REQ)
+                {
+                    if (r_read_fsm.read() == READ_TRT_LOCK)
                         r_alloc_trt_fsm = ALLOC_TRT_READ;
 
-                    else if(r_write_fsm.read() == WRITE_MISS_TRT_LOCK) 
+                    else if (r_write_fsm.read() == WRITE_MISS_TRT_LOCK) 
                         r_alloc_trt_fsm = ALLOC_TRT_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_MISS_TRT_LOCK) 
+                    else if (r_cas_fsm.read() == CAS_MISS_TRT_LOCK) 
                         r_alloc_trt_fsm = ALLOC_TRT_CAS;
 
-                    else if((r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or
+                    else if ((r_ixr_cmd_fsm.read() == IXR_CMD_READ_TRT) or
                             (r_ixr_cmd_fsm.read() == IXR_CMD_WRITE_TRT) or
                             (r_ixr_cmd_fsm.read() == IXR_CMD_CAS_TRT) or
@@ -10028,20 +9713,15 @@
                         r_alloc_trt_fsm = ALLOC_TRT_IXR_CMD;
 
-                    else if((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) and
+                    else if ((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) and
                             (r_alloc_dir_fsm.read() == ALLOC_DIR_XRAM_RSP))
                         r_alloc_trt_fsm = ALLOC_TRT_XRAM_RSP;
 
-                    else if((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) ||
+                    else if ((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) ||
                             (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ))
                         r_alloc_trt_fsm = ALLOC_TRT_IXR_RSP;
 
-                    else if( r_config_fsm.read() == CONFIG_TRT_LOCK ) 
+                    else if (r_config_fsm.read() == CONFIG_TRT_LOCK ) 
                         r_alloc_trt_fsm = ALLOC_TRT_CONFIG;
-    
-                    else
-                        m_cpt_trt_unused ++;
-                }
-                else
-                    m_cpt_cleanup_fsm_trt_used++;
+                }
                 break;
 
@@ -10066,5 +9746,5 @@
                 r_alloc_heap_reset_cpt.write(r_alloc_heap_reset_cpt.read() + 1);
 
-                if(r_alloc_heap_reset_cpt.read() == (m_heap_size-1))
+                if (r_alloc_heap_reset_cpt.read() == (m_heap_size-1))
                 {
                     m_heap.init();
@@ -10076,5 +9756,5 @@
                 ////////////////////
             case ALLOC_HEAP_READ:
-                if((r_read_fsm.read() != READ_HEAP_REQ) and
+                if ((r_read_fsm.read() != READ_HEAP_REQ) and
                    (r_read_fsm.read() != READ_HEAP_LOCK) and
                    (r_read_fsm.read() != READ_HEAP_ERASE) and
@@ -10082,20 +9762,20 @@
                    (r_read_fsm.read() != READ_INVAL_HEAP_ERASE)) 
                 {
-                    if(r_write_fsm.read() == WRITE_HEAP_REQ)
+                    if (r_write_fsm.read() == WRITE_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_MULTI_INVAL_HEAP_LOCK)
+                    else if (r_cas_fsm.read() == CAS_MULTI_INVAL_HEAP_LOCK)
                         r_alloc_heap_fsm = ALLOC_HEAP_CAS;
 
-                    else if(r_cleanup_fsm.read() == CLEANUP_HEAP_REQ)
+                    else if (r_cleanup_fsm.read() == CLEANUP_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP;
                 
-                    else if(r_multi_ack_fsm.read() == MULTI_ACK_HEAP_REQ)
+                    else if (r_multi_ack_fsm.read() == MULTI_ACK_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_MULTI_ACK;
 
-                    else if(r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ)
+                    else if (r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP;
 
-                    else if(r_config_fsm.read() == CONFIG_HEAP_REQ)
+                    else if (r_config_fsm.read() == CONFIG_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_CONFIG;
 
@@ -10103,29 +9783,27 @@
                         m_cpt_heap_unused++;
                 }
-                else
-                    m_cpt_read_fsm_heap_used++;
                 break;
 
                 /////////////////////
             case ALLOC_HEAP_WRITE:
-                if((r_write_fsm.read() != WRITE_HEAP_REQ) and
+                if ((r_write_fsm.read() != WRITE_HEAP_REQ) and
                    (r_write_fsm.read() != WRITE_HEAP_ERASE)) 
                 {
-                    if(r_cas_fsm.read() == CAS_MULTI_INVAL_HEAP_LOCK)
+                    if (r_cas_fsm.read() == CAS_MULTI_INVAL_HEAP_LOCK)
                         r_alloc_heap_fsm = ALLOC_HEAP_CAS;
 
-                    else if(r_cleanup_fsm.read() == CLEANUP_HEAP_REQ)
+                    else if (r_cleanup_fsm.read() == CLEANUP_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP;
 
-                    else if(r_multi_ack_fsm.read() == MULTI_ACK_HEAP_REQ)
+                    else if (r_multi_ack_fsm.read() == MULTI_ACK_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_MULTI_ACK;
 
-                    else if(r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ)
+                    else if (r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP;
 
-                    else if(r_config_fsm.read() == CONFIG_HEAP_REQ)
+                    else if (r_config_fsm.read() == CONFIG_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_CONFIG;
 
-                    else if((r_read_fsm.read() == READ_HEAP_REQ) or
+                    else if ((r_read_fsm.read() == READ_HEAP_REQ) or
                             (r_read_fsm.read() == READ_INVAL_HEAP_REQ))
                         r_alloc_heap_fsm = ALLOC_HEAP_READ;
@@ -10134,31 +9812,29 @@
                         m_cpt_heap_unused++;
                 }
-                else
-                    m_cpt_write_fsm_heap_used++;
                 break;
 
                 ////////////////////
             case ALLOC_HEAP_CAS:
-                if((r_cas_fsm.read() != CAS_MULTI_INVAL_HEAP_LOCK) and
+                if ((r_cas_fsm.read() != CAS_MULTI_INVAL_HEAP_LOCK) and
                         (r_cas_fsm.read() != CAS_MULTI_INVAL_REQ) and
                         (r_cas_fsm.read() != CAS_HEAP_NEXT))
                 {
-                    if(r_cleanup_fsm.read() == CLEANUP_HEAP_REQ)
+                    if (r_cleanup_fsm.read() == CLEANUP_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP;
 
-                    else if(r_multi_ack_fsm.read() == MULTI_ACK_HEAP_REQ)
+                    else if (r_multi_ack_fsm.read() == MULTI_ACK_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_MULTI_ACK;
 
-                    else if(r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ)
+                    else if (r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP;
 
-                    else if(r_config_fsm.read() == CONFIG_HEAP_REQ)
+                    else if (r_config_fsm.read() == CONFIG_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_CONFIG;
 
-                    else if((r_read_fsm.read() == READ_HEAP_REQ) or
+                    else if ((r_read_fsm.read() == READ_HEAP_REQ) or
                             (r_read_fsm.read() == READ_INVAL_HEAP_REQ))
                         r_alloc_heap_fsm = ALLOC_HEAP_READ;
 
-                    else if(r_write_fsm.read() == WRITE_HEAP_REQ)
+                    else if (r_write_fsm.read() == WRITE_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_WRITE;
 
@@ -10166,32 +9842,30 @@
                         m_cpt_heap_unused++;
                 }
-                else
-                    m_cpt_cas_fsm_heap_used++;
                 break;
 
                 ///////////////////////
             case ALLOC_HEAP_CLEANUP:
-                if((r_cleanup_fsm.read() != CLEANUP_HEAP_REQ) and
+                if ((r_cleanup_fsm.read() != CLEANUP_HEAP_REQ) and
                         (r_cleanup_fsm.read() != CLEANUP_HEAP_LOCK) and
                         (r_cleanup_fsm.read() != CLEANUP_HEAP_SEARCH) and
                         (r_cleanup_fsm.read() != CLEANUP_HEAP_CLEAN))
                 {
-                    if(r_multi_ack_fsm.read() == MULTI_ACK_HEAP_REQ)
+                    if (r_multi_ack_fsm.read() == MULTI_ACK_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_MULTI_ACK;
 
-                    else if(r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ)
+                    else if (r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP;
 
-                    else if(r_config_fsm.read() == CONFIG_HEAP_REQ)
+                    else if (r_config_fsm.read() == CONFIG_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_CONFIG;
 
-                    else if((r_read_fsm.read() == READ_HEAP_REQ) or
+                    else if ((r_read_fsm.read() == READ_HEAP_REQ) or
                             (r_read_fsm.read() == READ_INVAL_HEAP_REQ))
                         r_alloc_heap_fsm = ALLOC_HEAP_READ;
 
-                    else if(r_write_fsm.read() == WRITE_HEAP_REQ)
+                    else if (r_write_fsm.read() == WRITE_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_MULTI_INVAL_HEAP_LOCK)
+                    else if (r_cas_fsm.read() == CAS_MULTI_INVAL_HEAP_LOCK)
                         r_alloc_heap_fsm = ALLOC_HEAP_CAS;
 
@@ -10199,30 +9873,28 @@
                         m_cpt_heap_unused++;
                 }
-                else
-                    m_cpt_cleanup_fsm_heap_used++;
                 break;
 
                 ////////////////////////
              case ALLOC_HEAP_MULTI_ACK:
-                if((r_multi_ack_fsm.read() != MULTI_ACK_HEAP_REQ) and
+                if ((r_multi_ack_fsm.read() != MULTI_ACK_HEAP_REQ) and
                         (r_multi_ack_fsm.read() != MULTI_ACK_HEAP_LOCK)) 
                 {
-                    if(r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ)
+                    if (r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP;
 
-                    else if(r_config_fsm.read() == CONFIG_HEAP_REQ)
+                    else if (r_config_fsm.read() == CONFIG_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_CONFIG;
 
-                    else if((r_read_fsm.read() == READ_HEAP_REQ) or
+                    else if ((r_read_fsm.read() == READ_HEAP_REQ) or
                             (r_read_fsm.read() == READ_INVAL_HEAP_REQ))
                         r_alloc_heap_fsm = ALLOC_HEAP_READ;
 
-                    else if(r_write_fsm.read() == WRITE_HEAP_REQ)
+                    else if (r_write_fsm.read() == WRITE_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_MULTI_INVAL_HEAP_LOCK)
+                    else if (r_cas_fsm.read() == CAS_MULTI_INVAL_HEAP_LOCK)
                         r_alloc_heap_fsm = ALLOC_HEAP_CAS;
 
-                    else if(r_cleanup_fsm.read() == CLEANUP_HEAP_REQ)
+                    else if (r_cleanup_fsm.read() == CLEANUP_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP;
 
@@ -10230,35 +9902,32 @@
                         m_cpt_heap_unused++;
                 }
-                else
-                    m_cpt_multi_ack_fsm_heap_used++;
                 break;
 
                 ////////////////////////
             case ALLOC_HEAP_XRAM_RSP:
-                if((r_xram_rsp_fsm.read() != XRAM_RSP_HEAP_REQ) and
+                if ((r_xram_rsp_fsm.read() != XRAM_RSP_HEAP_REQ) and
                         (r_xram_rsp_fsm.read() != XRAM_RSP_HEAP_ERASE))
                 {
-                    if(r_config_fsm.read() == CONFIG_HEAP_REQ)
+                    if (r_config_fsm.read() == CONFIG_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_CONFIG;
 
-                    else if((r_read_fsm.read() == READ_HEAP_REQ) or
+                    else if ((r_read_fsm.read() == READ_HEAP_REQ) or
                             (r_read_fsm.read() == READ_INVAL_HEAP_REQ))
                         r_alloc_heap_fsm = ALLOC_HEAP_READ;
 
-                    else if(r_write_fsm.read() == WRITE_HEAP_REQ)
+                    else if (r_write_fsm.read() == WRITE_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_MULTI_INVAL_HEAP_LOCK)
+                    else if (r_cas_fsm.read() == CAS_MULTI_INVAL_HEAP_LOCK)
                         r_alloc_heap_fsm = ALLOC_HEAP_CAS;
 
-                    else if(r_cleanup_fsm.read() == CLEANUP_HEAP_REQ)
+                    else if (r_cleanup_fsm.read() == CLEANUP_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP;
 
-                    else if(r_multi_ack_fsm.read() == MULTI_ACK_HEAP_REQ)
+                    else if (r_multi_ack_fsm.read() == MULTI_ACK_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_MULTI_ACK;
 
                     else
                         m_cpt_heap_unused++;
-
                 }
                 break;
@@ -10266,30 +9935,28 @@
                 ///////////////////////
             case ALLOC_HEAP_CONFIG:
-                if((r_config_fsm.read() != CONFIG_HEAP_REQ) and
+                if ((r_config_fsm.read() != CONFIG_HEAP_REQ) and
                         (r_config_fsm.read() != CONFIG_HEAP_SCAN))
                 {
-                    if((r_read_fsm.read() == READ_HEAP_REQ) or
+                    if ((r_read_fsm.read() == READ_HEAP_REQ) or
                             (r_read_fsm.read() == READ_INVAL_HEAP_REQ))
                         r_alloc_heap_fsm = ALLOC_HEAP_READ;
 
-                    else if(r_write_fsm.read() == WRITE_HEAP_REQ)
+                    else if (r_write_fsm.read() == WRITE_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_WRITE;
 
-                    else if(r_cas_fsm.read() == CAS_MULTI_INVAL_HEAP_LOCK)
+                    else if (r_cas_fsm.read() == CAS_MULTI_INVAL_HEAP_LOCK)
                         r_alloc_heap_fsm = ALLOC_HEAP_CAS;
 
-                    else if(r_cleanup_fsm.read() == CLEANUP_HEAP_REQ)
+                    else if (r_cleanup_fsm.read() == CLEANUP_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_CLEANUP;
 
-                    else if(r_multi_ack_fsm.read() == MULTI_ACK_HEAP_REQ)
+                    else if (r_multi_ack_fsm.read() == MULTI_ACK_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_MULTI_ACK;
 
-                    else if(r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ)
+                    else if (r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ)
                         r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP;
                     else
                         m_cpt_heap_unused++;
                 }
-                else
-                    m_cpt_xram_rsp_fsm_heap_used++;
                 break;
 
@@ -10351,7 +10018,7 @@
         ////////////////////////////////////////////////////////////////////////////////////
 
-        if(cc_receive_to_cleanup_fifo_put)
+        if (cc_receive_to_cleanup_fifo_put)
         {
-            if(cc_receive_to_cleanup_fifo_get)
+            if (cc_receive_to_cleanup_fifo_get)
             {
                 m_cc_receive_to_cleanup_fifo.put_and_get( ((uint64_t)(p_dspin_p2m.eop.read()&0x1) << 32) | p_dspin_p2m.data.read() );
@@ -10364,5 +10031,5 @@
         else
         {
-            if(cc_receive_to_cleanup_fifo_get)
+            if (cc_receive_to_cleanup_fifo_get)
             {
                 m_cc_receive_to_cleanup_fifo.simple_get();
@@ -10377,7 +10044,7 @@
         ////////////////////////////////////////////////////////////////////////////////////
 
-        if(cc_receive_to_multi_ack_fifo_put)
+        if (cc_receive_to_multi_ack_fifo_put)
         {
-            if(cc_receive_to_multi_ack_fifo_get)
+            if (cc_receive_to_multi_ack_fifo_get)
             {
                 m_cc_receive_to_multi_ack_fifo.put_and_get( ((uint64_t)(p_dspin_p2m.eop.read()&0x1) << 32) | p_dspin_p2m.data.read() );
@@ -10390,5 +10057,5 @@
         else
         {
-            if(cc_receive_to_multi_ack_fifo_get)
+            if (cc_receive_to_multi_ack_fifo_get)
             {
                 m_cc_receive_to_multi_ack_fifo.simple_get();
@@ -10446,10 +10113,10 @@
         // The three sources of (increment / decrement) are CONFIG / CLEANUP / IXR_RSP FSMs
         ////////////////////////////////////////////////////////////////////////////////////
-        if ( config_rsp_lines_incr and not 
+        if (config_rsp_lines_incr and not 
              (config_rsp_lines_cleanup_decr or config_rsp_lines_ixr_rsp_decr) )
         {
             r_config_rsp_lines = r_config_rsp_lines.read() + 1;
         }
-        if ( not config_rsp_lines_incr and  
+        if (not config_rsp_lines_incr and  
              (config_rsp_lines_cleanup_decr or config_rsp_lines_ixr_rsp_decr) )
         {
@@ -10462,5 +10129,5 @@
 //                                r_debug_data);
 //#if DEBUG_MEMC_MULTI_ACK
-//                    if(m_debug)
+//                    if (m_debug)
 //                        std::cout << "  <MEMC " << name() << " DEBUG DATA>"
 //                            << " / data0  = "  << r_debug_data[0].read()
@@ -10522,5 +10189,5 @@
         p_vci_ixr.cfixed  = false;
 
-        if ( (r_ixr_cmd_fsm.read() == IXR_CMD_READ_SEND) or
+        if ((r_ixr_cmd_fsm.read() == IXR_CMD_READ_SEND) or
                 (r_ixr_cmd_fsm.read() == IXR_CMD_WRITE_SEND) or
                 (r_ixr_cmd_fsm.read() == IXR_CMD_CAS_SEND) or
@@ -10530,5 +10197,5 @@
             p_vci_ixr.cmdval    = true;
 
-            if ( r_ixr_cmd_get.read() )  // GET
+            if (r_ixr_cmd_get.read() )  // GET
             {
                 p_vci_ixr.cmd     = vci_param_ext::CMD_READ;
@@ -10567,5 +10234,5 @@
         ////////////////////////////////////////////////////
 
-        if( (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ) or
+        if ((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ) or
                 (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) )
         { 
@@ -10667,5 +10334,5 @@
                     p_vci_tgt.rspval  = true;
 
-                    if ( is_ll and not r_tgt_rsp_key_sent.read() )
+                    if (is_ll and not r_tgt_rsp_key_sent.read() )
                     {
                         // LL response first flit
@@ -10689,5 +10356,5 @@
                 {
                     p_vci_tgt.rspval   = true;
-                    if(((r_write_to_tgt_rsp_pktid.read() & 0x7) == TYPE_SC) and r_write_to_tgt_rsp_sc_fail.read())
+                    if (((r_write_to_tgt_rsp_pktid.read() & 0x7) == TYPE_SC) and r_write_to_tgt_rsp_sc_fail.read())
                         p_vci_tgt.rdata  = 1;
                     else
@@ -10711,5 +10378,5 @@
                         p_vci_tgt.rdata   = r_cleanup_to_tgt_rsp_ll_key.read();
                     }
-                    else if ( not r_cleanup_to_tgt_rsp_type.read())
+                    else if (not r_cleanup_to_tgt_rsp_type.read())
                     {
                         p_vci_tgt.rdata    = r_cleanup_to_tgt_rsp_data[r_tgt_rsp_cpt.read()].read();
@@ -10748,5 +10415,5 @@
                     p_vci_tgt.rspval  = true;
 
-                    if( is_ll and not r_tgt_rsp_key_sent.read() ) 
+                    if (is_ll and not r_tgt_rsp_key_sent.read() ) 
                     {
                         // LL response first flit
@@ -10778,5 +10445,5 @@
                     p_vci_tgt.rspval   = true;
 
-                    if(is_ll and not r_tgt_rsp_key_sent.read())
+                    if (is_ll and not r_tgt_rsp_key_sent.read())
                     {
                         p_vci_tgt.rdata = r_cleanup_to_tgt_rsp_ll_key.read();
@@ -10818,37 +10485,33 @@
                 {
                     uint8_t multi_inval_type;
-                    if(m_config_to_cc_send_inst_fifo.read())
-                    {
-                        multi_inval_type = DspinDhccpParam::TYPE_MULTI_INVAL_INST;
+                    if (m_config_to_cc_send_inst_fifo.read())
+                    {
+                        multi_inval_type = DspinHmesiParam::TYPE_MULTI_INVAL_INST;
                     }
                     else
                     {
-                        multi_inval_type = DspinDhccpParam::TYPE_MULTI_INVAL_DATA;
+                        multi_inval_type = DspinHmesiParam::TYPE_MULTI_INVAL_DATA;
                     }
 
                     uint64_t flit = 0;
                     uint64_t dest = m_config_to_cc_send_srcid_fifo.read() <<
-                        (DspinDhccpParam::SRCID_WIDTH - vci_param_int::S);
-
-                    DspinDhccpParam::dspin_set( flit,
+                        (DspinHmesiParam::SRCID_WIDTH - vci_param_int::S);
+
+                    DspinHmesiParam::dspin_set( flit,
                             dest,
-                            DspinDhccpParam::MULTI_INVAL_DEST);
-
-                    DspinDhccpParam::dspin_set( flit,
-                            m_cc_global_id ,
-                            DspinDhccpParam::MULTI_INVAL_SRCID);
+                            DspinHmesiParam::MULTI_INVAL_DEST);
 
                     // MODIFIED FOR CONFIG INVAL (solution 1 bit in flit multi_inval)
-                    DspinDhccpParam::dspin_set( flit,
+                    DspinHmesiParam::dspin_set( flit,
                             1,
-                            DspinDhccpParam::MULTI_INVAL_IS_CONFIG);
-
-                    DspinDhccpParam::dspin_set( flit,
+                            DspinHmesiParam::MULTI_INVAL_IS_CONFIG);
+
+                    DspinHmesiParam::dspin_set( flit,
                             r_config_to_cc_send_trdid.read(),
-                            DspinDhccpParam::MULTI_INVAL_UPDT_INDEX);
-
-                    DspinDhccpParam::dspin_set( flit,
+                            DspinHmesiParam::MULTI_INVAL_UPDT_INDEX);
+
+                    DspinHmesiParam::dspin_set( flit,
                             multi_inval_type,
-                            DspinDhccpParam::M2P_TYPE);
+                            DspinHmesiParam::M2P_TYPE);
                     p_dspin_m2p.write = true;
                     p_dspin_m2p.data  = flit;
@@ -10859,7 +10522,7 @@
                 {
                     uint64_t flit = 0;
-                    DspinDhccpParam::dspin_set( flit,
+                    DspinHmesiParam::dspin_set( flit,
                             r_config_to_cc_send_nline.read(),
-                            DspinDhccpParam::MULTI_INVAL_NLINE);
+                            DspinHmesiParam::MULTI_INVAL_NLINE);
                     p_dspin_m2p.eop   = true;
                     p_dspin_m2p.write = true;
@@ -10870,35 +10533,31 @@
             case CC_SEND_XRAM_RSP_INVAL_HEADER:
                 {
-                    if(not m_xram_rsp_to_cc_send_inst_fifo.rok()) break;
+                    if (not m_xram_rsp_to_cc_send_inst_fifo.rok()) break;
 
                     uint8_t multi_inval_type;
-                    if(m_xram_rsp_to_cc_send_inst_fifo.read())
-                    {
-                        multi_inval_type = DspinDhccpParam::TYPE_MULTI_INVAL_INST;
+                    if (m_xram_rsp_to_cc_send_inst_fifo.read())
+                    {
+                        multi_inval_type = DspinHmesiParam::TYPE_MULTI_INVAL_INST;
                     }
                     else
                     {
-                        multi_inval_type = DspinDhccpParam::TYPE_MULTI_INVAL_DATA;
+                        multi_inval_type = DspinHmesiParam::TYPE_MULTI_INVAL_DATA;
                     }
 
                     uint64_t flit = 0;
                     uint64_t dest = m_xram_rsp_to_cc_send_srcid_fifo.read() <<
-                        (DspinDhccpParam::SRCID_WIDTH - vci_param_int::S);
-
-                    DspinDhccpParam::dspin_set( flit,
+                        (DspinHmesiParam::SRCID_WIDTH - vci_param_int::S);
+
+                    DspinHmesiParam::dspin_set( flit,
                             dest,
-                            DspinDhccpParam::MULTI_INVAL_DEST);
-
-                    DspinDhccpParam::dspin_set( flit,
-                            m_cc_global_id ,
-                            DspinDhccpParam::MULTI_INVAL_SRCID);
-
-                    DspinDhccpParam::dspin_set( flit,
+                            DspinHmesiParam::MULTI_INVAL_DEST);
+
+                    DspinHmesiParam::dspin_set( flit,
                             r_xram_rsp_to_cc_send_trdid.read(),
-                            DspinDhccpParam::MULTI_INVAL_UPDT_INDEX);
-
-                    DspinDhccpParam::dspin_set( flit,
+                            DspinHmesiParam::MULTI_INVAL_UPDT_INDEX);
+
+                    DspinHmesiParam::dspin_set( flit,
                             multi_inval_type,
-                            DspinDhccpParam::M2P_TYPE);
+                            DspinHmesiParam::M2P_TYPE);
                     p_dspin_m2p.write = true;
                     p_dspin_m2p.data  = flit;
@@ -10911,7 +10570,7 @@
                     uint64_t flit = 0;
 
-                    DspinDhccpParam::dspin_set( flit,
+                    DspinHmesiParam::dspin_set( flit,
                             r_xram_rsp_to_cc_send_nline.read(),
-                            DspinDhccpParam::MULTI_INVAL_NLINE);
+                            DspinHmesiParam::MULTI_INVAL_NLINE);
                     p_dspin_m2p.eop   = true;
                     p_dspin_m2p.write = true;
@@ -10925,19 +10584,15 @@
                     uint64_t flit = 0;
 
-                    DspinDhccpParam::dspin_set( flit,
+                    DspinHmesiParam::dspin_set( flit,
                             m_broadcast_boundaries,
-                            DspinDhccpParam::BROADCAST_BOX);
+                            DspinHmesiParam::BROADCAST_BOX);
                     // MODIFIED FOR CONFIG INVAL (solution 1 bit in flit multi_inval)
-                    DspinDhccpParam::dspin_set( flit,
+                    DspinHmesiParam::dspin_set( flit,
                             1,
-                            DspinDhccpParam::BRDCAST_IS_CONFIG);
-
-                    DspinDhccpParam::dspin_set( flit,
-                            m_cc_global_id,
-                            DspinDhccpParam::BROADCAST_SRCID);
-
-                    DspinDhccpParam::dspin_set( flit,
+                            DspinHmesiParam::BRDCAST_IS_CONFIG);
+
+                    DspinHmesiParam::dspin_set( flit,
                             1ULL,
-                            DspinDhccpParam::M2P_BC);
+                            DspinHmesiParam::M2P_BC);
                     p_dspin_m2p.write = true;
                     p_dspin_m2p.data  = flit;
@@ -10951,15 +10606,11 @@
                     uint64_t flit = 0;
 
-                    DspinDhccpParam::dspin_set( flit,
+                    DspinHmesiParam::dspin_set( flit,
                             m_broadcast_boundaries,
-                            DspinDhccpParam::BROADCAST_BOX);
-
-                    DspinDhccpParam::dspin_set( flit,
-                            m_cc_global_id,
-                            DspinDhccpParam::BROADCAST_SRCID);
-
-                    DspinDhccpParam::dspin_set( flit,
+                            DspinHmesiParam::BROADCAST_BOX);
+
+                    DspinHmesiParam::dspin_set( flit,
                             1ULL,
-                            DspinDhccpParam::M2P_BC);
+                            DspinHmesiParam::M2P_BC);
                     p_dspin_m2p.write = true;
                     p_dspin_m2p.data  = flit;
@@ -10971,15 +10622,15 @@
                     uint64_t flit = 0;
 
-                    DspinDhccpParam::dspin_set( flit,
+                    DspinHmesiParam::dspin_set( flit,
                              m_broadcast_boundaries,
-                             DspinDhccpParam::BROADCAST_BOX);
-
-                     DspinDhccpParam::dspin_set( flit,
+                             DspinHmesiParam::BROADCAST_BOX);
+
+                     DspinHmesiParam::dspin_set( flit,
                              r_read_to_cc_send_srcid.read(),    // send the srcid itself which demands the request getM
-                             DspinDhccpParam::BROADCAST_SRCID);
-
-                    DspinDhccpParam::dspin_set( flit,
+                             DspinHmesiParam::BROADCAST_SRCID);
+
+                    DspinHmesiParam::dspin_set( flit,
                             1ULL,
-                            DspinDhccpParam::M2P_BC);
+                            DspinHmesiParam::M2P_BC);
                     p_dspin_m2p.write = true;
                     p_dspin_m2p.data  = flit;
@@ -10990,7 +10641,7 @@
                 {
                     uint64_t flit = 0;
-                    DspinDhccpParam::dspin_set( flit,
+                    DspinHmesiParam::dspin_set( flit,
                             r_xram_rsp_to_cc_send_nline.read(),
-                            DspinDhccpParam::BROADCAST_NLINE);
+                            DspinHmesiParam::BROADCAST_NLINE);
                     p_dspin_m2p.write = true;
                     p_dspin_m2p.eop   = true;
@@ -11002,7 +10653,7 @@
                 {
                     uint64_t flit = 0;
-                    DspinDhccpParam::dspin_set( flit,
+                    DspinHmesiParam::dspin_set( flit,
                             r_config_to_cc_send_nline.read(),
-                            DspinDhccpParam::BROADCAST_NLINE);
+                            DspinHmesiParam::BROADCAST_NLINE);
                     p_dspin_m2p.write = true;
                     p_dspin_m2p.eop   = true;
@@ -11014,7 +10665,7 @@
                 {
                     uint64_t flit = 0;
-                    DspinDhccpParam::dspin_set( flit,
+                    DspinHmesiParam::dspin_set( flit,
                             r_read_to_cc_send_nline.read(),
-                            DspinDhccpParam::BROADCAST_NLINE);
+                            DspinHmesiParam::BROADCAST_NLINE);
                     p_dspin_m2p.write = true;
                     p_dspin_m2p.eop   = true;
@@ -11027,48 +10678,48 @@
                     uint64_t flit = 0;
 
-                    if(not m_read_to_cc_send_inst_fifo.rok()) break;
+                    if (not m_read_to_cc_send_inst_fifo.rok()) break;
                     uint8_t multi_inval_type;
 
                     uint64_t dest =
                         m_read_to_cc_send_srcid_fifo.read() <<
-                        (DspinDhccpParam::SRCID_WIDTH - vci_param_int::S);
+                        (DspinHmesiParam::SRCID_WIDTH - vci_param_int::S);
 
                     if (m_read_to_cc_send_inst_fifo.read())
                     {
-                        multi_inval_type = DspinDhccpParam::TYPE_MULTI_INVAL_INST;
+                        multi_inval_type = DspinHmesiParam::TYPE_MULTI_INVAL_INST;
                     }
                     else
                     {
-                        multi_inval_type = DspinDhccpParam::TYPE_MULTI_INVAL_DATA;
-                    }
-
-                    DspinDhccpParam::dspin_set(
+                        multi_inval_type = DspinHmesiParam::TYPE_MULTI_INVAL_DATA;
+                    }
+
+                    DspinHmesiParam::dspin_set(
                             flit,
                             dest,
-                            DspinDhccpParam::MULTI_INVAL_DEST);
-
-                    DspinDhccpParam::dspin_set(
+                            DspinHmesiParam::MULTI_INVAL_DEST);
+
+                    DspinHmesiParam::dspin_set(
                             flit,
                             r_read_to_cc_send_is_shared.read(),
-                            DspinDhccpParam::MULTI_INVAL_IS_SHARED);
-
-                    if(r_read_to_cc_send_type.read())
-                    {
-                        DspinDhccpParam::dspin_set(
+                            DspinHmesiParam::MULTI_INVAL_IS_SHARED);
+
+                    if (r_read_to_cc_send_type.read())
+                    {
+                        DspinHmesiParam::dspin_set(
                                 flit,
                                 multi_inval_type,
-                                DspinDhccpParam::M2P_TYPE);
+                                DspinHmesiParam::M2P_TYPE);
                     }
                     else 
                     {
-                        DspinDhccpParam::dspin_set(
+                        DspinHmesiParam::dspin_set(
                                 flit,
-                                DspinDhccpParam::TYPE_MULTI_UPDT_DATA,
-                                DspinDhccpParam::M2P_TYPE);
-
-                        DspinDhccpParam::dspin_set(
+                                DspinHmesiParam::TYPE_MULTI_UPDT_DATA,
+                                DspinHmesiParam::M2P_TYPE);
+
+                        DspinHmesiParam::dspin_set(
                                 flit,
                                 r_read_to_cc_send_ivt_index.read(),
-                                DspinDhccpParam::CC_UPDT_IVT_INDEX);
+                                DspinHmesiParam::CC_UPDT_IVT_INDEX);
 
                     }
@@ -11084,8 +10735,8 @@
                     uint64_t flit = 0;
 
-                    DspinDhccpParam::dspin_set(
+                    DspinHmesiParam::dspin_set(
                             flit,
                             r_read_to_cc_send_nline.read(),
-                            DspinDhccpParam::MULTI_INVAL_NLINE);
+                            DspinHmesiParam::MULTI_INVAL_NLINE);
 
 
@@ -11101,7 +10752,7 @@
                 {
                     uint64_t flit = 0;
-                    DspinDhccpParam::dspin_set( flit,
+                    DspinHmesiParam::dspin_set( flit,
                             r_write_to_cc_send_nline.read(),
-                            DspinDhccpParam::BROADCAST_NLINE);
+                            DspinHmesiParam::BROADCAST_NLINE);
                     p_dspin_m2p.write = true;
                     p_dspin_m2p.eop   = true;
@@ -11113,7 +10764,7 @@
                 {
                     uint64_t flit = 0;
-                    DspinDhccpParam::dspin_set( flit,
+                    DspinHmesiParam::dspin_set( flit,
                             r_cas_to_cc_send_nline.read(),
-                            DspinDhccpParam::BROADCAST_NLINE);
+                            DspinHmesiParam::BROADCAST_NLINE);
                     p_dspin_m2p.write = true;
                     p_dspin_m2p.eop   = true;
@@ -11124,14 +10775,14 @@
             case CC_SEND_WRITE_INVAL_HEADER:
                 {
-                    if(not m_write_to_cc_send_inst_fifo.rok()) break;
+                    if (not m_write_to_cc_send_inst_fifo.rok()) break;
 
                     uint8_t multi_inval_type;
-                    if(m_write_to_cc_send_inst_fifo.read())
-                    {
-                        multi_inval_type = DspinDhccpParam::TYPE_MULTI_INVAL_INST;
+                    if (m_write_to_cc_send_inst_fifo.read())
+                    {
+                        multi_inval_type = DspinHmesiParam::TYPE_MULTI_INVAL_INST;
                     }
                     else
                     {
-                        multi_inval_type = DspinDhccpParam::TYPE_MULTI_INVAL_DATA;
+                        multi_inval_type = DspinHmesiParam::TYPE_MULTI_INVAL_DATA;
                     }
 
@@ -11139,20 +10790,15 @@
                     uint64_t dest =
                         m_write_to_cc_send_srcid_fifo.read() <<
-                        (DspinDhccpParam::SRCID_WIDTH - vci_param_int::S);
-
-                    DspinDhccpParam::dspin_set(
+                        (DspinHmesiParam::SRCID_WIDTH - vci_param_int::S);
+
+                    DspinHmesiParam::dspin_set(
                             flit,
                             dest,
-                            DspinDhccpParam::MULTI_INVAL_DEST);
-
-                    DspinDhccpParam::dspin_set(
-                            flit,
-                            m_cc_global_id,
-                            DspinDhccpParam::MULTI_INVAL_SRCID);
-
-                    DspinDhccpParam::dspin_set(
+                            DspinHmesiParam::MULTI_INVAL_DEST);
+
+                    DspinHmesiParam::dspin_set(
                             flit,
                             multi_inval_type,
-                            DspinDhccpParam::M2P_TYPE);
+                            DspinHmesiParam::M2P_TYPE);
 
                     p_dspin_m2p.write = true;
@@ -11166,8 +10812,8 @@
                     uint64_t flit = 0;
 
-                    DspinDhccpParam::dspin_set(
+                    DspinHmesiParam::dspin_set(
                             flit,
                             r_write_to_cc_send_nline.read(),
-                            DspinDhccpParam::MULTI_UPDT_NLINE);
+                            DspinHmesiParam::MULTI_UPDT_NLINE);
 
                     p_dspin_m2p.write = true;
@@ -11184,11 +10830,11 @@
 
                     uint8_t multi_inval_type;
-                    if(m_cas_to_cc_send_inst_fifo.read())
-                    {
-                        multi_inval_type = DspinDhccpParam::TYPE_MULTI_INVAL_INST;
+                    if (m_cas_to_cc_send_inst_fifo.read())
+                    {
+                        multi_inval_type = DspinHmesiParam::TYPE_MULTI_INVAL_INST;
                     }
                     else
                     {
-                        multi_inval_type = DspinDhccpParam::TYPE_MULTI_INVAL_DATA;
+                        multi_inval_type = DspinHmesiParam::TYPE_MULTI_INVAL_DATA;
                     }
 
@@ -11196,20 +10842,15 @@
                     uint64_t dest =
                         m_cas_to_cc_send_srcid_fifo.read() <<
-                        (DspinDhccpParam::SRCID_WIDTH - vci_param_int::S);
-
-                    DspinDhccpParam::dspin_set(
+                        (DspinHmesiParam::SRCID_WIDTH - vci_param_int::S);
+
+                    DspinHmesiParam::dspin_set(
                             flit,
                             dest,
-                            DspinDhccpParam::MULTI_UPDT_DEST);
-
-                    DspinDhccpParam::dspin_set(
-                            flit,
-                            m_cc_global_id,
-                            DspinDhccpParam::MULTI_UPDT_SRCID);
-
-                    DspinDhccpParam::dspin_set(
+                            DspinHmesiParam::MULTI_UPDT_DEST);
+
+                    DspinHmesiParam::dspin_set(
                             flit,
                             multi_inval_type,
-                            DspinDhccpParam::M2P_TYPE);
+                            DspinHmesiParam::M2P_TYPE);
 
                     p_dspin_m2p.write = true;
@@ -11223,8 +10864,8 @@
                     uint64_t flit = 0;
 
-                    DspinDhccpParam::dspin_set(
+                    DspinHmesiParam::dspin_set(
                             flit,
                             r_cas_to_cc_send_nline.read(),
-                            DspinDhccpParam::MULTI_UPDT_NLINE);
+                            DspinHmesiParam::MULTI_UPDT_NLINE);
 
                     p_dspin_m2p.write = true;
@@ -11240,39 +10881,39 @@
         ////////////////////////////////////////////////////////////////////
 
-        if ( r_cleanup_fsm.read() == CLEANUP_SEND_CLACK )
+        if (r_cleanup_fsm.read() == CLEANUP_SEND_CLACK)
         {
             uint8_t cleanup_ack_type;
-            if(r_cleanup_inst.read())
+            if (r_cleanup_inst.read())
             {
-                cleanup_ack_type = DspinDhccpParam::TYPE_CLACK_INST;
+                cleanup_ack_type = DspinHmesiParam::TYPE_CLACK_INST;
             }
             else
             {
-                cleanup_ack_type = DspinDhccpParam::TYPE_CLACK_DATA;
+                cleanup_ack_type = DspinHmesiParam::TYPE_CLACK_DATA;
             }
 
             uint64_t flit = 0;
             uint64_t dest = r_cleanup_srcid.read() <<
-                (DspinDhccpParam::SRCID_WIDTH - vci_param_int::S);
-
-            DspinDhccpParam::dspin_set(
+                (DspinHmesiParam::SRCID_WIDTH - vci_param_int::S);
+
+            DspinHmesiParam::dspin_set(
                     flit,
                     dest,
-                    DspinDhccpParam::CLACK_DEST);
-
-            DspinDhccpParam::dspin_set(
+                    DspinHmesiParam::CLACK_DEST);
+
+            DspinHmesiParam::dspin_set(
                     flit,
                     r_cleanup_nline.read() & 0xFFFF,
-                    DspinDhccpParam::CLACK_SET);
-
-            DspinDhccpParam::dspin_set(
+                    DspinHmesiParam::CLACK_SET);
+
+            DspinHmesiParam::dspin_set(
                     flit,
                     r_cleanup_way_index.read(),
-                    DspinDhccpParam::CLACK_WAY);
-
-            DspinDhccpParam::dspin_set(
+                    DspinHmesiParam::CLACK_WAY);
+
+            DspinHmesiParam::dspin_set(
                     flit,
                     cleanup_ack_type,
-                    DspinDhccpParam::CLACK_TYPE);
+                    DspinHmesiParam::CLACK_TYPE);
 
             p_dspin_clack.eop   = true;
