- Timestamp:
- Sep 30, 2014, 3:32:13 PM (10 years ago)
- File:
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- 1 edited
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branches/RWT/modules/vci_mem_cache/caba/source/include/xram_transaction.h
r814 r823 15 15 class TransactionTabEntry 16 16 { 17 typedef sc_dt::sc_uint<64> 18 typedef sc_dt::sc_uint<40> 19 typedef uint32_t 20 typedef uint32_t 17 typedef sc_dt::sc_uint<64> wide_data_t; 18 typedef sc_dt::sc_uint<40> addr_t; 19 typedef uint32_t data_t; 20 typedef uint32_t be_t; 21 21 22 22 public: … … 154 154 class TransactionTab 155 155 { 156 typedef sc_dt::sc_uint<64> 157 typedef sc_dt::sc_uint<40> 158 typedef uint32_t 159 typedef uint32_t 156 typedef sc_dt::sc_uint<64> wide_data_t; 157 typedef sc_dt::sc_uint<40> addr_t; 158 typedef uint32_t data_t; 159 typedef uint32_t be_t; 160 160 161 161 private: 162 const std::string tab_name; 163 size_t size_tab; 162 const std::string tab_name; // the name for logs 163 size_t size_tab; // the size of the tab 164 164 165 165 data_t be_to_mask(be_t be) 166 166 { 167 167 data_t ret = 0; 168 if ( be&0x1) {168 if (be & 0x1) { 169 169 ret = ret | 0x000000FF; 170 170 } 171 if ( be&0x2) {171 if (be & 0x2) { 172 172 ret = ret | 0x0000FF00; 173 173 } 174 if ( be&0x4) {174 if (be & 0x4) { 175 175 ret = ret | 0x00FF0000; 176 176 } 177 if ( be&0x8) {177 if (be & 0x8) { 178 178 ret = ret | 0xFF000000; 179 179 } … … 189 189 TransactionTab() 190 190 { 191 size_tab =0;192 tab =NULL;191 size_tab = 0; 192 tab = NULL; 193 193 } 194 194 … … 196 196 size_t n_entries, 197 197 size_t n_words ) 198 : tab_name( name),199 size_tab( n_entries)198 : tab_name(name), 199 size_tab(n_entries) 200 200 { 201 201 tab = new TransactionTabEntry[size_tab]; 202 for ( size_t i=0; i<size_tab; i++)202 for (size_t i = 0; i < size_tab; i++) 203 203 { 204 204 tab[i].alloc(n_words); … … 222 222 void init() 223 223 { 224 for ( size_t i=0; i<size_tab; i++)224 for (size_t i = 0; i < size_tab; i++) 225 225 { 226 226 tab[i].init(); … … 234 234 void print(const size_t index) 235 235 { 236 assert( 236 assert((index < size_tab) and 237 237 "MEMC ERROR: The selected entry is out of range in TRT write_data_mask()"); 238 238 … … 247 247 TransactionTabEntry read(const size_t index) 248 248 { 249 assert( 249 assert((index < size_tab) and 250 250 "MEMC ERROR: Invalid Transaction Tab Entry"); 251 251 … … 260 260 bool full(size_t &index) 261 261 { 262 for (size_t i=0; i<size_tab; i++)263 { 264 if (!tab[i].valid)262 for (size_t i = 0; i < size_tab; i++) 263 { 264 if (!tab[i].valid) 265 265 { 266 index =i;266 index = i; 267 267 return false; 268 268 } … … 278 278 // The function returns true if a read request has already been sent 279 279 ////////////////////////////////////////////////////////////////////// 280 bool hit_read(const addr_t nline, size_t &index)281 { 282 for (size_t i=0; i<size_tab; i++)283 { 284 if ((tab[i].valid && (nline==tab[i].nline)) && (tab[i].xram_read))280 bool hit_read(const addr_t nline, size_t &index) 281 { 282 for (size_t i = 0; i < size_tab; i++) 283 { 284 if ((tab[i].valid && (nline == tab[i].nline)) && (tab[i].xram_read)) 285 285 { 286 index =i;286 index = i; 287 287 return true; 288 288 } … … 299 299 bool hit_write(const addr_t nline) 300 300 { 301 for (size_t i=0; i<size_tab; i++)302 { 303 if(tab[i].valid && (nline ==tab[i].nline) && !(tab[i].xram_read))301 for (size_t i = 0; i < size_tab; i++) 302 { 303 if(tab[i].valid && (nline == tab[i].nline) && !(tab[i].xram_read)) 304 304 { 305 305 return true; … … 319 319 bool hit_write(const addr_t nline, size_t* index) 320 320 { 321 for (size_t i=0; i<size_tab; i++){322 if (tab[i].valid && (nline==tab[i].nline) && !(tab[i].xram_read)) {321 for (size_t i = 0; i < size_tab; i++){ 322 if (tab[i].valid && (nline == tab[i].nline) && !(tab[i].xram_read)) { 323 323 *index = i; 324 324 return true; … … 337 337 ///////////////////////////////////////////////////////////////////// 338 338 void write_data_mask(const size_t index, 339 const std::vector<be_t> &be,340 const std::vector<data_t> &data)341 { 342 assert( 339 const std::vector<be_t> &be, 340 const std::vector<data_t> &data) 341 { 342 assert((index < size_tab) and 343 343 "MEMC ERROR: The selected entry is out of range in TRT write_data_mask()"); 344 344 345 assert( (be.size()==tab[index].wdata_be.size()) and345 assert((be.size() == tab[index].wdata_be.size()) and 346 346 "MEMC ERROR: Bad be size in TRT write_data_mask()"); 347 347 348 assert( (data.size()==tab[index].wdata.size()) and348 assert((data.size() == tab[index].wdata.size()) and 349 349 "MEMC ERROR: Bad data size in TRT write_data_mask()"); 350 350 351 for (size_t i=0; i<tab[index].wdata_be.size(); i++)351 for (size_t i = 0; i < tab[index].wdata_be.size(); i++) 352 352 { 353 353 tab[index].wdata_be[i] = tab[index].wdata_be[i] | be[i]; … … 375 375 ///////////////////////////////////////////////////////////////////// 376 376 void set(const size_t index, 377 const bool xram_read,378 const addr_t nline,379 const size_t srcid,380 const size_t trdid,381 const size_t pktid,382 const bool proc_read,383 const size_t read_length,384 const size_t word_index,385 const std::vector<be_t> &data_be,386 const std::vector<data_t> &data,387 const data_t ll_key = 0,388 const bool config = false)389 { 390 assert( 377 const bool xram_read, 378 const addr_t nline, 379 const size_t srcid, 380 const size_t trdid, 381 const size_t pktid, 382 const bool proc_read, 383 const size_t read_length, 384 const size_t word_index, 385 const std::vector<be_t> &data_be, 386 const std::vector<data_t> &data, 387 const data_t ll_key = 0, 388 const bool config = false) 389 { 390 assert((index < size_tab) and 391 391 "MEMC ERROR: The selected entry is out of range in TRT set()"); 392 392 393 assert( (data_be.size()==tab[index].wdata_be.size()) and393 assert((data_be.size() == tab[index].wdata_be.size()) and 394 394 "MEMC ERROR: Bad data_be argument in TRT set()"); 395 395 396 assert( (data.size()==tab[index].wdata.size()) and396 assert((data.size() == tab[index].wdata.size()) and 397 397 "MEMC ERROR: Bad data argument in TRT set()"); 398 398 … … 408 408 tab[index].ll_key = ll_key; 409 409 tab[index].config = config; 410 for (size_t i=0; i<tab[index].wdata.size(); i++)411 { 412 tab[index].wdata_be[i] 413 tab[index].wdata[i] 410 for (size_t i = 0; i < tab[index].wdata.size(); i++) 411 { 412 tab[index].wdata_be[i] = data_be[i]; 413 tab[index].wdata[i] = data[i]; 414 414 } 415 415 } … … 429 429 const bool rerror) 430 430 { 431 data_t 432 data_t 433 434 assert( 431 data_t value; 432 data_t mask; 433 434 assert((index < size_tab) and 435 435 "MEMC ERROR: The selected entry is out of range in TRT write_rsp()"); 436 436 437 assert( 437 assert((word < tab[index].wdata_be.size()) and 438 438 "MEMC ERROR: Bad word index in TRT write_rsp()"); 439 439 440 assert( 440 assert((tab[index].valid) and 441 441 "MEMC ERROR: TRT entry not valid in TRT write_rsp()"); 442 442 443 assert( 443 assert((tab[index].xram_read ) and 444 444 "MEMC ERROR: TRT entry is not a GET in TRT write_rsp()"); 445 445 446 if ( rerror)446 if (rerror) 447 447 { 448 448 tab[index].rerror = true; … … 456 456 457 457 // second 32 bits word 458 value = (data_t)(data >>32);459 mask = be_to_mask(tab[index].wdata_be[word +1]);460 tab[index].wdata[word +1] = (tab[index].wdata[word+1] & mask) | (value & ~mask);458 value = (data_t)(data >> 32); 459 mask = be_to_mask(tab[index].wdata_be[word + 1]); 460 tab[index].wdata[word + 1] = (tab[index].wdata[word + 1] & mask) | (value & ~mask); 461 461 } 462 462 ///////////////////////////////////////////////////////////////////// … … 467 467 void erase(const size_t index) 468 468 { 469 assert( 469 assert((index < size_tab) and 470 470 "MEMC ERROR: The selected entry is out of range in TRT erase()"); 471 471 … … 480 480 bool is_config(const size_t index) 481 481 { 482 assert( 482 assert((index < size_tab) and 483 483 "MEMC ERROR: The selected entry is out of range in TRT is_config()"); 484 484
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