Index: trunk/platforms/tsar_generic_leti/arch.py
===================================================================
--- trunk/platforms/tsar_generic_leti/arch.py	(revision 870)
+++ trunk/platforms/tsar_generic_leti/arch.py	(revision 937)
@@ -11,48 +11,53 @@
 #  This file contains a mapping generator for the "tsar_generic_leti" platform.
 #  This includes both the hardware architecture (clusters, processors,
-#  peripherals, physical space segmentation) and the mapping of all kernel
-#  objects (global vsegs).
-#
-#  The "constructor" parameters are:
-#  - x_size         : number of clusters in a row
-#  - y_size         : number of clusters in a column
-#  - nb_procs       : number of processors per cluster
+#  peripherals, physical space segmentation) and the mapping of all boot 
+#  and kernel objects (global vsegs).
+#
+#  The x_size & y_size parameters define the total number of clusters.
+#  The upper row (y = y_size-1) does not contain processors or memory.
+#
+#  It does not use the IOB component:
+#  The external peripherals are located in cluster[x_size-1][y_size-1].
+#
+#  It does not use an external ROM, as the preloader code is (pre)loaded
+#  at address 0x0, in the physical memory of cluster[0][0].
+#
+#  It can use an - optional - RAMDISK located in cluster[0][0].
+#
+#  The others hardware parameters are:
 #  - fbf_width      : frame_buffer width = frame_buffer heigth
-#
-#  The "hidden" parameters (defined below) are:
 #  - nb_ttys        : number of TTY channels
 #  - nb_nics        : number of NIC channels
-#  - x_io           : cluster_io x coordinate
-#  - y_io           : cluster_io y coordinate
-#  - x_width        : number of bits for x coordinate
-#  - y_width        : number of bits for y coordinate
-#  - paddr_width    : number of bits for physical address
+#  - nb_cmas        : number of CMA channels
 #  - irq_per_proc   : number of input IRQs per processor
-#  - use_ramdisk    : use a ramdisk when True
+#  - use_ramdisk    : use a RAMDISK when True
 #  - peri_increment : address increment for replicated peripherals
 #
-# Regarding physical memory allocation, there is one allocator per cluster:
-# - We use only one big physical page (2 Mbytes) for the five boot vsegs,
-#   allocated in cluster[0,0], identity mapping.
-# - We use one big page per cluster for the kernel vsegs.
-#   The kernel_code, kernel_init and kernel_ptab can be replicated in all clusters.
-#   The kernel_data and kernel_uncdata shared vsegs are only mapped in cluster[0,0].
-# - We use 8 small physical pages (4 Kbytes) per cluster for the schedulers.
-# - We use one big page for each external peripheral in IO cluster,
-# - We use one small page per cluster for each internal peripheral.
-###################################################################################
+#  Regarding the boot and kernel vsegs mapping :
+#  - We use one big physical page (2 Mbytes) for the preloader and the four
+#    boot vsegs, all allocated in cluster[0,0].
+#  - We use the 16 next big pages in cluster[0][0] to implement the RAMDISK.
+#  - We use one big page per cluster for the replicated kernel code vsegs.
+#  - We use one big page in cluster[0][0] for the kernel data vseg.
+#  - We use one big page per cluster for the distributed kernel heap vsegs.
+#  - We use one big page per cluster for the distributed ptab vsegs.
+#  - We use small physical pages (4 Kbytes) per cluster for the schedulers.
+#  - We use one big page for each external peripheral in IO cluster,
+#  - We use one small page per cluster for each internal peripheral.
+###############################################################################
 
 ########################
 def arch( x_size    = 2,
           y_size    = 2,
-          nb_procs  = 2,
+          nb_procs  = 4,
+          nb_ttys   = 1,
           fbf_width = 128 ):
 
     ### define architecture constants
 
-    nb_ttys         = 1
-    nb_nics         = 2
-    x_io            = 0
-    y_io            = 0
+    nb_nics         = 1
+    nb_cmas         = 2
+    x_io            = x_size - 1
+    y_io            = y_size - 1
     x_width         = 4
     y_width         = 4
@@ -60,9 +65,7 @@
     paddr_width     = 40
     irq_per_proc    = 4
-    use_ramdisk     = True
-    peri_increment  = 0x10000    # distributed peripherals vbase address increment
-    sched_increment = 0x10000    # distributed schedulers vbase address increment
-    ptab_increment  = 0x200000   # distributed page tables vbase address increment
-    reset_address   = 0x00000000
+    use_ramdisk     = False
+    peri_increment  = 0x10000     # distributed peripherals vbase increment
+    reset_address   = 0x00000000  # wired preloader pbase address
 
     ### parameters checking
@@ -70,25 +73,23 @@
     assert( nb_procs <= (1 << p_width) )
 
-    assert( (x_size >= 1) and (x_size <= 16) )
-
-    assert( (y_size >= 1) and (y_size <= 16) )
-
-    assert( nb_ttys == 1 )
-
-    assert( ((x_io == 0) and (y_io == 0)) or
-            ((x_io == x_size-1) and (y_io == y_size-1)) )
-
-    platform_name  = 'tsar_leti_%d_%d_%d' % ( x_size, y_size, nb_procs )
-
-    ### define physical segments
-    ### These segments are replicated in all clusters
-
-    ram_base = 0x0000000000
+    assert( x_size <= (1 << x_width) )
+
+    assert( y_size <= (1 << y_width) )
+
+    ### define type and name 
+
+    platform_type  = 'tsar_leti'
+    platform_name  = '%s_%d_%d_%d' % (platform_type, x_size, y_size, nb_procs )
+
+    ### define physical segments replicated in all clusters
+    ### the base address is extended by the cluster_xy (8 bits)
+
+    ram_base = 0x00000000
     ram_size = 0x4000000                   # 64 Mbytes
 
-    xcu_base = 0x00F0000000
+    xcu_base = 0xF0000000
     xcu_size = 0x1000                      # 4 Kbytes
 
-    mmc_base = 0x00E0000000
+    mmc_base = 0xF1000000
     mmc_size = 0x1000                      # 4 Kbytes
 
@@ -96,26 +97,24 @@
     ## These segments are only defined in cluster_io
 
-    offset_io = ((x_io << y_width) + y_io) << (paddr_width - x_width - y_width)
-
-    bdv_base  = 0x00F2000000 + offset_io
+    cluster_xy = ((x_io << y_width) + y_io) << (paddr_width - x_width - y_width)
+
+    bdv_base  = 0xF2000000 + cluster_xy
     bdv_size  = 0x1000                     # 4kbytes
 
-    tty_base  = 0x00F4000000 + offset_io
+    tty_base  = 0xF4000000 + cluster_xy
     tty_size  = 0x4000                     # 16 Kbytes
 
-    nic_base  = 0x00F7000000 + offset_io
+    nic_base  = 0xF7000000 + cluster_xy
     nic_size  = 0x80000                    # 512 kbytes
 
-    cma_base  = 0x00F8000000 + offset_io
+    cma_base  = 0xF8000000 + cluster_xy
     cma_size  = 0x1000 * 2 * nb_nics       # 4 kbytes * 2 * nb_nics
 
-    fbf_base  = 0x00F3000000 + offset_io
+    pic_base  = 0xF9000000 + cluster_xy
+    pic_size  = 0x1000                     # 4 Kbytes
+
+    fbf_base  = 0xF3000000 + cluster_xy
     fbf_size  = fbf_width * fbf_width      # fbf_width * fbf_width bytes
 
-    pic_base  = 0x00F9000000 + offset_io
-    pic_size  = 0x1000                     # 4 Kbytes
-
-    rdk_base  = 0x02000000
-    rdk_size  = 0x02000000                 # 32 Mbytes
 
     ### define preloader & bootloader vsegs base addresses and sizes
@@ -133,39 +132,45 @@
 
     boot_data_vbase      = 0x000D0000      # ident
-    boot_data_size       = 0x00080000      # 512 Kbytes
-
-    boot_stack_vbase     = 0x00150000      # ident
-    boot_stack_size      = 0x00050000      # 320 Kbytes
+    boot_data_size       = 0x000C0000      # 768 Kbytes
+
+    boot_stack_vbase     = 0x00190000      # ident
+    boot_stack_size      = 0x00070000      # 448 Kbytes
+
+    ### define ramdisk vseg / must be identity mapping in cluster[0][0]
+    ### occupies 15 BPP after the boot  
+    ramdisk_vbase        = 0x00200000
+    ramdisk_size         = 0x02000000      # 32 Mbytes
 
     ### define kernel vsegs base addresses and sizes
-    ### code, init, ptab & sched vsegs are replicated in all clusters.
+    ### code, init, ptab, heap & sched vsegs are replicated in all clusters.
     ### data & uncdata vsegs are only mapped in cluster[0][0].
-    ### - We pack code, init, data vsegs in the same BIG page.
-    ### - We use another BIG page for the ptab vseg.
-    ### - We use 2*nb_procs SMALL pages for the sched vseg.
-    ### - we use one SMALL page for uncdata
-    ### => kernel cost is 2 BPPs and (2*n + 1) SPPs per cluster.
 
     kernel_code_vbase    = 0x80000000
-    kernel_code_size     = 0x00080000      # 512 Kbytes per cluster
-
-    kernel_init_vbase    = 0x80080000
-    kernel_init_size     = 0x00080000      # 512 Kbytes per cluster
-
-    kernel_data_vbase    = 0x80100000
-    kernel_data_size     = 0x00100000      # 1 Mbytes in cluster[0][0]
-
-    kernel_uncdata_vbase = 0x80200000
-    kernel_uncdata_size  = 0x00001000      # 4 Kbytes
-
-    kernel_sched_vbase   = 0x80400000            # distributed in all clusters
-    kernel_sched_size    = 0x00002000 * nb_procs # 8 kbytes per processor
-
-    kernel_ptab_vbase    = 0xC0000000
+    kernel_code_size     = 0x00100000      # 1 Mbytes per cluster
+
+    kernel_init_vbase    = 0x80100000
+    kernel_init_size     = 0x00100000      # 1 Mbytes per cluster
+
+    kernel_data_vbase    = 0x90000000
+    kernel_data_size     = 0x00200000      # 2 Mbytes in cluster[0][0]
+
+    kernel_uncdata_vbase = 0x90200000
+    kernel_uncdata_size  = 0x00001000      # 4 Kbytes in cluster[0][0]
+
+    kernel_ptab_vbase    = 0xE0000000
     kernel_ptab_size     = 0x00200000      # 2 Mbytes per cluster
 
+    kernel_heap_vbase    = 0xD0000000
+    kernel_heap_size     = 0x00200000      # 2 Mbytes per cluster
+
+    kernel_sched_vbase   = 0xA0000000
+    kernel_sched_size    = 0x00002000 * nb_procs # 8 kbytes per proc per cluster
+
+    #####################
     ### create mapping
+    #####################
 
     mapping = Mapping( name           = platform_name,
+                       p_type         = platform_type,
                        x_size         = x_size,
                        y_size         = y_size,
@@ -185,44 +190,7 @@
                        ram_size       = ram_size )
 
-    ###  external peripherals (accessible in cluster[0,0] only for this mapping)
-
-    bdv = mapping.addPeriph( 'BDV', base = bdv_base, size = bdv_size, ptype = 'IOC', subtype = 'BDV' )
-
-    tty = mapping.addPeriph( 'TTY', base = tty_base, size = tty_size, ptype = 'TTY', channels = nb_ttys )
-
-    if x_io != 0 or y_io != 0:
-        nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, ptype = 'NIC', channels = nb_nics )
-        cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size, ptype = 'CMA', channels = 2*nb_nics )
-        fbf = mapping.addPeriph( 'FBF', base = fbf_base, size = fbf_size, ptype = 'FBF', arg = fbf_width )
-        pic = mapping.addPeriph( 'PIC', base = pic_base, size = pic_size, ptype = 'PIC', channels = 32 )
-
-        mapping.addIrq( pic, index = 0 , isrtype = 'ISR_NIC_RX', channel = 0 )
-        mapping.addIrq( pic, index = 1 , isrtype = 'ISR_NIC_RX', channel = 1 )
-        mapping.addIrq( pic, index = 2 , isrtype = 'ISR_NIC_TX', channel = 0 )
-        mapping.addIrq( pic, index = 3 , isrtype = 'ISR_NIC_TX', channel = 1 )
-        mapping.addIrq( pic, index = 4 , isrtype = 'ISR_CMA'   , channel = 0 )
-        mapping.addIrq( pic, index = 5 , isrtype = 'ISR_CMA'   , channel = 1 )
-        mapping.addIrq( pic, index = 6 , isrtype = 'ISR_CMA'   , channel = 2 )
-        mapping.addIrq( pic, index = 7 , isrtype = 'ISR_CMA'   , channel = 3 )
-        mapping.addIrq( pic, index = 8 , isrtype = 'ISR_BDV'   , channel = 0 )
-        mapping.addIrq( pic, index = 16, isrtype = 'ISR_TTY_RX', channel = 0 )
-
-        mapping.addGlobal( 'seg_nic', nic_base, nic_size, '__W_',
-                           vtype = 'PERI', x = 0, y = 0, pseg = 'NIC',
-                           local = False, big = True )
-
-        mapping.addGlobal( 'seg_cma', cma_base, cma_size, '__W_',
-                           vtype = 'PERI', x = 0, y = 0, pseg = 'CMA',
-                           local = False, big = True )
-
-        mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, '__W_',
-                           vtype = 'PERI', x = 0, y = 0, pseg = 'FBF',
-                           local = False, big = True )
-
-        mapping.addGlobal( 'seg_pic', pic_base, pic_size, '__W_',
-                           vtype = 'PERI', x = 0, y = 0, pseg = 'PIC',
-                           local = False, big = True )
-
-    ### hardware components replicated in all clusters
+    ###########################
+    ### Hardware Description
+    ###########################
 
     for x in xrange( x_size ):
@@ -230,26 +198,71 @@
             cluster_xy = (x << y_width) + y;
             offset     = cluster_xy << (paddr_width - x_width - y_width)
-
-            ram = mapping.addRam( 'RAM', base = ram_base + offset, size = ram_size )
-
-            mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, size = mmc_size,
-                                     ptype = 'MMC' )
-
-            xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, size = xcu_size,
-                                     ptype = 'XCU', channels = nb_procs * irq_per_proc, arg = 16 )
-
-            # IRQs replicated in all clusters
-            mapping.addIrq( xcu, index = 8, isrtype = 'ISR_MMC' )
-
-            # IRQ in IO cluster (0,0)
-            if x == 0 and y == 0:
-                mapping.addIrq( xcu, index = 9 , isrtype = 'ISR_BDV'    )
-                mapping.addIrq( xcu, index = 10, isrtype = 'ISR_TTY_RX' )
-
-            # processors
-            for p in xrange ( nb_procs ):
-                mapping.addProc( x, y, p )
-
-    ### global vsegs for preloader & boot_loader
+ 
+            ### components replicated in all clusters but the upper row
+            if ( y < (y_size - 1) ):
+
+                ram = mapping.addRam( 'RAM', base = ram_base + offset, 
+                                      size = ram_size )
+
+                mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, 
+                                         size = mmc_size, ptype = 'MMC' )
+
+                xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, 
+                                         size = xcu_size, ptype = 'XCU', 
+                                         channels = nb_procs * irq_per_proc, arg = 16 )
+
+                mapping.addIrq( xcu, index = 8, isrtype = 'ISR_MMC' )
+
+                for p in xrange ( nb_procs ):
+                    mapping.addProc( x, y, p )
+
+            ###  external peripherals in cluster_io 
+            if ( (x==x_io) and (y==y_io) ):
+
+                bdv = mapping.addPeriph( 'BDV', base = bdv_base, size = bdv_size, 
+                                         ptype = 'IOC', subtype = 'BDV' )
+
+                tty = mapping.addPeriph( 'TTY', base = tty_base, size = tty_size, 
+                                         ptype = 'TTY', channels = nb_ttys )
+
+                nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, 
+                                         ptype = 'NIC', channels = nb_nics )
+
+                cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size, 
+                                         ptype = 'CMA', channels = nb_cmas )
+
+                fbf = mapping.addPeriph( 'FBF', base = fbf_base, size = fbf_size, 
+                                         ptype = 'FBF', arg = fbf_width )
+
+                pic = mapping.addPeriph( 'PIC', base = pic_base, size = pic_size, 
+                                         ptype = 'PIC', channels = 32 )
+
+                mapping.addIrq( pic, index = 0 , isrtype = 'ISR_NIC_RX', channel = 0 )
+                mapping.addIrq( pic, index = 1 , isrtype = 'ISR_NIC_RX', channel = 1 )
+
+                mapping.addIrq( pic, index = 2 , isrtype = 'ISR_NIC_TX', channel = 0 )
+                mapping.addIrq( pic, index = 3 , isrtype = 'ISR_NIC_TX', channel = 1 )
+
+                mapping.addIrq( pic, index = 4 , isrtype = 'ISR_CMA'   , channel = 0 )
+                mapping.addIrq( pic, index = 5 , isrtype = 'ISR_CMA'   , channel = 1 )
+                mapping.addIrq( pic, index = 6 , isrtype = 'ISR_CMA'   , channel = 2 )
+                mapping.addIrq( pic, index = 7 , isrtype = 'ISR_CMA'   , channel = 3 )
+
+                mapping.addIrq( pic, index = 8 , isrtype = 'ISR_BDV'   , channel = 0 )
+
+                mapping.addIrq( pic, index = 16, isrtype = 'ISR_TTY_RX', channel = 0 )
+                mapping.addIrq( pic, index = 17, isrtype = 'ISR_TTY_RX', channel = 1 )
+                mapping.addIrq( pic, index = 18, isrtype = 'ISR_TTY_RX', channel = 2 )
+                mapping.addIrq( pic, index = 19, isrtype = 'ISR_TTY_RX', channel = 3 )
+                mapping.addIrq( pic, index = 20, isrtype = 'ISR_TTY_RX', channel = 4 )
+                mapping.addIrq( pic, index = 21, isrtype = 'ISR_TTY_RX', channel = 5 )
+                mapping.addIrq( pic, index = 22, isrtype = 'ISR_TTY_RX', channel = 6 )
+                mapping.addIrq( pic, index = 23, isrtype = 'ISR_TTY_RX', channel = 7 )
+
+    ###################################
+    ### boot & kernel vsegs mapping
+    ###################################
+
+    ### global vsegs for preloader & boot_loader are mapped in cluster[0][0]
     ### we want to pack those 5 vsegs in the same big page
     ### => same flags CXW_ / identity mapping / non local / big page
@@ -275,14 +288,26 @@
                        identity = True, local = False, big = True )
 
+    ### global vseg for RAM-DISK in cluster[0][0]
+    ### identity mapping / non local / big pages
+    if use_ramdisk:
+
+        mapping.addGlobal( 'seg_ramdisk', ramdisk_vbase, ramdisk_size,
+                           'C_W_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
+                           identity = True, local = True, big = True )
+
     ### global vsegs kernel_code, kernel_init : local / big page
-    ### replicated in all clusters with the same name (same vbase)
-    for x in xrange( x_size ):
-        for y in xrange( y_size ):
-            mapping.addGlobal( 'seg_kernel_code', kernel_code_vbase, kernel_code_size,
+    ### replicated in all clusters containing processors
+    ### same content => same name / same vbase
+    for x in xrange( x_size ):
+        for y in xrange( y_size - 1 ):
+
+            mapping.addGlobal( 'seg_kernel_code', 
+                               kernel_code_vbase, kernel_code_size,
                                'CXW_', vtype = 'ELF', x = x, y = y, pseg = 'RAM',
                                binpath = 'build/kernel/kernel.elf',
                                local = True, big = True )
 
-            mapping.addGlobal( 'seg_kernel_init', kernel_init_vbase, kernel_init_size,
+            mapping.addGlobal( 'seg_kernel_init', 
+                               kernel_init_vbase, kernel_init_size,
                                'CXW_', vtype = 'ELF', x = x, y = y, pseg = 'RAM',
                                binpath = 'build/kernel/kernel.elf',
@@ -291,71 +316,106 @@
     ### global vseg kernel_data: non local / big page
     ### Only mapped in cluster[0][0]
-    mapping.addGlobal( 'seg_kernel_data', kernel_data_vbase, kernel_data_size,
-                       'CXW_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM',
-                       binpath = 'build/kernel/kernel.elf',
+    mapping.addGlobal( 'seg_kernel_data', 
+                       kernel_data_vbase, kernel_data_size,
+                       'C_W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM',
+                       binpath = 'build/kernel/kernel.elf', 
                        local = False, big = True )
 
     ### global vseg kernel_uncdata: non local / small page
     ### Only mapped in cluster[0][0]
-    mapping.addGlobal( 'seg_kernel_uncdata', kernel_uncdata_vbase, kernel_uncdata_size,
+    mapping.addGlobal( 'seg_kernel_uncdata', 
+                        kernel_uncdata_vbase, kernel_uncdata_size,
                        '__W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM',
-                       binpath = 'build/kernel/kernel.elf',
+                       binpath = 'build/kernel/kernel.elf', 
                        local = False, big = False )
 
-    for x in xrange( x_size ):
-        for y in xrange( y_size ):
-            cluster_xy = (x << y_width) + y;
-
-            ### Global vsegs kernel_ptab_x_y: non local / big pages
-            ### replicated in all clusters with name indexed by (x,y)
-            ### as vbase address is incremented by (cluster_xy * vseg_increment)
-            offset = cluster_xy * ptab_increment
-            mapping.addGlobal( 'seg_kernel_ptab_%d_%d' %(x,y), kernel_ptab_vbase + offset, kernel_ptab_size,
+    ### Global vsegs kernel_ptab_x_y: non local / big page
+    ### replicated in all clusters containing processors
+    ### different content => name & vbase indexed by (x,y)
+    for x in xrange( x_size ):
+        for y in xrange( y_size - 1 ):
+            offset = ((x << y_width) + y) * kernel_ptab_size
+
+            mapping.addGlobal( 'seg_kernel_ptab_%d_%d' %(x,y), 
+                               kernel_ptab_vbase + offset, kernel_ptab_size,
                                'CXW_', vtype = 'PTAB', x = x, y = y, pseg = 'RAM',
                                local = False, big = True )
 
-            ### global vsegs kernel_sched : non local / small pages
-            ### allocated in all clusters with name indexed by (x,y)
-            ### as vbase address is incremented by (cluster_xy * vseg_increment)
-            offset = cluster_xy * sched_increment
-            mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y), kernel_sched_vbase + offset, kernel_sched_size,
+    ### global vsegs kernel_sched : non local / small pages
+    ### allocated in all clusters containing processors
+    ### different content => name & vbase indexed by (x,y)
+    for x in xrange( x_size ):
+        for y in xrange( y_size - 1 ):
+            offset = ((x << y_width) + y) * kernel_ptab_size
+
+            mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y), 
+                               kernel_sched_vbase + offset , kernel_sched_size,
                                'C_W_', vtype = 'SCHED', x = x, y = y, pseg = 'RAM',
                                local = False, big = False )
 
-    ### global vseg for ram disk
-    if use_ramdisk:
-        mapping.addGlobal( 'seg_rdk', rdk_base, rdk_size, '__W_',
-                           vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
-                           identity = True, local = False, big = True )
+    ### global vsegs kernel_heap_x_y : non local / big pages
+    ### distributed in all clusters containing processors
+    ### different content => name & vbase indexed by (x,y) 
+    for x in xrange( x_size ):
+        for y in xrange( y_size - 1 ):
+            offset = ((x << y_width) + y) * kernel_heap_size
+
+            mapping.addGlobal( 'seg_kernel_heap_%d_%d' %(x,y), 
+                               kernel_heap_vbase + offset , kernel_heap_size,
+                               'C_W_', vtype = 'HEAP', x = x , y = y , pseg = 'RAM',
+                               local = False, big = True )
 
     ### global vsegs for external peripherals: non local / big page
-    mapping.addGlobal( 'seg_bdv', bdv_base, bdv_size, '__W_',
-                       vtype = 'PERI', x = 0, y = 0, pseg = 'BDV',
-                       local = False, big = True )
-
-    mapping.addGlobal( 'seg_tty', tty_base, tty_size, '__W_',
-                       vtype = 'PERI', x = 0, y = 0, pseg = 'TTY',
+    ### only mapped in cluster_io
+    mapping.addGlobal( 'seg_bdv', 
+                       bdv_base, bdv_size,
+                       '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'BDV',
+                       local = False, big = True )
+
+    mapping.addGlobal( 'seg_tty', 
+                       tty_base, tty_size, 
+                       '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'TTY',
+                       local = False, big = True )
+
+    mapping.addGlobal( 'seg_nic', 
+                       nic_base, nic_size,
+                       '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'NIC',
+                       local = False, big = True )
+
+    mapping.addGlobal( 'seg_cma', 
+                       cma_base, cma_size,
+                       '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'CMA',
+                       local = False, big = True )
+
+    mapping.addGlobal( 'seg_fbf', 
+                       fbf_base, fbf_size,
+                       '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'FBF',
+                       local = False, big = True )
+
+    mapping.addGlobal( 'seg_pic', 
+                       pic_base, pic_size,
+                       '__W_', vtype = 'PERI', x = x_io, y = y_io, pseg = 'PIC',
                        local = False, big = True )
 
     ### global vsegs for internal peripherals : non local / small pages
-    ### allocated in all clusters with name indexed by (x,y)
-    ### as vbase address is incremented by (cluster_xy * vseg_increment)
-    for x in xrange( x_size ):
-        for y in xrange( y_size ):
+    ### allocated in all clusters containing processors
+    ### name and vbase indexed by (x,y)
+    for x in xrange( x_size ):
+        for y in xrange( y_size - 1 ):
             offset = ((x << y_width) + y) * peri_increment
 
-            mapping.addGlobal( 'seg_xcu_%d_%d' %(x,y), xcu_base + offset, xcu_size,
+            mapping.addGlobal( 'seg_xcu_%d_%d' %(x,y), 
+                               xcu_base + offset, xcu_size,
                                '__W_', vtype = 'PERI' , x = x , y = y , pseg = 'XCU',
                                local = False, big = False )
 
-            mapping.addGlobal( 'seg_mmc_%d_%d' %(x,y), mmc_base + offset, mmc_size,
+            mapping.addGlobal( 'seg_mmc_%d_%d' %(x,y), 
+                               mmc_base + offset, mmc_size,
                                '__W_', vtype = 'PERI' , x = x , y = y , pseg = 'MMC',
                                local = False, big = False )
 
-    ### return mapping ###
-
     return mapping
 
-################################# platform test #######################################################
+########################## platform test #############################################
 
 if __name__ == '__main__':
