Index: trunk/platforms/tsar_generic_iob/arch.py
===================================================================
--- trunk/platforms/tsar_generic_iob/arch.py	(revision 913)
+++ trunk/platforms/tsar_generic_iob/arch.py	(revision 938)
@@ -1,17 +1,23 @@
+#!/usr/bin/env python
 
 from math import log, ceil
 from mapping import *
 
-#######################################################################################
+##################################################################################
 #   file   : arch.py  (for the tsar_generic_iob architecture)
 #   date   : may 2014
 #   author : Alain Greiner
-#######################################################################################
+##################################################################################
 #  This file contains a mapping generator for the "tsar_generic_iob" platform.
 #  This includes both the hardware architecture (clusters, processors, peripherals,
-#  physical space segmentation) and the mapping of all kernel objects (global vsegs).
-#  This platform includes 6 external peripherals, accessible through two IO_Bridge
-#  components located in cluster [0,0] and cluster [x_size-1, y_size-1].
-#  Available peripherals are: TTY, BDV, FBF, ROM, NIC, CMA.
+#  physical space segmentation) and the mapping of all boot and kernel objects 
+#  (global vsegs).
+#
+#  This platform includes 6 external peripherals, accessible through an IOB
+#  components located in cluster [0,0] or in cluster [x_size-1, y_size-1].
+#  Available peripherals are: TTY, BDV, FBF, ROM, NIC, CMA, PIC.
+#
+#  All clusters contain (nb_procs) processors, one L2 cache, one XCU, and
+#  one DMA controller.
 #
 #  The "constructor" parameters are:
@@ -22,6 +28,7 @@
 #  - fbf_width      : frame_buffer width = frame_buffer heigth
 #
-#  The "hidden" parameters (defined below) are:
+#  The other hardware parameters are:
 #  - nb_nics        : number of NIC channels
+#  - nb_cmas        : number of CMA channels
 #  - x_io           : cluster_io x coordinate
 #  - y_io           : cluster_io y coordinate
@@ -33,14 +40,15 @@
 #  - vseg_increment : address increment for replicated peripherals
 #
-# Regarding physical memory allocation, there is one allocator per cluster:
-# - We use only one big physical page (2 Mbytes) for the four boot vsegs,
-#   allocated in cluster[0,0], identity mapping.
-# - We use one big page per cluster for the kernel vsegs.
-#   The kernel_code, kernel_init and kernel_ptab can be replicated in all clusters.
-#   The kernel_data and kernel_uncdata shared vsegs are only mapped in cluster[0,0].
-# - We use 8 small physical pages (4 Kbytes) per cluster for the schedulers.
-# - We use one big page for each external peripheral in IO cluster,
-# - We use one small page per cluster for each internal peripheral.
-###################################################################################
+#  Regarding the boot and kernel vsegs mapping :
+#  - We use one big physical page (2 Mbytes) for the preloader and the four
+#    boot vsegs, all allocated in cluster[0,0].
+#  - We use one big page per cluster for the replicated kernel code vsegs.
+#  - We use one big page in cluster[0][0] for the kernel data vseg.
+#  - We use one big page per cluster for the distributed kernel heap vsegs.
+#  - We use one big page per cluster for the distributed ptab vsegs.
+#  - We use small physical pages (4 Kbytes) per cluster for the schedulers.
+#  - We use one big page for each external peripheral in IO cluster,
+#  - We use one small page per cluster for each internal peripheral.
+##################################################################################
 
 ########################
@@ -80,8 +88,10 @@
             ((x_io == x_size-1) and (y_io == y_size-1)) )
 
-    platform_name  = 'tsar_iob_%d_%d_%d_%d_%d' % (x_size,y_size,nb_procs,nb_ttys,fbf_width)
-
-    ### define replicated physical segments
-    ### These segments are replicated in all clusters
+    ### define type and name
+
+    platform_type  = 'tsar_iob'
+    platform_name  = '%s_%d_%d_%d' % ( platform_type, x_size, y_size , nb_procs )
+
+    ### define physical segments replicated in all clusters
 
     ram_base = 0x0000000000
@@ -145,10 +155,4 @@
     ### code, init, ptab, heap & sched vsegs are replicated in all clusters.
     ### data & uncdata vsegs are only mapped in cluster[0][0].
-    ### - We use one BIG page for code vsegs in each cluster.
-    ### - We use one BIG page for ptab vsegs in each cluster.
-    ### - we use one BIG page for heap vsegs in each cluster.
-    ### - We use 2*procs SMALL pages for sched vsegs in each cluster.
-    ### - We use one BIG page for data vseg in cluster[0,0].
-    ### - we use one SMALL page for uncdata in cluster[0,0].
 
     kernel_code_vbase    = 0x80000000
@@ -173,5 +177,7 @@
     kernel_sched_size    = 0x00002000*nb_procs  # 8 Kbytes per proc per cluster
 
+    #########################
     ### create mapping
+    #########################
 
     mapping = Mapping( name           = platform_name, 
@@ -192,53 +198,8 @@
                        ram_size       = ram_size )
 
-    ###  external peripherals (accessible in cluster[0,0] only for this mapping)
-
-    iob = mapping.addPeriph( 'IOB', base = iob_base, size = iob_size, ptype = 'IOB' )
-
-    bdv = mapping.addPeriph( 'BDV', base = bdv_base, size = bdv_size, ptype = 'IOC', subtype = 'BDV' )
-
-    tty = mapping.addPeriph( 'TTY', base = tty_base, size = tty_size, ptype = 'TTY', channels = nb_ttys )
-
-    nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, ptype = 'NIC', channels = nb_nics )
-
-    cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size, ptype = 'CMA', channels = nb_cmas )
-
-    fbf = mapping.addPeriph( 'FBF', base = fbf_base, size = fbf_size, ptype = 'FBF', arg = fbf_width )
-
-    rom = mapping.addPeriph( 'ROM', base = rom_base, size = rom_size, ptype = 'ROM' )
-
-    pic = mapping.addPeriph( 'PIC', base = pic_base, size = pic_size, ptype = 'PIC', channels = 32 )
-
-    mapping.addIrq( pic, index = 0,  isrtype = 'ISR_NIC_RX', channel = 0 )
-    mapping.addIrq( pic, index = 1,  isrtype = 'ISR_NIC_RX', channel = 1 )
-
-    mapping.addIrq( pic, index = 2,  isrtype = 'ISR_NIC_TX', channel = 0 )
-    mapping.addIrq( pic, index = 3,  isrtype = 'ISR_NIC_TX', channel = 1 )
-
-    mapping.addIrq( pic, index = 4,  isrtype = 'ISR_CMA'   , channel = 0 )
-    mapping.addIrq( pic, index = 5,  isrtype = 'ISR_CMA'   , channel = 1 )
-    mapping.addIrq( pic, index = 6,  isrtype = 'ISR_CMA'   , channel = 2 )
-    mapping.addIrq( pic, index = 7,  isrtype = 'ISR_CMA'   , channel = 3 )
-
-    mapping.addIrq( pic, index = 8,  isrtype = 'ISR_BDV'   , channel = 0 )
-
-    mapping.addIrq( pic, index = 16, isrtype = 'ISR_TTY_RX', channel = 0 )
-    mapping.addIrq( pic, index = 17, isrtype = 'ISR_TTY_RX', channel = 1 )
-    mapping.addIrq( pic, index = 18, isrtype = 'ISR_TTY_RX', channel = 2 )
-    mapping.addIrq( pic, index = 19, isrtype = 'ISR_TTY_RX', channel = 3 )
-    mapping.addIrq( pic, index = 20, isrtype = 'ISR_TTY_RX', channel = 4 )
-    mapping.addIrq( pic, index = 21, isrtype = 'ISR_TTY_RX', channel = 5 )
-    mapping.addIrq( pic, index = 22, isrtype = 'ISR_TTY_RX', channel = 6 )
-    mapping.addIrq( pic, index = 23, isrtype = 'ISR_TTY_RX', channel = 7 )
-    mapping.addIrq( pic, index = 24, isrtype = 'ISR_TTY_RX', channel = 8 )
-    mapping.addIrq( pic, index = 25, isrtype = 'ISR_TTY_RX', channel = 9 )
-    mapping.addIrq( pic, index = 26, isrtype = 'ISR_TTY_RX', channel = 10 )
-    mapping.addIrq( pic, index = 27, isrtype = 'ISR_TTY_RX', channel = 11 )
-    mapping.addIrq( pic, index = 28, isrtype = 'ISR_TTY_RX', channel = 12 )
-    mapping.addIrq( pic, index = 29, isrtype = 'ISR_TTY_RX', channel = 13 )
-    mapping.addIrq( pic, index = 30, isrtype = 'ISR_TTY_RX', channel = 14 )
-    mapping.addIrq( pic, index = 31, isrtype = 'ISR_TTY_RX', channel = 15 )
-
-    ### hardware components replicated in all clusters
+
+    #############################
+    ###   Hardware Components
+    #############################
 
     for x in xrange( x_size ):
@@ -247,26 +208,89 @@
             offset     = cluster_xy << (paddr_width - x_width - y_width)
 
-            ram = mapping.addRam( 'RAM', base = ram_base + offset, size = ram_size )
-
-            mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, size = mmc_size,
-                                     ptype = 'MMC' )
-
-            dma = mapping.addPeriph( 'DMA', base = dma_base + offset, size = dma_size,
-                                     ptype = 'DMA', channels = nb_procs )
-
-            xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, size = xcu_size,
-                                     ptype = 'XCU', channels = nb_procs * irq_per_proc, arg = 32 )
-
-            # MMC IRQ replicated in all clusters
+            ### components replicated in all clusters
+            ram = mapping.addRam( 'RAM', base = ram_base + offset, 
+                                  size = ram_size )
+
+            mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, 
+                                     size = mmc_size, ptype = 'MMC' )
+
+            dma = mapping.addPeriph( 'DMA', base = dma_base + offset, 
+                                     size = dma_size, ptype = 'DMA', 
+                                     channels = nb_procs )
+
+            xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, 
+                                     size = xcu_size, ptype = 'XCU', 
+                                     channels = nb_procs * irq_per_proc, arg = 32 )
+
             mapping.addIrq( xcu, index = 0, isrtype = 'ISR_MMC' )
 
-            # DMA IRQ replicated in all clusters
             for i in xrange ( dma.channels ):
                 mapping.addIrq( xcu, index = 1+i, isrtype = 'ISR_DMA',
-                        channel = i )
-
-            # processors
+                                channel = i )
+
             for p in xrange ( nb_procs ):
                 mapping.addProc( x, y, p )
+
+            ### external peripherals in cluster_io
+            if ( (x==x_io) and (y==y_io) ):
+
+                iob = mapping.addPeriph( 'IOB', base = iob_base, size = iob_size, 
+                                         ptype = 'IOB' )
+
+                bdv = mapping.addPeriph( 'BDV', base = bdv_base, size = bdv_size, 
+                                         ptype = 'IOC', subtype = 'BDV' )
+
+                tty = mapping.addPeriph( 'TTY', base = tty_base, size = tty_size, 
+                                         ptype = 'TTY', channels = nb_ttys )
+
+                nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, 
+                                         ptype = 'NIC', channels = nb_nics )
+
+                cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size, 
+                                         ptype = 'CMA', channels = nb_cmas )
+
+                fbf = mapping.addPeriph( 'FBF', base = fbf_base, size = fbf_size, 
+                                         ptype = 'FBF', arg = fbf_width )
+
+                rom = mapping.addPeriph( 'ROM', base = rom_base, size = rom_size, 
+                                         ptype = 'ROM' )
+
+                pic = mapping.addPeriph( 'PIC', base = pic_base, size = pic_size, 
+                                         ptype = 'PIC', channels = 32 )
+
+                mapping.addIrq( pic, index = 0,  isrtype = 'ISR_NIC_RX', channel = 0 )
+                mapping.addIrq( pic, index = 1,  isrtype = 'ISR_NIC_RX', channel = 1 )
+
+                mapping.addIrq( pic, index = 2,  isrtype = 'ISR_NIC_TX', channel = 0 )
+                mapping.addIrq( pic, index = 3,  isrtype = 'ISR_NIC_TX', channel = 1 )
+
+                mapping.addIrq( pic, index = 4,  isrtype = 'ISR_CMA'   , channel = 0 )
+                mapping.addIrq( pic, index = 5,  isrtype = 'ISR_CMA'   , channel = 1 )
+                mapping.addIrq( pic, index = 6,  isrtype = 'ISR_CMA'   , channel = 2 )
+                mapping.addIrq( pic, index = 7,  isrtype = 'ISR_CMA'   , channel = 3 )
+
+                mapping.addIrq( pic, index = 8,  isrtype = 'ISR_BDV'   , channel = 0 )
+
+                mapping.addIrq( pic, index = 16, isrtype = 'ISR_TTY_RX', channel = 0 )
+                mapping.addIrq( pic, index = 17, isrtype = 'ISR_TTY_RX', channel = 1 )
+                mapping.addIrq( pic, index = 18, isrtype = 'ISR_TTY_RX', channel = 2 )
+                mapping.addIrq( pic, index = 19, isrtype = 'ISR_TTY_RX', channel = 3 )
+                mapping.addIrq( pic, index = 20, isrtype = 'ISR_TTY_RX', channel = 4 )
+                mapping.addIrq( pic, index = 21, isrtype = 'ISR_TTY_RX', channel = 5 )
+                mapping.addIrq( pic, index = 22, isrtype = 'ISR_TTY_RX', channel = 6 )
+                mapping.addIrq( pic, index = 23, isrtype = 'ISR_TTY_RX', channel = 7 )
+                mapping.addIrq( pic, index = 24, isrtype = 'ISR_TTY_RX', channel = 8 )
+                mapping.addIrq( pic, index = 25, isrtype = 'ISR_TTY_RX', channel = 9 )
+                mapping.addIrq( pic, index = 26, isrtype = 'ISR_TTY_RX', channel = 10 )
+                mapping.addIrq( pic, index = 27, isrtype = 'ISR_TTY_RX', channel = 11 )
+                mapping.addIrq( pic, index = 28, isrtype = 'ISR_TTY_RX', channel = 12 )
+                mapping.addIrq( pic, index = 29, isrtype = 'ISR_TTY_RX', channel = 13 )
+                mapping.addIrq( pic, index = 30, isrtype = 'ISR_TTY_RX', channel = 14 )
+                mapping.addIrq( pic, index = 31, isrtype = 'ISR_TTY_RX', channel = 15 )
+
+
+    ####################################
+    ###   Boot & Kernel vsegs mapping
+    ####################################
 
     ### global vsegs for boot_loader
@@ -289,4 +313,18 @@
                        'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM',
                        identity = True , local = False, big = True )
+
+    ### global vsegs kernel_code, kernel_init : big / local
+    ### replicated in all clusters with the same name & same vbase
+    for x in xrange( x_size ):
+        for y in xrange( y_size ):
+            mapping.addGlobal( 'seg_kernel_code', kernel_code_vbase, kernel_code_size,
+                               'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM',
+                               binpath = 'build/kernel/kernel.elf', 
+                               local = True, big = True )
+
+            mapping.addGlobal( 'seg_kernel_init', kernel_init_vbase, kernel_init_size,
+                               'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM',
+                               binpath = 'build/kernel/kernel.elf', 
+                               local = True, big = True )
 
     ### Global vsegs kernel_ptab_x_y : big / non local
@@ -299,18 +337,4 @@
                                'CXW_', vtype = 'PTAB', x = x, y = y, pseg = 'RAM', 
                                local = False , big = True )
-
-    ### global vsegs kernel_code, kernel_init : big / local
-    ### replicated in all clusters with the same name & same vbase
-    for x in xrange( x_size ):
-        for y in xrange( y_size ):
-            mapping.addGlobal( 'seg_kernel_code', kernel_code_vbase, kernel_code_size,
-                               'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM',
-                               binpath = 'build/kernel/kernel.elf', 
-                               local = True, big = True )
-
-            mapping.addGlobal( 'seg_kernel_init', kernel_init_vbase, kernel_init_size,
-                               'CXW_', vtype = 'ELF', x = x , y = y , pseg = 'RAM',
-                               binpath = 'build/kernel/kernel.elf', 
-                               local = True, big = True )
 
     ### global vseg kernel_data : big / non local
@@ -333,5 +357,6 @@
         for y in xrange( y_size ):
             offset = ((x << y_width) + y) * kernel_sched_size
-            mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y), kernel_sched_vbase + offset , kernel_sched_size,
+            mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y), 
+                               kernel_sched_vbase + offset , kernel_sched_size,
                                'C_W_', vtype = 'SCHED', x = x , y = y , pseg = 'RAM',
                                local = False, big = False )
@@ -342,5 +367,6 @@
         for y in xrange( y_size ):
             offset = ((x << y_width) + y) * kernel_heap_size
-            mapping.addGlobal( 'seg_kernel_heap_%d_%d' %(x,y), kernel_heap_vbase + offset , kernel_heap_size,
+            mapping.addGlobal( 'seg_kernel_heap_%d_%d' %(x,y), 
+                               kernel_heap_vbase + offset , kernel_heap_size,
                                'C_W_', vtype = 'HEAP', x = x , y = y , pseg = 'RAM',
                                local = False, big = True )
@@ -398,9 +424,7 @@
                                local = False, big = False )
 
-    ### return mapping ###
-
     return mapping
 
-################################# platform test #######################################################
+################################# platform test ####################################
 
 if __name__ == '__main__':
