Ignore:
Timestamp:
Apr 11, 2015, 8:26:46 PM (9 years ago)
Author:
alain
Message:

Modify the tsar_generic_iob platform:
The vci_multi_dma component replicated in all cluster is replaced by a vci_mwmr_dma component.
This new component supports all hardware coprocessors respection the "coproc" interface.
Amongst the available coprocessors (defined in the SocLib? "coprocessor_components" directory)
the MWR_CPY coprocessor provide an improved memory copy service throughput x 2).

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/platforms/tsar_generic_iob/top.cpp

    r966 r972  
    4848// - IOPIC HWI[31:16]   connected to IRQ_TTY_RX[15:0]
    4949//
    50 // Besides the external peripherals, each cluster contains one XICU component,
    51 // and one multi channels DMA component.
    52 // The XICU component is mainly used to handle WTI IRQs, as only
    53 // 1 + NB_PROCS_MAX HWI IRQs are connected to XICU in each cluster:
     50// Each cluster contains the following component:
     51// - From 1 to 8 MIP32 processors
     52// - One L2 cache controller
     53// - One XICU component,
     54// - One - optional - single channel DMA controler,
     55// - One - optional - hardware coprocessor
     56// The XICU component is mainly used to handle WTI IRQs, as at most
     57// 2 HWI IRQs are connected to XICU in each cluster:
    5458// - IRQ_IN[0]            : MMC
    55 // - IRQ_IN[1]            : DMA channel 0
    56 // - IRQ_IN[2]            : DMA channel 1
    57 // - ...                    ...   
    58 // - IRQ_IN[NB_PROCS_MAX] : DMA channel NB_PROCS_MAX
     59// - IRQ_IN[1]            : MWR
    5960//
    6061// All clusters are identical, but cluster(0,0) and cluster(XMAX-1,YMAX-1)
    … …  
    131132#include "mapping_table.h"
    132133
     134
     135
    133136#include "tsar_iob_cluster.h"
    134137#include "vci_chbuf_dma.h"
    … …  
    144147#include "alloc_elems.h"
    145148
    146 ///////////////////////////////////////////////////
    147 //      OS
    148 ///////////////////////////////////////////////////
     149
     150//////////////////////////////////////////////////////////////////
     151//    Coprocessor type (must be replicated in tsar_iob_cluster)
     152//////////////////////////////////////////////////////////////////
     153
     154#define MWR_COPROC_CPY  0
     155#define MWR_COPROC_DCT  1
     156#define MWR_COPROC_GCD  2
     157
     158//////////////////////////////////////////////////////////////////
     159//      For ALMOS
     160//////////////////////////////////////////////////////////////////
     161
    149162#define USE_ALMOS 0
    150163
    … …  
    153166#define almos_archinfo_pathname   "arch-info.bin@0xBFC08000:D"
    154167
    155 ///////////////////////////////////////////////////
    156 //               Parallelisation
    157 ///////////////////////////////////////////////////
     168//////////////////////////////////////////////////////////////////
     169//        Parallelisation
     170//////////////////////////////////////////////////////////////////
    158171
    159172#define USING_OPENMP           0
    … …  
    163176#endif
    164177
    165 ///////////////////////////////////////////////////////////
     178//////////////////////////////////////////////////////////////////
    166179//          DSPIN parameters
    167 ///////////////////////////////////////////////////////////
     180//////////////////////////////////////////////////////////////////
    168181
    169182#define dspin_int_cmd_width   39
    … …  
    173186#define dspin_ram_rsp_width   64
    174187
    175 ///////////////////////////////////////////////////////////
     188//////////////////////////////////////////////////////////////////
    176189//         VCI fields width  for the 3 VCI networks
    177 ///////////////////////////////////////////////////////////
     190//////////////////////////////////////////////////////////////////
    178191
    179192#define vci_cell_width_int    4
    … …  
    214227#define L1_DSETS              64
    215228
     229#if BOOT_DEBUG_ELF
     230_printf("\n[DEBUG BOOT_ELF] P[%d,%d,%d] copy segment %d :\n"
     231        "  vaddr = %x / size = %x / paddr = %l\n",
     232        x , y , p , seg_id , seg_vaddr , seg_memsz , seg_paddr );
     233#endif
    216234#define DISK_IMAGE_NAME       "../../../giet_vm/hdd/virt_hdd.dmg"
    217235
    … …  
    249267// Two different initiators cannot have the same SRCID, but a given
    250268// initiator can have two alias SRCIDs:
    251 // - Internal initiators (procs, mdma) are replicated in all clusters,
     269// - Internal initiators (procs, mwmr) are replicated in all clusters,
    252270//   and each initiator has one single SRCID.
    253271// - External initiators (disk, cdma) are not replicated, but can be
    … …  
    263281
    264282#define PROC_LOCAL_SRCID             0x0    // from 0 to 7
    265 #define MDMA_LOCAL_SRCID             0x8
     283#define MWMR_LOCAL_SRCID             0x8
    266284#define IOBX_LOCAL_SRCID             0x9
    267285#define MEMC_LOCAL_SRCID             0xA
    … …  
    276294#define INT_MEMC_TGT_ID              0
    277295#define INT_XICU_TGT_ID              1
    278 #define INT_MDMA_TGT_ID              2
     296#define INT_MWMR_TGT_ID              2
    279297#define INT_IOBX_TGT_ID              3
    280298
    281299#define INT_PROC_INI_ID              0   // from 0 to (NB_PROCS_MAX-1)
    282 #define INT_MDMA_INI_ID              (NB_PROCS_MAX)
     300#define INT_MWMR_INI_ID              (NB_PROCS_MAX)
    283301#define INT_IOBX_INI_ID              (NB_PROCS_MAX+1)
    284302
    … …  
    439457   // checking hardware parameters
    440458   assert( (XMAX <= 16) and
    441            "The XMAX parameter cannot be larger than 16" );
     459   "Error in tsar_generic_iob : XMAX parameter cannot be larger than 16" );
    442460
    443461   assert( (YMAX <= 16) and
    444            "The YMAX parameter cannot be larger than 16" );
     462   "Error in tsar_generic_iob : YMAX parameter cannot be larger than 16" );
    445463
    446464   assert( (NB_PROCS_MAX <= 8) and
    447            "NB_PROCS_MAX parameter cannot be larger than 8" );
     465   "Error in tsar_generic_iob : NB_PROCS_MAX parameter cannot be larger than 8" );
    448466
    449467   assert( (XCU_NB_HWI > NB_PROCS_MAX) and
    450            "XCU_NB_HWI must be larger than NB_PROCS_MAX" );
     468   "Error in tsar_generic_iob : XCU_NB_HWI must be larger than NB_PROCS_MAX" );
    451469
    452470   assert( (XCU_NB_PTI >= NB_PROCS_MAX) and
    453            "XCU_NB_PTI cannot be smaller than NB_PROCS_MAX" );
     471   "Error in tsar_generic_iob : XCU_NB_PTI cannot be smaller than NB_PROCS_MAX" );
    454472
    455473   assert( (XCU_NB_WTI >= 4*NB_PROCS_MAX) and
    456            "XCU_NB_WTI cannot be smaller than 4*NB_PROCS_MAX" );
     474   "Error in tsar_generic_iob : XCU_NB_WTI cannot be smaller than 4*NB_PROCS_MAX" );
    457475
    458476   assert( (XCU_NB_OUT >= 4*NB_PROCS_MAX) and
    459            "XCU_NB_OUT cannot be smaller than 4*NB_PROCS_MAX" );
     477   "Error in tsar_generic_iob : XCU_NB_OUT cannot be smaller than 4*NB_PROCS_MAX" );
    460478   
    461    assert( (NB_DMA_CHANNELS >= NB_PROCS_MAX) and
    462            "The NB_DMA_CHANNELS parameter cannot be larger than 8" );
    463 
    464479   assert( (NB_TTY_CHANNELS >= 1) and (NB_TTY_CHANNELS <= 16) and
    465            "The NB_TTY_CHANNELS parameter cannot be larger than 16" );
     480   "Error in tsar_generic_iob : NB_TTY_CHANNELS parameter cannot be larger than 16" );
    466481
    467482   assert( (NB_NIC_CHANNELS <= 2) and
    468            "The NB_NIC_CHANNELS parameter cannot be larger than 2" );
     483   "Error in tsar_generic_iob : NB_NIC_CHANNELS parameter cannot be larger than 2" );
    469484
    470485   assert( (NB_CMA_CHANNELS <= 4) and
    471            "The NB_CMA_CHANNELS parameter cannot be larger than 4" );
     486   "Error in tsar_generic_iob : NB_CMA_CHANNELS parameter cannot be larger than 4" );
    472487
    473488   assert( (X_WIDTH == 4) and (Y_WIDTH == 4) and
    474            "You must have X_WIDTH == Y_WIDTH == 4");
     489   "Error in tsar_generic_iob : You must have X_WIDTH == Y_WIDTH == 4");
     490
     491   assert(  ((USE_MWR_CPY + USE_MWR_GCD + USE_MWR_DCT) == 1) and
     492   "Error in tsar_generic_iob : No MWR coprocessor found in hard_config.h");
     493
     494   assert(  ((USE_IOC_HBA + USE_IOC_BDV + USE_IOC_SDC) == 1) and
     495   "Error in tsar_generic_iob : NoIOC controller found in hard_config.h");
    475496
    476497   std::cout << std::endl << std::dec
    … …  
    478499             << " - YMAX            = " << YMAX << std::endl
    479500             << " - NB_PROCS_MAX    = " << NB_PROCS_MAX << std::endl
    480              << " - NB_DMA_CHANNELS = " << NB_DMA_CHANNELS <<  std::endl
    481501             << " - NB_TTY_CHANNELS = " << NB_TTY_CHANNELS <<  std::endl
    482502             << " - NB_NIC_CHANNELS = " << NB_NIC_CHANNELS <<  std::endl
    … …  
    492512             << " - DEBUG_PROCID    = " << debug_proc_id << std::endl
    493513             << " - DEBUG_MEMCID    = " << debug_memc_id << std::endl
     514             << " - DEBUG_XRAMID    = " << debug_xram_id << std::endl
    494515             << " - DEBUG_XRAMID    = " << debug_xram_id << std::endl;
    495516
    … …  
    529550   // - two levels address decoding for commands
    530551   // - two levels srcid decoding for responses
    531    // - NB_PROCS_MAX + 2 (MDMA, IOBX) local initiators per cluster
    532    // - 4 local targets (MEMC, XICU, MDMA, IOBX) per cluster
     552   // - NB_PROCS_MAX + 2 (MWMR, IOBX) local initiators per cluster
     553   // - 4 local targets (MEMC, XICU, MWMR, IOBX) per cluster
    533554   /////////////////////////////////////////////////////////////////////
    534555   MappingTable maptab_int( vci_address_width,
    … …  
    563584                     IntTab(cluster(x,y), INT_XICU_TGT_ID), not cacheable));
    564585
    565          std::ostringstream    smdma;
    566          smdma << "int_seg_mdma_" << x << "_" << y;
    567          maptab_int.add(Segment(smdma.str(), SEG_DMA_BASE+offset, SEG_DMA_SIZE,
    568                      IntTab(cluster(x,y), INT_MDMA_TGT_ID), not cacheable));
     586         std::ostringstream    smwmr;
     587         smwmr << "int_seg_mwmr_" << x << "_" << y;
     588         maptab_int.add(Segment(smwmr.str(), SEG_MWR_BASE+offset, SEG_MWR_SIZE,
     589                     IntTab(cluster(x,y), INT_MWMR_TGT_ID), not cacheable));
    569590
    570591         // the following segments are only defined in cluster_iob0 or in cluster_iob1
    … …  
    616637         // and the port index on the local interconnect.
    617638
    618          maptab_int.srcid_map( IntTab( cluster(x,y), MDMA_LOCAL_SRCID ),
    619                                IntTab( cluster(x,y), INT_MDMA_INI_ID ) );
     639         maptab_int.srcid_map( IntTab( cluster(x,y), MWMR_LOCAL_SRCID ),
     640                               IntTab( cluster(x,y), INT_MWMR_INI_ID ) );
    620641
    621642         maptab_int.srcid_map( IntTab( cluster(x,y), IOBX_LOCAL_SRCID ),
    … …  
    10221043                   dspin_ram_rsp_width>* clusters[XMAX][YMAX];
    10231044
     1045    unsigned int coproc_type;
     1046    if ( USE_MWR_CPY ) coproc_type = MWR_COPROC_CPY;
     1047    if ( USE_MWR_DCT ) coproc_type = MWR_COPROC_DCT;
     1048    if ( USE_MWR_GCD ) coproc_type = MWR_COPROC_GCD;
     1049
    10241050#if USING_OPENMP
    10251051#pragma omp parallel
    … …  
    10501076                IOX_IOB0_TGT_ID :
    10511077                IOX_IOB1_TGT_ID ;
     1078
    10521079
    10531080            std::ostringstream sc;
    … …  
    10621089                sc.str().c_str(),
    10631090                NB_PROCS_MAX,
    1064                 NB_DMA_CHANNELS,
    10651091                x,
    10661092                y,
    … …  
    10791105                INT_MEMC_TGT_ID,
    10801106                INT_XICU_TGT_ID,
    1081                 INT_MDMA_TGT_ID,
     1107                INT_MWMR_TGT_ID,
    10821108                INT_IOBX_TGT_ID,
    10831109
    10841110                INT_PROC_INI_ID,
    1085                 INT_MDMA_INI_ID,
     1111                INT_MWMR_INI_ID,
    10861112                INT_IOBX_INI_ID,
    10871113
    … …  
    11061132                XCU_NB_WTI,
    11071133                XCU_NB_OUT,
     1134
     1135                coproc_type,
    11081136
    11091137                loader,
    … …  
    15011529                clusters[x][y]->signal_int_vci_tgt_xicu.print_trace(xicu_signame.str());
    15021530
    1503 //              clusters[x][y]->mdma->print_trace();
    1504 //              std::ostringstream mdma_tgt_signame;
    1505 //              mdma_tgt_signame << "[SIG]MDMA_TGT_" << x << "_" << y;
    1506 //              clusters[x][y]->signal_int_vci_tgt_mdma.print_trace(mdma_tgt_signame.str());
    1507 //              std::ostringstream mdma_ini_signame;
    1508 //              mdma_ini_signame << "[SIG]MDMA_INI_" << x << "_" << y;
    1509 //              clusters[x][y]->signal_int_vci_ini_mdma.print_trace(mdma_ini_signame.str());
     1531                // coprocessor in cluster(x,y)
     1532                clusters[x][y]->mwmr->print_trace();
     1533                std::ostringstream mwmr_tgt_signame;
     1534                mwmr_tgt_signame << "[SIG]MWMR_TGT_" << x << "_" << y;
     1535                clusters[x][y]->signal_int_vci_tgt_mwmr.print_trace(mwmr_tgt_signame.str());
     1536                std::ostringstream mwmr_ini_signame;
     1537                mwmr_ini_signame << "[SIG]MWMR_INI_" << x << "_" << y;
     1538                clusters[x][y]->signal_int_vci_ini_mwmr.print_trace(mwmr_ini_signame.str());
     1539                if ( USE_MWR_CPY ) clusters[x][y]->cpy->print_trace();
     1540                if ( USE_MWR_DCT ) clusters[x][y]->dct->print_trace();
     1541                if ( USE_MWR_GCD ) clusters[x][y]->gcd->print_trace();
    15101542
    15111543                // local interrupts in cluster(x,y)
    … …  
    15141546                          << " ACTIVE" << std::endl;
    15151547
    1516                 for ( size_t c = 0 ; c < NB_DMA_CHANNELS ; c++ )
    1517                 {
    1518                     if( clusters[x][y]->signal_irq_mdma[c].read() )
    1519                     std::cout << "### IRQ_DMA_" << std::dec << x << "_" << y << "_" << c
    1520                               << " ACTIVE" << std::endl;
    1521                 }
     1548                if( clusters[x][y]->signal_irq_mwmr.read() )
     1549                std::cout << "### IRQ_MWR_" << std::dec << x << "_" << y
     1550                          << " ACTIVE" << std::endl;
    15221551
    15231552                for ( size_t c = 0 ; c < NB_PROCS_MAX ; c++ )
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