# -*- python -*-

__id__ = "$Id: vci_cc_vcache_wrapper2_v1.sd 20 2010-04-14 03:27:59Z nipo $"
__version__ = "$Revision: 20 $"

Module('caba:vci_cc_vcache_wrapper2_v1',
	classname = 'soclib::caba::VciCcVCacheWrapper2V1',
	   tmpl_parameters = [
	parameter.Module('vci_param', default = 'caba:vci_param'),
	parameter.Module('iss_t'),
	],
	header_files = [
	'../source/include/vci_cc_vcache_wrapper2_v1.h',
	],
	implementation_files = [
	'../source/src/vci_cc_vcache_wrapper2_v1.cpp',
	],
	uses = [
	Uses('caba:base_module'),
	Uses('caba:write_buffer'),
	Uses('caba:generic_tlb', addr_t = parameter.StringExt('sc_dt::sc_uint<%d> ', parameter.Reference('addr_size'))),
	Uses('caba:generic_cache', addr_t = parameter.StringExt('sc_dt::sc_uint<%d> ', parameter.Reference('addr_size'))),
	Uses('common:address_masking_table', data_t = parameter.StringExt('sc_dt::sc_uint<%d> ', parameter.Reference('addr_size'))),
	Uses('common:iss2'),
	Uses('common:mapping_table'),
	],
	ports = [
	Port('caba:vci_initiator', 'p_vci_ini_rw'),
	Port('caba:vci_initiator', 'p_vci_ini_c'),
	Port('caba:vci_target', 'p_vci_tgt'),
	Port('caba:bit_in','p_irq', parameter.Constant('n_irq')),
	Port('caba:bit_in', 'p_resetn', auto = 'resetn'),
	Port('caba:clock_in', 'p_clk', auto = 'clock'),
	],
	instance_parameters = [
	parameter.Int('proc_id'),
	parameter.Module('mt', 'common:mapping_table'),
	parameter.Module('mc', 'common:mapping_table'),
	parameter.IntTab('initiator_rw_index'),
	parameter.IntTab('initiator_c_index'),
	parameter.IntTab('target_index'),
    	parameter.Int('itlb_ways'),
    	parameter.Int('itlb_sets'),
    	parameter.Int('dtlb_ways'),
    	parameter.Int('dtlb_sets'),
    	parameter.Int('icache_ways'),
    	parameter.Int('icache_sets'),
    	parameter.Int('icache_words'),
    	parameter.Int('dcache_ways'),
    	parameter.Int('dcache_sets'),
    	parameter.Int('dcache_words'),
    	parameter.Int('write_buf_size'),
	],
	   extensions = [
	'dsx:get_ident='
        'initiator_rw_index:p_vci_ini_rw:mt,'
        'initiator_c_index:p_vci_ini_c:mc,'
        'target_index:p_vci_tgt:mc',
	'dsx:cpu=wrapper:iss_t',
	'dsx:addressable=target_index',
    'dsx:on_segment=mc:add_index:initiator_rw_index',
	'dsx:mapping_type=processor:proc_id',
   ],
)