/dts-v1/; / { #address-cells = <0x1>; #size-cells = <0x1>; cpus { #address-cells = <0x1>; #size-cells = <0x0>; Mips,32@0 { device_type = "cpu"; icudev_type = "cpu:mips"; name = "Mips,32"; reg = <0x00000000>; }; Mips,32@1 { device_type = "cpu"; icudev_type = "cpu:mips"; name = "Mips,32"; reg = <0x00000001>; }; }; memory@0x00000000 { cached = <0x1>; device_type = "memory"; reg = <0x00000000 0x08000000>; }; memory@0xff000000 { cached = <0x1>; device_type = "rom"; reg = <0xff000000 0x00010000>; }; tty@0xf4000000 { device_type = "vci:tty"; irq = <&{/xicu@0xf0000000} 0xa>; reg = <0xf4000000 0x00000010>; tty_count = <0x1>; }; blockdevice@0xf2000000 { device_type = "vci:spi"; irq = <&{/xicu@0xf0000000} 0x9>; reg = <0xf2000000 0x00000020>; }; fb@0xf3000000 { device_type = "soclib:frame_buffer"; reg = <0xf3000000 0x00100000>; mode = <16>; width = <640>; height = <480>; }; vcikbc@0xf1000000 { device_type = "vci:ps2"; irq = <&{/xicu@0xf0000000} 0xb>; reg = <0xf1000000 0x00000020>; ports = <0x2>; }; xicu@0xf0000000 { device_type = "soclib:xicu:root"; input_lines = <0x10>; ipis = <0x10>; reg = <0xf0000000 0x00001000>; timers = <0x10>; timer-freq = <25000000>; out@0 { device_type = "soclib:xicu:filter"; irq = <&{/cpus/Mips,32@0} 0x0>; output_line = <0x0>; parent = <&{/xicu@0xf0000000}>; }; out@1 { device_type = "soclib:xicu:filter"; irq = <&{/cpus/Mips,32@0} 0x1>; output_line = <0x1>; parent = <&{/xicu@0xf0000000}>; }; out@2 { device_type = "soclib:xicu:filter"; irq = <&{/cpus/Mips,32@0} 0x2>; output_line = <0x2>; parent = <&{/xicu@0xf0000000}>; }; out@3 { device_type = "soclib:xicu:filter"; irq = <&{/cpus/Mips,32@1} 0x0>; output_line = <0x4>; parent = <&{/xicu@0xf0000000}>; }; out@4 { device_type = "soclib:xicu:filter"; irq = <&{/cpus/Mips,32@1} 0x1>; output_line = <0x5>; parent = <&{/xicu@0xf0000000}>; }; out@5 { device_type = "soclib:xicu:filter"; irq = <&{/cpus/Mips,32@1} 0x2>; output_line = <0x6>; parent = <&{/xicu@0xf0000000}>; }; }; topology { #address-cells = <2>; #size-cells = <0>; cluster@0,0 { reg = <0 0>; devices = <&{/cpus/Mips,32@0} &{/cpus/Mips,32@1} &{/memory@0x00000000} &{/xicu@0xf0000000} &{/tty@0xf4000000} &{/blockdevice@0xf2000000} &{/fb@0xf3000000} &{/vcikbc@0xf1000000} >; }; }; };