source: trunk/platforms

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Diff Rev Age Author Log Message
(edit) @168   13 years alain Moving to the vci_cc_xcache_wrapper_v4 implementing the multicores …
(edit) @167   13 years kane delete all timeout reference (multi write buffer)
(edit) @166   13 years kane (1) add modif from previous version (before merging), (2) add two …
(edit) @165   13 years kane In vci_cc_xcache_wrapper : (1) fix compilation directive, (2) replace …
(edit) @156   13 years alain Moving the sof_filter and soft_transpose software applications to the …
(edit) @155   13 years alain ntroducing the tsarv4_generic_ring platform
(edit) @154   13 years alain Introducing the tsarv4_generic_xbar platform
(edit) @152   13 years kane Re add vci_cc_xcache_wrapper_v4 "multi-cache" edition and (1) fix …
(edit) @144   13 years kane in vci_cc_xcache_wrapper_v4 : (1) Fix bug in MISS_VICTIM state, (2) …
(edit) @143   13 years kane fix bug in ccxcachev4, save cpu_info in memcachev4
(edit) @140   13 years kane yAjout du multi_cache : plusieurs processeur peuvent ce partager le …
(edit) @137   13 years simerabe replacing old ring versions with new one
(edit) @134   13 years kane add multi write buffer in cc_xcache_v4
(edit) @133   13 years choichil Platform with more parameters
(edit) @121   13 years choichil Generic platform for VDSPIN tests and measurements
(edit) @117   13 years alain Introducing two generic hardware platforms: - tsarv4_vgmn_generic_32 - …
(edit) @112   13 years choichil Platform that works…
(edit) @107   13 years guthmull Add a simple TsarV4 platform
(edit) @105   13 years choichil PF ended
(edit) @103   13 years choichil Platform using vci_simple_ram which is not the svn working copy (allow …
(edit) @100   14 years choichil Deleting modelsim files
(edit) @99   14 years choichil Platform without targets
(edit) @97   14 years choichil Draft of new platform with VciSyntheticInitiator? and VDSPIN
(edit) @95   14 years choichil Platform with DMA and FB
(edit) @94   14 years choichil Deleting work directory
(edit) @93   14 years choichil Platform with DMA
(edit) @92   14 years choichil Platform with DMA VHDL
(edit) @87   14 years simerabe platform for new vdspin_router/vci_local_ring_fast
(edit) @86   14 years simerabe simple_ring_fast platform
(edit) @85   14 years simerabe removing duplicate ring_signals_2
(edit) @46   14 years alain
(edit) @43   14 years guthmull Don't generate the software
(edit) @42   14 years guthmull Add a pf similar to the fpga one
(edit) @30   14 years nipo Fix netlist
(edit) @28   14 years nipo Set outdir to '.' to make sccom happy
(edit) @27   14 years guthmull Add v1 phys platform
(edit) @25   14 years nipo Uniformize 40 bit addresses
(edit) @24   14 years nipo Remove loggers
(edit) @23   14 years nipo Add non coherent platform
(edit) @22   14 years bouyer Fix CPU address
(edit) @21   14 years nipo Add DSX-based platform definition
(edit) @10   14 years simerabe changing broadcast offset on vci_ring_initiator
(edit) @9   14 years simerabe updating multi-cluster platform
(edit) @8   14 years simerabe new ring components for systemcass
(add) @3   14 years nipo Import platforms
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