Timeline



Aug 16, 2012:

7:36 PM Changeset [255] by alain
Two modifications in the "tsarv4_generic_mmu" platform: 1) improving …
7:32 PM Changeset [254] by alain
Two modifications: 1/ fixing a bug in the DCACHE_CC_INVAL state, …
2:41 PM Changeset [253] by meunier
Added the display of the name of the component in the vci_cc_vcache_v4 …
2:28 PM Changeset [252] by meunier
Minor changes on the soft_filter. This version works on tsar …
12:52 PM Changeset [251] by cfuguet
Add the r_tgt_dcache_rsp and r_tgt_icache_rsp in the condition to go …

Aug 13, 2012:

10:42 AM Changeset [250] by alain
Removing parasitic constructor message.

Aug 9, 2012:

11:26 AM Changeset [249] by meunier
Formatting of topcell and cluster files
10:57 AM Changeset [248] by meunier
Updates in the soft_filter application (bug corrections, formatting, …

Aug 8, 2012:

12:03 PM Changeset [247] by cfuguet
Introducing new CLEANUP transaction address specification in the …

Aug 6, 2012:

3:30 PM Changeset [246] by cfuguet
Bug fix in IXR_RSP FSM. Erroneous condition for the error verification

Aug 3, 2012:

7:59 PM Changeset [245] by alain
ntroducing a segmentation violation checking
12:30 PM Changeset [244] by meunier
soft_transpose update to match platform changes

Jul 31, 2012:

8:59 PM Changeset [243] by fraga
Adding platform using vci_io_bridge
8:53 PM Changeset [242] by fraga
Reparing erroneous commit
8:41 PM Changeset [241] by fraga
Adding platform using vci_io_bridge
8:18 PM Changeset [240] by fraga
Adding component vci_io_bridge

Jul 19, 2012:

3:32 PM Changeset [239] by cfuguet
Bug fix: When there is a pending write in the stage 1 of the write …
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