Timeline



Feb 19, 2013:

5:00 PM Changeset [301] by joannou
bugfix in vci_block_device_tsar_v4 : the component used a vci …
3:56 PM Changeset [300] by joannou
Moved tsar modules vci_cc_vcache_wrapper and vci_mem_cache under the …
1:07 PM Changeset [299] by alain
bug fixing: coherence interrupt must be taken in the MISS_DIR_UPDT states.
11:27 AM Changeset [298] by alain
Bug fixing in the NIC constructor
11:13 AM Changeset [297] by alain
Introducing the 3 states (EMPTY,VALID,ZOMBI) states in cache directory
11:00 AM Changeset [296] by alain
introducing major modifications in vci_cc_vcache_wrappers - remove …

Feb 14, 2013:

4:05 PM Changeset [295] by cfuguet
Introducing branches/v5/ components directory. This branch will be …
2:11 PM Changeset [294] by cfuguet
Creating branch repertory for the TSAR svn repository. Copying the …

Feb 12, 2013:

12:58 PM VirtualMemory edited by alain
(diff)

Feb 10, 2013:

2:04 PM Changeset [293] by cfuguet
Including Makefile for tsar boot loader
2:02 PM Changeset [292] by cfuguet
Changing directory structure of the TSAR boot loader. A README.txt …

Feb 6, 2013:

10:58 AM InterconnexionNetworks edited by joannou
(diff)

Feb 4, 2013:

2:12 PM Versions edited by joannou
(diff)

Jan 28, 2013:

1:59 PM Changeset [291] by joannou
Introducing new generic_llsc_local_table and generic_llsc_global_table …

Jan 25, 2013:

4:52 PM Changeset [290] by cfuguet
Erasing in the vci_mem_cache_v4 CLEANUP FSM the transition between the …

Jan 22, 2013:

5:07 PM InterconnexionNetworks edited by joannou
(diff)

Jan 21, 2013:

4:47 PM InterconnexionNetworks edited by alain
(diff)
4:25 PM CacheCoherence edited by alain
(diff)
4:24 PM CacheCoherence edited by alain
(diff)

Jan 20, 2013:

7:09 PM Changeset [289] by cfuguet
Introducing cache data ram with bit masking in the Memory Cache. The …
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