Changes between Version 11 and Version 12 of AtomicOperations


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Timestamp:
Nov 8, 2014, 6:57:13 PM (8 years ago)
Author:
alain
Comment:

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  • AtomicOperations

    v11 v12  
    1313
    1414The TSAR memory sub-system supports the LL/SC mechanism. The LL & SC commands are defined in the VCI/OCP protocol, and the LL and SC instructions must be defined in the processor Instructon Set Architecture. This is natively the case for the MIPS32 & PowerPC processors.
    15 On the direct network, the VCI CMD field can take four values : READ, WRITE, LINKED_LOAD (LL), and STORE_CONDITIONAL (SC). From a conceptual point of view, the atomicity his handled on the memory controller side (actually the memory cache controller), as the memory controllers must maintain a list of all pending atomic operations in a ''reservation table'' :
     15On the direct network, the VCI CMD field can take four values : READ, WRITE, LINKED_LOAD (LL), and STORE_CONDITIONAL (SC). From a conceptual point of view, the atomicity is handled on the memory controller side, that must maintain a list of all pending atomic operations in a ''reservation table'' :
    1616
    1717=== 2.1 General principle ===