Changes between Version 63 and Version 64 of InterconnexionNetworks

Timestamp:

Apr 15, 2013, 7:56:59 PM (11 years ago)

Author:

alain

Comment:

--

InterconnexionNetworks

@@ -15 +15 @@
 Regarding implementation, the '''Direct Network''' and the '''coherence Network''' are physically separated in each cluster, but they are only logically separated for the global communications: For the local interconnect, there is four physically separated local crossbars (or local rings) transporting the ''direct command'', ''direct response'', '' coherence L1-to-L2'', ''coherence L2-to-L1'' packets.  For the global interconnect, we use the DSPIN virtual channels: the ''direct command'' and the ''coherence L2-to-L1'' packets are multiplexed on the same 2D mesh (40 bits DSPIN flit width). Similarly, the ''direct response'' and ''coherence L1-to-L2'' packets are multiplexed on the same 2D mesh (33 bits DSPIN flit width).
 
-== 2.  VCI initiators & targets indexing on direct network ==
+== 2.  VCI initiators & targets identifiers on direct network ==
 
 On the direct network, each VCI port has an identifier that is defined by three indexes :
@@ -53 +53 @@
 10 bits. Therefore, the local index L_ID cannot use more than 4 bits, even if NL is larger than 4. 
 
-== 3. Component identification on the coherence network ==
+== 3. Component identifiers on the coherence network ==
 
 The only components connected on the coherence network are the processors (L1), and the memory
-cache controler (L2). There is NPROCS L1 components and only one L2 component per cluster.
+cache controler (L2). There is NPROCS (L1) components and only one (L2) component per cluster.
 To route a coherence packet from a source component to a destination
 component the DSPIN network uses the DEST field (left justified in the first flit of the packet).