| 4 | | * TSAR (Tera-Scale ARchitecture), coherent shared memory, manycore architecture, designed and implemented by the LIP6 laboratory. It supports commodity operating systems such as LINUX or NetBSD. A 96 cores VLSI prototype has been physically implemented by the CEA-LETI in CMOS 28nm, |
| 5 | | and the architecture can scale up to 1024 cores. |
| | 4 | * TSAR (Tera-Scale ARchitecture), coherent shared memory, manycore architecture, designed and implemented by the LIP6 laboratory. It supports commodity operating systems such as LINUX or NetBSD. A 96 cores VLSI prototype containing MIPS32 processors has been physically implemented by the CEA-LETI in CMOS 28nm, but the architecture has been designed to scale up to 1024 cores. |
