Register

Name

Reg - Easy way to instantiate a register

Synopsys

netOut <= netCk.Reg ( netIn )

Description

This method is a method of net. The net which this method is applied to is the clock of the register. The net given as parameter is the input net. The method returns a net : the output net.
Note that it is possible to change the generator instanciated with the SetReg method.

Example

class essai ( Model ) :

  def Interface ( self ) :
    self.A  = SignalIn  (  "a", 4 )
    self.S  = SignalOut (  "s", 4 )

    self.Ck = CkIn ( "ck" )
    
    self.Vdd = VddIn  ( "vdd" )
    self.Vss = VssIn  ( "vss" )
	
  def Netlist ( self ) :

    self.S <= self.Ck.Reg ( self.A )

Errors

Some errors may occur :

• [Stratus ERROR] Reg : The input net does not have a positive arity.
  The input net must have a positive arity.
• [Stratus ERROR] Reg : The clock does not have a positive arity.
  The clock must have a positive arity.

See Also

Introduction Netlist Instanciation of a multiplexor Instanciation of constants Boolean operations Arithmetical operations Comparison operations