• Digital Architectures
  • Many Cores, OS, Compilers
  • Security, Verification
  • Scientific Computing


  • Integrated Heterogeneous SoC
  • CAD & Chips, FPGA, RF
  • Reliability & Security of integrated systems
  • Free and Open Source SW, Open HW

QI Team

  • Quantum Information
  • Quantum Computation & Communication
  • Cryptography
  • Secure Quantum Networks


  • Smart Systems, Electronics
  • E-Health
  • Transport Applications

Internships, Post Doc and PhD proposals (New ! September 2022)

Go to Job Offer Software Engineer and others

Softwares Developed by ALSOC, CIAN, QI and SYEL Teams (New ! February 2022)

CORIOLIS VLSI CAD TOOLS AWARD, OSEC 2022 (Open Science European Conference), February 2022 available on MESR page

Logo Alliance
Digital CAD toolchain
Digital CAD P&R toolchain
Tera-Scale ARchitecture
Analog Design
Static Timing Analyser

Remote Access Documentation

To procedure to access remotely the network, both in text and graphic mode is described here: Master SESI / SESI Network.

My apologies to english spoken people, it has not been translated. But the meaning can mostly be deduced from the UNIX commands.

This documentation was written for the enseignement (student) network, so the names of the computer must be adapteds:

  • must became or
  • mozart must became any computer of the research network, like the server bop or your own desktop, if you have left it running up.


Marie-Minerve Louërat

Building 24-25, office 308.

Short Description

The LIP6 laboratory is a major academic contributor in the field of System on Chip. ALSOC, CIAN, QI and SYEL teams bring together a hundred people, including thirty academic staff from « Sorbonne Université» (SU) and « Centre National de la Recherche Scientifique » CNRS. Our research activities are organised into four main area:

  • Many core architectures contain hundreds or thousands of heterogeneous cores. They are studied following software aspects (data-flow modelling and co design of software and hardware), execution environments (operating systems tailored to many core architectures) and hardware architectures.
  • Structure of dynamic systems changes over time. LIP6 is studying in particular the design of low power wireless sensor networks and receivers for Software Radio. Reconfigurable architectures are also addressed by integrating them into chips and for specific applications such as cryptography.
  • Heterogeneous systems bring together, in a multi-physic context, software and digital functions, analog, MEMS and RF. The study of their modelling and simulation using SystemC-AMS and their prototyping is a transverse axis of the ALSOC, CIAN, QI and SYEL teams.
  • Security and reliability of SoC are studied: hardware verification methods based on Model-checking, the study of power supply noise and clock synchronisation are addressed. Security for mixed signal systems is carefully analyzed.

These four axis find applications in transport and health.


  • ALSOC Team - Integrated on chip multiprocessor systems, real time systems, formal verification systems and generating optimized code for a target architecture.
  • CIAN Team - architectures, methods and tools for the modelling, the simulation, the design and the security of mixed and heterogeneous circuits.
  • QI Team - Quantum Information.
  • SYEL Team - modeling performance of heterogeneous systems, signal integrity, low power wireless sensor network, software radio and e-health applications.