Changes between Version 40 and Version 41 of io_operations

Timestamp:

Jan 16, 2018, 6:45:46 PM (6 years ago)

Author:

alain

Comment:

--

io_operations

@@ -153 +153 @@
 === 1. TSAR_MIPS32 architecture ===
 
-In the TASR_MIPS32 architecture, the IOPIC external controller provides two services:
- 1. It translate each EXT_IRQ identified by its '''irq_id''' to a write transactions to a specific mailbox contained in a local LAPIC controller, for a given core in a given cluster.
+In the TSAR_MIPS32 architecture, the IOPIC is an external hardware controller providing two services:
+ 1. It translate each external IRQ identified by its '''irq_id''' to a write transactions targeting a specific mailbox contained in a local LAPIC controller, for a given core in a given cluster.
  1. It allows the kernel to selectively enable/disable any external IRQ identified by its '''irq_id''' index.
 
-The LAPIC controller (called XCU) is replicated in all clusters containing at least one core. It handle three types of event:
+In the TSAR_MIPS32 architecture, the LAPIC controller (called XCU) is replicated in all clusters containing at least one core. It handle three types of event:
  1. A '''HWI''' (Hardware Interrupt) is generated by local internal peripherals. This type implements directly the internal interrupts.
  1. A '''PTI''' (Programmable Timer Interrupt) is generated by a software programmable timer implemented in the XCU controller. This type implements directly the timer interrupts required for context switch.