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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/Parameters.cpp @ 53

Last change on this file since 53 was 53, checked in by rosiere, 17 years ago
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1	/*
2	* $Id$
3	*
4	* [ Description ]
5	*
6	*/
7
8	#include "Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/include/Parameters.h"
9	#include "Common/include/BitManipulation.h"
10
11	namespace morpheo {
12	namespace behavioural {
13	namespace generic {
14	namespace registerfile {
15	namespace registerfile_multi_banked {
16
17
18	Parameters::Parameters (uint32_t nb_port_read ,
19	uint32_t nb_port_write ,
20	uint32_t nb_word ,
21	uint32_t size_word ,
22	uint32_t nb_bank ,
23	uint32_t nb_port_read_by_bank ,
24	uint32_t nb_port_write_by_bank,
25	Tcrossbar_t crossbar ):
26	_nb_port_read (nb_port_read ),
27	_nb_port_write (nb_port_write ),
28	_nb_word (nb_word ),
29	_size_word (size_word ),
30	_nb_bank (nb_bank ),
31	_nb_port_read_by_bank (nb_port_read_by_bank ),
32	_nb_port_write_by_bank (nb_port_write_by_bank),
33	_crossbar (crossbar ),
34	_size_address (static_cast<uint32_t>(ceil(log2(_nb_word)))),
35	_size_address_by_bank (_size_address - static_cast<uint32_t>(ceil(log2(_nb_bank)))),
36
37	// Address : [....................] [size_address-1:0]
38	// Bank : [....] [size_address-1:size_address-1-log2(nb_bank)]
39	// num_reg : ]...............] [size_address-2-log2(nb_bank):0]
40	_bank_shift (_size_address_by_bank),
41	_bank_mask (gen_mask<Taddress_t>(static_cast<Taddress_t>(ceil(log2(_nb_bank))))),
42	_num_reg_shift (0),
43	_num_reg_mask (gen_mask<Taddress_t>(_size_address_by_bank)),
44	_nb_word_by_bank (_nb_word / _nb_bank)
45	{
46	log_printf(FUNC,RegisterFile_Multi_Banked,"Parameters","Begin");
47
48	if (_crossbar == PARTIAL_CROSSBAR)
49	{
50	log_printf(NONE,RegisterFile_Multi_Banked,"Parameters","Case : _crossbar == PARTIAL_CROSSBAR");
51
52	// All port_src is connected with one port_dest on each bank
53
54	_link_port_read_to_bank_read = new uint32_t [_nb_port_read ];
55	// _link_port_read_to_num_bank = new uint32_t [_nb_port_read ];
56	_link_port_write_to_bank_write = new uint32_t [_nb_port_write];
57	// _link_port_write_to_num_bank = new uint32_t [_nb_port_write];
58
59	// uint32_t _nb_port_bank_by_bank_read_port [_nb_port_read_by_bank ];
60	// uint32_t _nb_port_bank_by_bank_write_port [_nb_port_write_by_bank];
61
62	// init
63	// for (uint32_t i=0; i<_nb_port_read_by_bank ;i++)
64	// _nb_port_bank_by_bank_read_port [i] = 0;
65
66	for (uint32_t i=0; i<_nb_port_read ;i++)
67	{
68	uint32_t x = i%_nb_port_read_by_bank;
69	_link_port_read_to_bank_read [i] = x;
70	// _link_port_read_to_num_bank [i] = _nb_port_bank_by_bank_read_port [x];
71	// _nb_port_bank_by_bank_read_port [x] ++;
72	}
73
74	// init
75	// for (uint32_t i=0; i<_nb_port_write_by_bank ;i++)
76	// _nb_port_bank_by_bank_write_port [i] = 0;
77
78	for (uint32_t i=0; i<_nb_port_write ;i++)
79	{
80	uint32_t x = i%_nb_port_write_by_bank;
81	_link_port_write_to_bank_write [i] = x;
82	// _link_port_write_to_num_bank [i] = _nb_port_bank_by_bank_write_port [x];
83	// _nb_port_bank_by_bank_write_port [x] ++;
84	}
85
86
87	log_printf(NONE,RegisterFile_Multi_Banked,"Parameters"," * _link_port_read_to_bank_read");
88	for (uint32_t i=0; i<_nb_port_read ;i++)
89	log_printf(NONE,RegisterFile_Multi_Banked,"Parameters"," * Read in [%d] to out [%d]",i,_link_port_read_to_bank_read [i]);
90	// log_printf(NONE,RegisterFile_Multi_Banked,"Parameters"," * _link_port_read_to_num_bank ");
91	// for (uint32_t i=0; i<_nb_port_read ;i++)
92	// log_printf(NONE,RegisterFile_Multi_Banked,"Parameters"," * Read in [%d] to bank [%d]",i,_link_port_read_to_num_bank [i]);
93
94	log_printf(NONE,RegisterFile_Multi_Banked,"Parameters"," * _link_port_write_to_bank_write");
95	for (uint32_t i=0; i<_nb_port_write ;i++)
96	log_printf(NONE,RegisterFile_Multi_Banked,"Parameters"," * Write in [%d] to out [%d]",i,_link_port_write_to_bank_write [i]);
97	// log_printf(NONE,RegisterFile_Multi_Banked,"Parameters"," * _link_port_write_to_num_bank ");
98	// for (uint32_t i=0; i<_nb_port_write ;i++)
99	// log_printf(NONE,RegisterFile_Multi_Banked,"Parameters"," * Write in [%d] to bank [%d]",i,_link_port_write_to_num_bank [i]);
100	}
101	// else : don't allocate
102
103	test();
104	log_printf(FUNC,RegisterFile_Multi_Banked,"Parameters","End");
105	};
106
107	Parameters::Parameters (Parameters & param):
108	_nb_port_read (param._nb_port_read ),
109	_nb_port_write (param._nb_port_write ),
110	_nb_word (param._nb_word ),
111	_size_word (param._size_word ),
112	_nb_bank (param._nb_bank ),
113	_nb_port_read_by_bank (param._nb_port_read_by_bank ),
114	_nb_port_write_by_bank (param._nb_port_write_by_bank),
115	_crossbar (param._crossbar ),
116	_size_address (param._size_address ),
117	_size_address_by_bank (param._size_address_by_bank ),
118	_bank_shift (param._bank_shift ),
119	_bank_mask (param._bank_mask ),
120	_num_reg_shift (param._num_reg_shift ),
121	_num_reg_mask (param._num_reg_mask ),
122	_nb_word_by_bank (param._nb_word_by_bank )
123	{
124	log_printf(FUNC,RegisterFile_Multi_Banked,"Parameters (copy)","Begin");
125
126	if (_crossbar == PARTIAL_CROSSBAR)
127	{
128	// All port_src is connected with one port_dest on each bank
129
130	_link_port_read_to_bank_read = new uint32_t [_nb_port_read ];
131	// _link_port_read_to_num_bank = new uint32_t [_nb_port_read ];
132	_link_port_write_to_bank_write = new uint32_t [_nb_port_write];
133	// _link_port_write_to_num_bank = new uint32_t [_nb_port_write];
134
135	for (uint32_t i=0; i<_nb_port_read ;i++)
136	{
137	_link_port_read_to_bank_read [i] = param._link_port_read_to_bank_read [i];
138	// _link_port_read_to_num_bank [i] = param._link_port_read_to_num_bank [i];
139	}
140	for (uint32_t i=0; i<_nb_port_write ;i++)
141	{
142	_link_port_write_to_bank_write [i] = param._link_port_write_to_bank_write [i];
143	// _link_port_write_to_num_bank [i] = param._link_port_write_to_num_bank [i];
144	}
145	}
146
147	test();
148	log_printf(FUNC,RegisterFile_Multi_Banked,"Parameters (copy)","End");
149	};
150
151	Parameters::~Parameters ()
152	{
153	log_printf(FUNC,RegisterFile_Multi_Banked,"~Parameters","Begin");
154
155	if (_crossbar == PARTIAL_CROSSBAR)
156	{
157	delete [] _link_port_read_to_bank_read ;
158	// delete [] _link_port_read_to_num_bank ;
159	delete [] _link_port_write_to_bank_write ;
160	// delete [] _link_port_write_to_num_bank ;
161	}
162	log_printf(FUNC,RegisterFile_Multi_Banked,"~Parameters","End");
163	};
164
165	}; // end namespace registerfile_multi_banked
166	}; // end namespace registerfile
167	}; // end namespace generic
168
169	}; // end namespace behavioural
170	}; // end namespace morpheo

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