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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/src/test.cpp @ 3

Last change on this file since 3 was 3, checked in by kane, 17 years ago

1) Ajout d'un "printer" XML pour la configuration de paramètres

2) Fin du composant "Two_Level_Branch_Predictor"

validation * systemc

vhdl

File size: 11.2 KB

Line
1	/*
2	* $Id$
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#define NB_ITERATION 512
10
11	#include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/include/test.h"
12	#include "Include/Test.h"
13	#include "Include/BitManipulation.h"
14	void test (string name,
15	morpheo::behavioural::stage_1_ifetch::predictor::meta_predictor::two_level_branch_predictor::Parameters param)
16	{
17	cout << "<" << name << "> : Simulation SystemC" << endl;
18
19	Two_Level_Branch_Predictor * _Two_Level_Branch_Predictor = new Two_Level_Branch_Predictor (name.c_str(),
20	#ifdef STATISTICS
21	morpheo::behavioural::Parameters_Statistics(5,50),
22	#endif
23	param);
24
25	#ifdef SYSTEMC
26
27	/*********************************************************************
28	* Déclarations des signaux
29	*********************************************************************/
30	sc_clock * CLOCK;
31
32	sc_signal<Tcontrol_t> * PREDICT_VAL [param._nb_prediction];
33	sc_signal<Tcontrol_t> * PREDICT_ACK [param._nb_prediction];
34	sc_signal<Taddress_t> * PREDICT_ADDRESS [param._nb_prediction];
35	sc_signal<Tbht_history_t> * PREDICT_BHT_HISTORY [param._nb_prediction];
36	sc_signal<Tpht_history_t> * PREDICT_PHT_HISTORY [param._nb_prediction];
37
38	sc_signal<Tcontrol_t> * BRANCH_COMPLETE_VAL [param._nb_branch_complete];
39	sc_signal<Tcontrol_t> * BRANCH_COMPLETE_ACK [param._nb_branch_complete];
40	sc_signal<Taddress_t> * BRANCH_COMPLETE_ADDRESS [param._nb_branch_complete];
41	sc_signal<Tbht_history_t> * BRANCH_COMPLETE_BHT_HISTORY [param._nb_branch_complete];
42	sc_signal<Tpht_history_t> * BRANCH_COMPLETE_PHT_HISTORY [param._nb_branch_complete];
43	sc_signal<Tcontrol_t> * BRANCH_COMPLETE_DIRECTION [param._nb_branch_complete];
44
45	// Rename signal
46
47	string rename;
48
49	CLOCK = new sc_clock ("clock", 1.0, 0.5);
50
51	for (uint32_t i=0; i<param._nb_prediction; i++)
52	{
53	rename = "PREDICT_VAL_" +toString(i);
54	PREDICT_VAL [i] = new sc_signal<Tcontrol_t> (rename.c_str());
55	rename = "PREDICT_ACK_" +toString(i);
56	PREDICT_ACK [i] = new sc_signal<Tcontrol_t> (rename.c_str());
57	rename = "PREDICT_ADDRESS_" +toString(i);
58	PREDICT_ADDRESS [i] = new sc_signal<Taddress_t> (rename.c_str());
59	rename = "PREDICT_BHT_HISTORY_"+toString(i);
60	PREDICT_BHT_HISTORY [i] = new sc_signal<Tbht_history_t> (rename.c_str());
61	rename = "PREDICT_PHT_HISTORY_"+toString(i);
62	PREDICT_PHT_HISTORY [i] = new sc_signal<Tpht_history_t> (rename.c_str());
63	}
64
65	for (uint32_t i=0; i<param._nb_branch_complete; i++)
66	{
67	rename = "BRANCH_COMPLETE_VAL_" +toString(i);
68	BRANCH_COMPLETE_VAL [i] = new sc_signal<Tcontrol_t> (rename.c_str());
69	rename = "BRANCH_COMPLETE_ACK_" +toString(i);
70	BRANCH_COMPLETE_ACK [i] = new sc_signal<Tcontrol_t> (rename.c_str());
71	rename = "BRANCH_COMPLETE_ADDRESS_" +toString(i);
72	BRANCH_COMPLETE_ADDRESS [i] = new sc_signal<Taddress_t> (rename.c_str());
73	rename = "BRANCH_COMPLETE_BHT_HISTORY_"+toString(i);
74	BRANCH_COMPLETE_BHT_HISTORY [i] = new sc_signal<Tbht_history_t> (rename.c_str());
75	rename = "BRANCH_COMPLETE_PHT_HISTORY_"+toString(i);
76	BRANCH_COMPLETE_PHT_HISTORY [i] = new sc_signal<Tpht_history_t> (rename.c_str());
77	rename = "BRANCH_COMPLETE_DIRECTION_" +toString(i);
78	BRANCH_COMPLETE_DIRECTION [i] = new sc_signal<Tcontrol_t> (rename.c_str());
79	}
80
81	/********************************************************
82	* Instanciation
83	********************************************************/
84
85	cout << "<" << name << "> Instanciation of _Two_Level_Branch_Predictor" << endl;
86
87	((_Two_Level_Branch_Predictor->in_CLOCK)) ((CLOCK));
88
89	for (uint32_t i=0; i<param._nb_prediction; i++)
90	{
91	((_Two_Level_Branch_Predictor-> in_PREDICT_VAL [i])) ((PREDICT_VAL [i]));
92	((_Two_Level_Branch_Predictor->out_PREDICT_ACK [i])) ((PREDICT_ACK [i]));
93	((_Two_Level_Branch_Predictor-> in_PREDICT_ADDRESS [i])) ((PREDICT_ADDRESS [i]));
94	if (param._have_bht)
95	((_Two_Level_Branch_Predictor->out_PREDICT_BHT_HISTORY [i])) ((PREDICT_BHT_HISTORY [i]));
96	if (param._have_pht)
97	((_Two_Level_Branch_Predictor->out_PREDICT_PHT_HISTORY [i])) ((PREDICT_PHT_HISTORY [i]));
98	}
99
100	for (uint32_t i=0; i<param._nb_branch_complete; i++)
101	{
102	((_Two_Level_Branch_Predictor-> in_BRANCH_COMPLETE_VAL [i])) ((BRANCH_COMPLETE_VAL [i]));
103	((_Two_Level_Branch_Predictor->out_BRANCH_COMPLETE_ACK [i])) ((BRANCH_COMPLETE_ACK [i]));
104	((_Two_Level_Branch_Predictor-> in_BRANCH_COMPLETE_ADDRESS [i])) ((BRANCH_COMPLETE_ADDRESS [i]));
105	if (param._have_bht)
106	((_Two_Level_Branch_Predictor-> in_BRANCH_COMPLETE_BHT_HISTORY [i])) ((BRANCH_COMPLETE_BHT_HISTORY [i]));
107	if (param._have_pht)
108	((_Two_Level_Branch_Predictor-> in_BRANCH_COMPLETE_PHT_HISTORY [i])) ((BRANCH_COMPLETE_PHT_HISTORY [i]));
109	((_Two_Level_Branch_Predictor-> in_BRANCH_COMPLETE_DIRECTION [i])) ((BRANCH_COMPLETE_DIRECTION [i]));
110	}
111
112	/********************************************************
113	* Simulation - Begin
114	********************************************************/
115
116	cout << "<" << name << "> Start Simulation ............" << endl;
117	// Initialisation
118
119	const uint32_t seed = 0;
120	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
121
122	srand(seed);
123
124	const uint32_t num_port_predict = rand()%param._nb_prediction;
125	const uint32_t num_port_branch_complete = rand()%param._nb_branch_complete;
126	const Taddress_t address = rand()%param._size_address;
127	Tcontrol_t direction;
128
129	sc_start(0);
130
131	for (uint32_t i=0; i<param._nb_prediction; i++)
132	PREDICT_VAL [i]->write(0);
133	for (uint32_t i=0; i<param._nb_branch_complete; i++)
134	BRANCH_COMPLETE_VAL [i]->write(0);
135
136	_Two_Level_Branch_Predictor->vhdl_testbench_label("Initialisation");
137	cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Initialisation" << endl;
138
139	// Step 1
140	BRANCH_COMPLETE_VAL [num_port_branch_complete]->write(1);
141	BRANCH_COMPLETE_DIRECTION [num_port_branch_complete]->write(0);
142
143	if (param._have_pht)
144	{
145	// Step 1.1 -> pattern_history_table
146
147	// Step 1.1.1 compute number of group.
148	uint32_t size_address_shift=0;
149
150	if (param._have_bht)
151	size_address_shift=param._param_two_level_branch_predictor_glue->_pht_size_address_shift;
152
153	uint32_t nb_group = (1<<size_address_shift);
154	uint32_t nb_reg_by_group = (1<<(param._pht_size_address-size_address_shift));
155
156	_Two_Level_Branch_Predictor->vhdl_testbench_label("Init pht");
157	cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Init pht" << endl;
158
159	BRANCH_COMPLETE_PHT_HISTORY [num_port_branch_complete]->write(0);
160
161	// Step 1.1.2 for all group ...
162	for (uint32_t i=0; i<nb_group; i++)
163	{
164	if (param._have_bht)
165	BRANCH_COMPLETE_BHT_HISTORY [num_port_branch_complete]->write(i);
166
167	for (uint32_t j=0; j<nb_reg_by_group; j++)
168	{
169	BRANCH_COMPLETE_ADDRESS [num_port_branch_complete]->write(j);
170
171	sc_start(1);
172
173	// wait ackwolegde
174	while (BRANCH_COMPLETE_ACK [num_port_branch_complete] -> read() == 0)
175	sc_start(1);
176	}
177	}
178	}
179
180	if (param._have_bht)
181	{
182	// Step 1.2 -> branch_history_table
183	BRANCH_COMPLETE_BHT_HISTORY [num_port_branch_complete]->write(0);
184
185	_Two_Level_Branch_Predictor->vhdl_testbench_label("Init bht");
186	cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Init bht" << endl;
187
188	for (uint32_t i=0; i<param._bht_nb_shifter; i++)
189	{
190	BRANCH_COMPLETE_ADDRESS [num_port_branch_complete]->write(i);
191
192	sc_start(1);
193	}
194
195	// wait ackwolegde
196	while (BRANCH_COMPLETE_ACK [num_port_branch_complete] -> read() == 0)
197	sc_start(1);
198	}
199
200	// Step 2
201	BRANCH_COMPLETE_VAL [num_port_branch_complete]->write(0);
202	PREDICT_ADDRESS [num_port_predict ]->write(address);
203	BRANCH_COMPLETE_ADDRESS [num_port_branch_complete]->write(address);
204
205	_Two_Level_Branch_Predictor->vhdl_testbench_label("Loop of Test");
206	cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Loop of Test" << endl
207	<< " * predict_address : " << hex << address << dec << endl;
208
209	// A lot of prediction
210	Tbht_history_t bht_history = 0;
211	Tpht_history_t pht_history [1<<param._bht_size_shifter];
212
213	for (uint32_t i=0; i<static_cast<uint32_t>(1<<param._bht_size_shifter); i++)
214	pht_history [i] = 0;
215
216	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
217	{
218	_Two_Level_Branch_Predictor->vhdl_testbench_label("Iteration "+toString(iteration));
219
220	cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Predict : bht_history " << bht_history << " - pht_history " << pht_history[bht_history] << endl;
221
222	// Ask a new prediction
223	PREDICT_VAL [num_port_predict ]->write(1);
224
225	sc_start(1);
226
227	// wait ackwolegde
228	while (PREDICT_ACK [num_port_predict] -> read() == 0)
229	sc_start(1);
230	PREDICT_ACK [num_port_predict ]->write(0);
231
232	sc_start(0);
233
234	// Test
235	if (param._have_bht)
236	TEST(Tbht_history_t,bht_history ,PREDICT_BHT_HISTORY[num_port_predict]->read());
237	if (param._have_pht)
238	TEST(Tpht_history_t,pht_history[bht_history],PREDICT_PHT_HISTORY[num_port_predict]->read());
239
240	// update
241	direction = ((rand()%2)==1);
242
243	BRANCH_COMPLETE_VAL [num_port_branch_complete]->write(1);
244	if (param._have_bht)
245	BRANCH_COMPLETE_BHT_HISTORY [num_port_branch_complete]->write(bht_history );
246
247
248	if (param._have_pht)
249	BRANCH_COMPLETE_PHT_HISTORY [num_port_branch_complete]->write(pht_history[bht_history]);
250	BRANCH_COMPLETE_DIRECTION [num_port_branch_complete]->write(direction);
251
252	if (param._have_pht)
253	if (direction == 0)
254	{
255	if (pht_history[bht_history] > 0)
256	pht_history[bht_history] --;
257	}
258	else
259	{
260	if (pht_history[bht_history] < (static_cast<Tpht_history_t>(1<<param._pht_size_counter)-1))
261	pht_history[bht_history] ++;
262	}
263
264	if (param._have_bht)
265	bht_history = (((bht_history) << 1) \| direction) & gen_mask<Tbht_history_t>(param._bht_size_shifter);
266
267	sc_start(1);
268
269	// wait ackwolegde
270	while (BRANCH_COMPLETE_ACK [num_port_branch_complete] -> read() == 0)
271	sc_start(1);
272
273	BRANCH_COMPLETE_VAL [num_port_branch_complete]->write(0);
274	}
275
276	/********************************************************
277	* Simulation - End
278	********************************************************/
279
280	cout << "<" << name << "> ............ Stop Simulation" << endl;
281
282	#endif
283
284	delete _Two_Level_Branch_Predictor;
285	}

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