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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h @ 135

Last change on this file since 135 was 135, checked in by rosiere, 15 years ago
1) Add Vhdl component 2) Inhib VHDL Seltest interface
Property svn:keywords set to `Id`
File size: 69.1 KB

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1	#ifndef morpheo_behavioural_Allocation_h
2	#define morpheo_behavioural_Allocation_h
3
4	/*
5	* $Id: Allocation.h 135 2009-07-17 08:59:05Z rosiere $
6	*
7	* [ Description ]
8	*
9	*/
10
11	#include "Common/include/Debug.h"
12
13	// ======================================================================
14	// =====[ ALLOCATION / DELETE of ARRAY ]=================================
15	// ======================================================================
16	#define ALLOC0(var,type) \
17	do \
18	{ \
19	var = new type; \
20	} while (0)
21
22	#define ALLOC1(var,type,s1) \
23	do \
24	{ \
25	var = new type [s1]; \
26	} while (0)
27
28	#define ALLOC2(var,type,s1,s2) \
29	do \
30	{ \
31	var = new type * [s1]; \
32	for (uint32_t it1=0; it1<s1; ++it1) \
33	{ \
34	var [it1] = new type [s2]; \
35	} \
36	} while (0)
37
38	#define ALLOC3(var,type,s1,s2,s3) \
39	do \
40	{ \
41	var = new type ** [s1]; \
42	for (uint32_t it1=0; it1<s1; ++it1) \
43	{ \
44	var [it1] = new type * [s2]; \
45	for (uint32_t it2=0; it2<s2; ++it2) \
46	{ \
47	var [it1][it2] = new type [s3]; \
48	} \
49	} \
50	} while (0)
51
52	#define ALLOC4(var,type,s1,s2,s3,s4) \
53	do \
54	{ \
55	var = new type *** [s1]; \
56	for (uint32_t it1=0; it1<s1; ++it1) \
57	{ \
58	var [it1] = new type ** [s2]; \
59	for (uint32_t it2=0; it2<s2; ++it2) \
60	{ \
61	var [it1][it2] = new type * [s3]; \
62	for (uint32_t it3=0; it3<s3; ++it3) \
63	{ \
64	var [it1][it2][it3] = new type [s4]; \
65	} \
66	} \
67	} \
68	} while (0)
69
70	#define DELETE0(var) \
71	do \
72	{ \
73	delete var; \
74	} while (0)
75
76	#define DELETE1(var,s1) \
77	do \
78	{ \
79	delete [] var; \
80	} while (0)
81
82	#define DELETE2(var,s1,s2) \
83	do \
84	{ \
85	for (uint32_t it1=0; it1<s1; ++it1) \
86	{ \
87	delete [] var [it1]; \
88	} \
89	delete [] var; \
90	} while (0)
91
92	#define DELETE3(var,s1,s2,s3) \
93	do \
94	{ \
95	for (uint32_t it1=0; it1<s1; ++it1) \
96	{ \
97	for (uint32_t it2=0; it2<s2; ++it2) \
98	{ \
99	delete [] var [it1][it2]; \
100	} \
101	delete [] var [it1]; \
102	} \
103	delete [] var; \
104	} while (0)
105
106	#define DELETE4(var,s1,s2,s3,s4) \
107	do \
108	{ \
109	for (uint32_t it1=0; it1<s1; ++it1) \
110	{ \
111	for (uint32_t it2=0; it2<s2; ++it2) \
112	{ \
113	for (uint32_t it3=0; it3<s3; ++it3) \
114	{ \
115	delete [] var [it1][it2][it3]; \
116	} \
117	delete [] var [it1][it2]; \
118	} \
119	delete [] var [it1]; \
120	} \
121	delete [] var; \
122	} while (0)
123
124	// ======================================================================
125	// =====[ ALLOCATION / DELETE of SIGNAL]=================================
126	// ======================================================================
127
128	// Help to allocate interface
129	#define INTERFACE_PRINT(name) log_printf(TRACE,Allocation,FUNCTION,"<%s> : Interface's creation : %s (%s, %d)",_name.c_str(),name,__FILE__,__LINE__);
130	#define PRINT_SIGNAL_ADDRESS(name,address) log_printf(TRACE,Allocation,FUNCTION,"Signal : %s 0x%.8x(%s, %d)",name,(uint32_t)((uint64_t)(address)),__FILE__,__LINE__);
131	#define PRINT_SIZE_NUL(component,interface,signal) log_printf(TRACE,Allocation,FUNCTION,_("<%s> %s.%s.%s : size is nul."),_name.c_str(),component->get_name().c_str(),interface->get_name().c_str(),signal);
132	#define TEST_SIGNAL(name,address) PRINT_SIGNAL_ADDRESS(name,address); TEST_PTR(address)
133	#define INSTANCE_FOREIGN_PRINT(name) log_printf(TRACE,Allocation,FUNCTION,"<%s> : %s (%s, %d)",_name.c_str(),name,__FILE__,__LINE__);
134
135	// ----------------------------------------------------------------------
136	// -----[ NO ITERATION ]-------------------------------------------------
137	// ----------------------------------------------------------------------
138
139	#define __ALLOC0_SIGNAL(sig, name, type) \
140	do \
141	{ \
142	sig = new type (name); \
143	} while (0)
144
145	#ifdef POSITION
146	#define ALLOC0_INTERFACE_BEGIN( name, direction, localisation, str) \
147	INTERFACE_PRINT(name); \
148	morpheo::behavioural::Interface_fifo * interface = _interfaces->set_interface( name, direction, localisation, str);
149	#else
150	#define ALLOC0_INTERFACE_BEGIN( name, direction, localisation, str) \
151	INTERFACE_PRINT(name); \
152	morpheo::behavioural::Interface_fifo * interface = _interfaces->set_interface( name);
153	#endif
154
155	#define ALLOC0_INTERFACE_END()
156
157	#ifdef VHDL_TESTBENCH
158	#define INTERFACE0_TEST(value) \
159	do \
160	{ \
161	interface->make_testbench(value); \
162	} while(0)
163	#else
164	#define INTERFACE0_TEST(value)
165	#endif
166
167	#define ALLOC0_VAL_ACK_IN( sig, name, type) \
168	do \
169	{ \
170	sig = interface->set_signal_valack_in (name, type); \
171	} while (0)
172
173	#define ALLOC0_VAL_ACK_OUT( sig, name, type) \
174	do \
175	{ \
176	sig = interface->set_signal_valack_out(name, type); \
177	} while (0)
178
179	#define ALLOC0_VALACK_IN( sig, type) \
180	do \
181	{ \
182	sig = interface->set_signal_valack_in (type); \
183	} while (0)
184
185	#define ALLOC0_VALACK_OUT( sig, type) \
186	do \
187	{ \
188	sig = interface->set_signal_valack_out(type); \
189	} while (0)
190
191	#define ALLOC0_SIGNAL_IN( sig, name, type, size) \
192	do \
193	{ \
194	if (size > 0) \
195	{ \
196	sig = interface->set_signal_in <type> (name, size); \
197	} \
198	else \
199	{ \
200	PRINT_SIZE_NUL(_component,interface,name); \
201	} \
202	} while (0)
203
204	#define ALLOC0_SIGNAL_OUT( sig, name, type, size) \
205	do \
206	{ \
207	if (size > 0) \
208	{ \
209	sig = interface->set_signal_out<type> (name, size); \
210	} \
211	else \
212	{ \
213	PRINT_SIZE_NUL(_component,interface,name); \
214	} \
215	} while (0)
216
217	#define DELETE0_SIGNAL( sig, size) \
218	do \
219	{ \
220	if (size > 0) \
221	{ \
222	delete sig; \
223	} \
224	} while (0)
225
226	#define ALLOC0_FOREIGN_SIGNAL_IN( sig, interface, name, type, size) \
227	do \
228	{ \
229	if (size > 0) \
230	{ \
231	std::string str = (toString("in")+"_"+((interface!="")?(toString(interface)+"_"):toString(""))+toString(name)); \
232	sig = new SC_IN (type) (str.c_str()); \
233	} \
234	} while (0)
235
236	#define ALLOC0_FOREIGN_SIGNAL_OUT( sig, interface, name, type, size) \
237	do \
238	{ \
239	if (size > 0) \
240	{ \
241	std::string str = (toString("out")+"_"+((interface!="")?(toString(interface)+"_"):toString(""))+toString(name)); \
242	sig = new SC_OUT (type) (str.c_str()); \
243	} \
244	} while (0)
245
246	#define DELETE0_FOREIGN_SIGNAL( sig, size) \
247	do \
248	{ \
249	DELETE0_SIGNAL(sig,size); \
250	} while (0)
251
252	#define INSTANCE0_FOREIGN_SIGNAL(component, sig, type, name, size) \
253	do \
254	{ \
255	if (size > 0) \
256	{ \
257	INSTANCE_FOREIGN_PRINT(name); \
258	_component->set_sc_signal<type>(_name,name,static_cast<void*>(component->sig)); \
259	} \
260	} while (0)
261
262	#define ALLOC0_SC_SIGNAL( sig, name, type) \
263	do \
264	{ \
265	sig = new sc_signal<type> (name); \
266	PRINT_SIGNAL_ADDRESS(name,sig); \
267	} while (0)
268
269	#define INSTANCE0_SC_SIGNAL(component, sig) \
270	do \
271	{ \
272	TEST_SIGNAL(component->sig->name(),component->sig); \
273	TEST_SIGNAL(sig ->name(),sig); \
274	((component->sig)) ((sig)); \
275	} while (0)
276
277	#define _INSTANCE0_SC_SIGNAL(component, sig1,sig2) \
278	do \
279	{ \
280	TEST_SIGNAL(component->sig1->name(),component->sig1); \
281	TEST_SIGNAL(sig2 ->name(),sig2); \
282	((component->sig1)) ((sig2)); \
283	} while (0)
284
285	#define DELETE0_SC_SIGNAL( sig) \
286	do \
287	{ \
288	PRINT_SIGNAL_ADDRESS("",sig); \
289	delete sig; \
290	} while (0)
291
292	// ----------------------------------------------------------------------
293	// -----[ ITERATION 1 ]--------------------------------------------------
294	// ----------------------------------------------------------------------
295
296	#define __ALLOC1_INTERFACE_BEGIN(name, x1) \
297	INTERFACE_PRINT(name); \
298	const std::string interface_name = name; \
299	const uint32_t iterator_1 = x1;
300
301	#define __ALLOC1_INTERFACE_END(x1)
302
303	#define __ALLOC1_SIGNAL_IN( sig, name, type) \
304	do \
305	{ \
306	sig = new SC_IN(type) * [iterator_1]; \
307	std::string separator="_"; \
308	for (uint32_t it1=0; it1<iterator_1; it1++) \
309	{ \
310	std::string str = "in_"+interface_name+separator+toString(it1)+separator+name; \
311	sig [it1] = new SC_IN(type) (str.c_str()); \
312	} \
313	} while (0)
314
315
316	#define __ALLOC1_SIGNAL_OUT( sig, name, type) \
317	do \
318	{ \
319	sig = new SC_OUT(type) * [iterator_1]; \
320	std::string separator="_"; \
321	for (uint32_t it1=0; it1<iterator_1; it1++) \
322	{ \
323	std::string str = "out_"+interface_name+separator+toString(it1)+separator+name; \
324	sig [it1] = new SC_OUT(type) (str.c_str()); \
325	} \
326	} while (0)
327
328	#ifdef POSITION
329	#define ALLOC1_INTERFACE_BEGIN( name, direction, localisation, str, x1) \
330	INTERFACE_PRINT(name); \
331	uint32_t iterator_1 = 0; \
332	morpheo::behavioural::Interface_fifo ** interface; \
333	{ \
334	std::string separator="_"; \
335	iterator_1 = x1; \
336	interface = new morpheo::behavioural::Interface_fifo * [iterator_1]; \
337	for (uint32_t it1=0; it1<iterator_1; it1++) \
338	{ \
339	interface [it1] = _interfaces->set_interface( name+separator+toString(it1), direction, localisation, str); \
340	} \
341	}
342	#else
343	#define ALLOC1_INTERFACE_BEGIN( name, direction, localisation, str, x1) \
344	INTERFACE_PRINT(name); \
345	uint32_t iterator_1 = 0; \
346	morpheo::behavioural::Interface_fifo ** interface; \
347	{ \
348	std::string separator="_"; \
349	iterator_1 = x1; \
350	interface = new morpheo::behavioural::Interface_fifo * [iterator_1]; \
351	for (uint32_t it1=0; it1<iterator_1; it1++) \
352	{ \
353	interface [it1] = _interfaces->set_interface( name+separator+toString(it1)); \
354	} \
355	}
356	#endif
357
358	#define ALLOC1_INTERFACE_END(x1) \
359	do \
360	{ \
361	delete [] interface; \
362	} while (0)
363
364	#ifdef VHDL_TESTBENCH
365	#define INTERFACE1_TEST(value,x1) \
366	do \
367	{ \
368	for (uint32_t it1=0; it1<x1; it1++) \
369	interface [it1]->make_testbench(value); \
370	} while(0)
371	#else
372	#define INTERFACE1_TEST(value,x1)
373	#endif
374
375	#define ALLOC1_VAL_ACK_IN( sig, name, type) \
376	do \
377	{ \
378	sig = new SC_IN (Tcontrol_t) * [iterator_1]; \
379	for (uint32_t it1=0; it1<iterator_1; it1++) \
380	{ \
381	sig [it1] = interface[it1]->set_signal_valack_in (name, type); \
382	} \
383	} while (0)
384
385	#define ALLOC1_VAL_ACK_OUT(sig, name, type) \
386	do \
387	{ \
388	sig = new SC_OUT(Tcontrol_t) * [iterator_1]; \
389	for (uint32_t it1=0; it1<iterator_1; it1++) \
390	{ \
391	sig [it1] = interface[it1]->set_signal_valack_out(name, type); \
392	} \
393	} while (0)
394
395	#define ALLOC1_VALACK_IN( sig, type) \
396	do \
397	{ \
398	sig = new SC_IN (Tcontrol_t) * [iterator_1]; \
399	for (uint32_t it1=0; it1<iterator_1; it1++) \
400	{ \
401	sig [it1] = interface[it1]->set_signal_valack_in (type); \
402	} \
403	} while (0)
404
405	#define ALLOC1_VALACK_OUT( sig, type) \
406	do \
407	{ \
408	sig = new SC_OUT(Tcontrol_t) * [iterator_1]; \
409	for (uint32_t it1=0; it1<iterator_1; it1++) \
410	{ \
411	sig [it1] = interface[it1]->set_signal_valack_out(type); \
412	} \
413	} while (0)
414
415	#define ALLOC1_SIGNAL_IN( sig, name, type, size) \
416	do \
417	{ \
418	sig = new SC_IN (type) * [iterator_1]; \
419	for (uint32_t it1=0; it1<iterator_1; it1++) \
420	{ \
421	if (size > 0) \
422	{ \
423	sig [it1] = interface[it1]->set_signal_in <type> (name, size); \
424	} \
425	else \
426	{ \
427	PRINT_SIZE_NUL(_component,interface[it1],name); \
428	} \
429	} \
430	} while (0)
431
432	#define ALLOC1_SIGNAL_OUT(sig, name, type, size) \
433	do \
434	{ \
435	sig = new SC_OUT(type) * [iterator_1]; \
436	for (uint32_t it1=0; it1<iterator_1; it1++) \
437	{ \
438	if (size > 0) \
439	{ \
440	sig [it1] = interface[it1]->set_signal_out<type> (name, size); \
441	} \
442	else \
443	{ \
444	PRINT_SIZE_NUL(_component,interface[it1],name); \
445	} \
446	} \
447	} while (0)
448
449	#define DELETE1_SIGNAL(sig, x1, size) \
450	do \
451	{ \
452	for (uint32_t it1=0; it1<x1; it1++) \
453	{ \
454	if (size > 0) \
455	{ \
456	delete sig[it1]; \
457	} \
458	} \
459	delete [] sig; \
460	} while (0)
461
462	#define ALLOC1_FOREIGN_SIGNAL_IN(sig, interface, name, type, size,x1) \
463	do \
464	{ \
465	sig = new SC_IN (type) * [x1]; \
466	for (uint32_t it1=0; it1<x1; it1++) \
467	if (size > 0) \
468	{ \
469	std::string str = (toString("in")+"_"+((interface!="")?(toString(interface)+"_"):toString(""))+toString(it1)+"_"+toString(name)); \
470	sig [it1] = new SC_IN (type) (str.c_str()); \
471	} \
472	} while (0)
473
474	#define ALLOC1_FOREIGN_SIGNAL_OUT(sig, interface, name, type, size,x1) \
475	do \
476	{ \
477	sig = new SC_OUT (type) * [x1]; \
478	for (uint32_t it1=0; it1<x1; it1++) \
479	if (size > 0) \
480	{ \
481	std::string str = (toString("out")+"_"+((interface!="")?(toString(interface)+"_"):toString(""))+toString(it1)+"_"+toString(name)); \
482	sig [it1] = new SC_OUT (type) (str.c_str()); \
483	} \
484	} while (0)
485
486	#define DELETE1_FOREIGN_SIGNAL( sig, size,x1) \
487	do \
488	{ \
489	DELETE1_SIGNAL(sig,x1,size); \
490	} while (0)
491
492	#define ALLOC1_SC_SIGNAL( sig, name, type, x1) \
493	do \
494	{ \
495	sig = new sc_signal<type> * [x1]; \
496	{ \
497	std::string separator="_"; \
498	std::string str; \
499	for (uint32_t it1=0; it1<x1; it1++) \
500	{ \
501	str = name+separator+toString(it1); \
502	sig [it1] = new sc_signal<type> (str.c_str()); \
503	PRINT_SIGNAL_ADDRESS(str.c_str(),sig[it1]); \
504	} \
505	} \
506	} while (0)
507
508	#define INSTANCE1_SC_SIGNAL(component, sig, x1) \
509	do \
510	{ \
511	for (uint32_t it1=0; it1<x1; it1++) \
512	{ \
513	TEST_SIGNAL(component->sig [it1]->name(),component->sig [it1]); \
514	TEST_SIGNAL(sig [it1]->name(),sig [it1]); \
515	((component->sig[it1])) ((sig[it1])); \
516	} \
517	} while (0)
518
519	#define _INSTANCE1_SC_SIGNAL(component, sig1, sig2, x1) \
520	do \
521	{ \
522	for (uint32_t it1=0; it1<x1; it1++) \
523	{ \
524	TEST_SIGNAL(component->sig1 [it1]->name(),component->sig1 [it1]); \
525	TEST_SIGNAL(sig2 [it1]->name(),sig2 [it1]); \
526	((component->sig1[it1])) ((sig2[it1])); \
527	} \
528	} while (0)
529
530	#define DELETE1_SC_SIGNAL(sig, x1) \
531	do \
532	{ \
533	for (uint32_t it1=0; it1<x1; it1++) \
534	{ \
535	PRINT_SIGNAL_ADDRESS("",sig[it1]); \
536	delete sig[it1]; \
537	} \
538	delete [] sig; \
539	} while (0)
540
541	// ----------------------------------------------------------------------
542	// -----[ ITERATION 2 ]--------------------------------------------------
543	// ----------------------------------------------------------------------
544
545	#ifdef POSITION
546	#define ALLOC2_INTERFACE_BEGIN( name, direction, localisation, str, x1, x2) \
547	INTERFACE_PRINT(name); \
548	uint32_t iterator_1 = 0; \
549	uint32_t iterator_2 = 0; \
550	morpheo::behavioural::Interface_fifo *** interface; \
551	{ \
552	std::string separator="_"; \
553	iterator_1 = x1; \
554	interface = new morpheo::behavioural::Interface_fifo ** [iterator_1]; \
555	for (uint32_t it1=0; it1<iterator_1; it1++) \
556	{ \
557	iterator_2 = x2; \
558	interface [it1] = new morpheo::behavioural::Interface_fifo * [iterator_2]; \
559	for (uint32_t it2=0; it2<iterator_2; it2++) \
560	{ \
561	interface [it1][it2] = _interfaces->set_interface( name+separator+toString(it1)+separator+toString(it2), direction, localisation, str); \
562	} \
563	} \
564	}
565	#else
566	#define ALLOC2_INTERFACE_BEGIN( name, direction, localisation, str, x1, x2) \
567	INTERFACE_PRINT(name); \
568	uint32_t iterator_1 = 0; \
569	uint32_t iterator_2 = 0; \
570	morpheo::behavioural::Interface_fifo *** interface; \
571	{ \
572	std::string separator="_"; \
573	iterator_1 = x1; \
574	interface = new morpheo::behavioural::Interface_fifo ** [iterator_1]; \
575	for (uint32_t it1=0; it1<iterator_1; it1++) \
576	{ \
577	iterator_2 = x2; \
578	interface [it1] = new morpheo::behavioural::Interface_fifo * [iterator_2]; \
579	for (uint32_t it2=0; it2<iterator_2; it2++) \
580	{ \
581	interface [it1][it2] = _interfaces->set_interface( name+separator+toString(it1)+separator+toString(it2)); \
582	} \
583	} \
584	}
585	#endif
586
587	#define ALLOC2_INTERFACE_END(x1, x2) \
588	do \
589	{ \
590	for (uint32_t it1=0; it1<x1; it1++) \
591	delete [] interface [it1]; \
592	delete [] interface; \
593	} while (0)
594
595	#ifdef VHDL_TESTBENCH
596	#define INTERFACE2_TEST(value,x1,x2) \
597	do \
598	{ \
599	for (uint32_t it1=0; it1<x1; it1++) \
600	for (uint32_t it2=0; it2<x2; it2++) \
601	interface [it1][it2]->make_testbench(value); \
602	} while(0)
603	#else
604	#define INTERFACE2_TEST(value,x1,x2)
605	#endif
606
607	#define _ALLOC2_VAL_ACK_IN( sig, name, type, x1, x2) \
608	do \
609	{ \
610	sig = new SC_IN (Tcontrol_t) ** [x1]; \
611	for (uint32_t it1=0; it1<x1; it1++) \
612	{ \
613	sig [it1] = new SC_IN (Tcontrol_t) * [x2]; \
614	for (uint32_t it2=0; it2<x2; it2++) \
615	{ \
616	sig [it1][it2] = interface[it1][it2]->set_signal_valack_in (name, type); \
617	} \
618	} \
619	} while (0)
620
621	#define _ALLOC2_VAL_ACK_OUT( sig, name, type, x1, x2) \
622	do \
623	{ \
624	sig = new SC_OUT (Tcontrol_t) ** [x1]; \
625	for (uint32_t it1=0; it1<x1; it1++) \
626	{ \
627	sig [it1] = new SC_OUT (Tcontrol_t) * [x2]; \
628	for (uint32_t it2=0; it2<x2; it2++) \
629	{ \
630	sig [it1][it2] = interface[it1][it2]->set_signal_valack_out (name, type); \
631	} \
632	} \
633	} while (0)
634
635	#define _ALLOC2_VALACK_IN( sig,type, x1, x2) \
636	do \
637	{ \
638	sig = new SC_IN (Tcontrol_t) ** [x1]; \
639	for (uint32_t it1=0; it1<x1; it1++) \
640	{ \
641	sig [it1] = new SC_IN (Tcontrol_t) * [x2]; \
642	for (uint32_t it2=0; it2<x2; it2++) \
643	{ \
644	sig [it1][it2] = interface[it1][it2]->set_signal_valack_in (type); \
645	} \
646	} \
647	} while (0)
648
649	#define _ALLOC2_VALACK_OUT( sig,type, x1, x2) \
650	do \
651	{ \
652	sig = new SC_OUT (Tcontrol_t) ** [x1]; \
653	for (uint32_t it1=0; it1<x1; it1++) \
654	{ \
655	sig [it1] = new SC_OUT (Tcontrol_t) * [x2]; \
656	for (uint32_t it2=0; it2<x2; it2++) \
657	{ \
658	sig [it1][it2] = interface[it1][it2]->set_signal_valack_out (type); \
659	} \
660	} \
661	} while (0)
662
663	#define _ALLOC2_SIGNAL_IN( sig, name, type, size, x1, x2) \
664	do \
665	{ \
666	sig = new SC_IN (type) ** [x1]; \
667	for (uint32_t it1=0; it1<x1; it1++) \
668	{ \
669	sig [it1] = new SC_IN (type) * [x2]; \
670	for (uint32_t it2=0; it2<x2; it2++) \
671	{ \
672	if (size > 0) \
673	{ \
674	sig [it1][it2] = interface[it1][it2]->set_signal_in <type> (name, size); \
675	} \
676	else \
677	{ \
678	PRINT_SIZE_NUL(_component,interface[it1][it2],name); \
679	} \
680	} \
681	} \
682	} while (0)
683
684	#define _ALLOC2_SIGNAL_OUT( sig, name, type, size, x1, x2) \
685	do \
686	{ \
687	sig = new SC_OUT (type) ** [x1]; \
688	for (uint32_t it1=0; it1<x1; it1++) \
689	{ \
690	sig [it1] = new SC_OUT (type) * [x2]; \
691	for (uint32_t it2=0; it2<x2; it2++) \
692	{ \
693	if (size > 0) \
694	{ \
695	sig [it1][it2] = interface[it1][it2]->set_signal_out <type> (name, size); \
696	} \
697	else \
698	{ \
699	PRINT_SIZE_NUL(_component,interface[it1][it2],name); \
700	} \
701	} \
702	} \
703	} while (0)
704
705	#define ALLOC2_VAL_ACK_IN( sig, name, type ) _ALLOC2_VAL_ACK_IN( sig, name, type , iterator_1, iterator_2)
706	#define ALLOC2_VAL_ACK_OUT(sig, name, type ) _ALLOC2_VAL_ACK_OUT(sig, name, type , iterator_1, iterator_2)
707	#define ALLOC2_VALACK_IN( sig, type ) _ALLOC2_VALACK_IN( sig, type , iterator_1, iterator_2)
708	#define ALLOC2_VALACK_OUT( sig, type ) _ALLOC2_VALACK_OUT( sig, type , iterator_1, iterator_2)
709	#define ALLOC2_SIGNAL_IN( sig, name, type, size) _ALLOC2_SIGNAL_IN( sig, name, type, size, iterator_1, iterator_2)
710	#define ALLOC2_SIGNAL_OUT( sig, name, type, size) _ALLOC2_SIGNAL_OUT( sig, name, type, size, iterator_1, iterator_2)
711
712	#define DELETE2_SIGNAL(sig, x1,x2, size) \
713	do \
714	{ \
715	for (uint32_t it1=0; it1<x1; it1++) \
716	{ \
717	for (uint32_t it2=0; it2<x2; it2++) \
718	{ \
719	if (size > 0) \
720	{ \
721	delete sig[it1][it2]; \
722	} \
723	} \
724	delete [] sig[it1]; \
725	} \
726	delete [] sig; \
727	} while (0)
728
729	#define ALLOC2_FOREIGN_SIGNAL_IN( sig, interface, name, type, size, x1, x2) \
730	do \
731	{ \
732	sig = new SC_IN (type) ** [x1]; \
733	for (uint32_t it1=0; it1<x1; it1++) \
734	{ \
735	sig [it1] = new SC_IN (type) * [x2]; \
736	for (uint32_t it2=0; it2<x2; it2++) \
737	if (size > 0) \
738	{ \
739	std::string str = (toString("in")+"_"+((interface!="")?(toString(interface)+"_"):toString(""))+toString(it1)+"_"+toString(it2)+"_"+toString(name)); \
740	sig [it1][it2] = new SC_IN (type) (str.c_str()); \
741	} \
742	} \
743	} while (0)
744
745	#define ALLOC2_FOREIGN_SIGNAL_OUT( sig, interface, name, type, size, x1, x2) \
746	do \
747	{ \
748	sig = new SC_OUT (type) ** [x1]; \
749	for (uint32_t it1=0; it1<x1; it1++) \
750	{ \
751	sig [it1] = new SC_OUT (type) * [x2]; \
752	for (uint32_t it2=0; it2<x2; it2++) \
753	if (size > 0) \
754	{ \
755	std::string str = (toString("out")+"_"+((interface!="")?(toString(interface)+"_"):toString(""))+toString(it1)+"_"+toString(it2)+"_"+toString(name)); \
756	sig [it1][it2] = new SC_IN (type) (str.c_str()); \
757	} \
758	} \
759	} while (0)
760
761	#define DELETE2_FOREIGN_SIGNAL( sig, size,x1,x2) \
762	do \
763	{ \
764	DELETE2_SIGNAL(sig,x1,x2,size); \
765	} while (0)
766
767	#define ALLOC2_SC_SIGNAL( sig, name, type, x1, x2) \
768	do \
769	{ \
770	sig = new sc_signal<type> ** [x1]; \
771	{ \
772	std::string separator="_"; \
773	std::string str; \
774	for (uint32_t it1=0; it1<x1; it1++) \
775	{ \
776	sig [it1] = new sc_signal<type> * [x2]; \
777	for (uint32_t it2=0; it2<x2; it2++) \
778	{ \
779	str = name+separator+toString(it1)+separator+toString(it2); \
780	sig [it1][it2] = new sc_signal<type> (str.c_str()); \
781	PRINT_SIGNAL_ADDRESS(str.c_str(),sig[it1][it2]); \
782	} \
783	} \
784	} \
785	} while (0)
786
787	#define INSTANCE2_SC_SIGNAL(component, sig, x1, x2) \
788	do \
789	{ \
790	for (uint32_t it1=0; it1<x1; it1++) \
791	for (uint32_t it2=0; it2<x2; it2++) \
792	{ \
793	TEST_SIGNAL(component->sig [it1][it2]->name(),component->sig [it1][it2]); \
794	TEST_SIGNAL(sig [it1][it2]->name(),sig [it1][it2]); \
795	((component->sig[it1][it2])) ((sig[it1][it2])); \
796	} \
797	} while (0)
798
799	#define _INSTANCE2_SC_SIGNAL(component, sig1, sig2, x1, x2) \
800	do \
801	{ \
802	for (uint32_t it1=0; it1<x1; it1++) \
803	for (uint32_t it2=0; it2<x2; it2++) \
804	{ \
805	TEST_SIGNAL(component->sig1 [it1][it2]->name(),component->sig1 [it1][it2]); \
806	TEST_SIGNAL(sig2 [it1][it2]->name(),sig2 [it1][it2]); \
807	((component->sig1[it1][it2])) ((sig2[it1][it2])); \
808	} \
809	} while (0)
810
811	#define DELETE2_SC_SIGNAL(sig,x1,x2) \
812	do \
813	{ \
814	for (uint32_t it1=0; it1<x1; it1++) \
815	{ \
816	for (uint32_t it2=0; it2<x2; it2++) \
817	{ \
818	PRINT_SIGNAL_ADDRESS("",sig[it1][it2]); \
819	delete sig[it1][it2]; \
820	} \
821	delete [] sig[it1]; \
822	} \
823	delete [] sig; \
824	} while (0)
825
826	// ----------------------------------------------------------------------
827	// -----[ ITERATION 3 ]--------------------------------------------------
828	// ----------------------------------------------------------------------
829
830	#ifdef POSITION
831	#define ALLOC3_INTERFACE_BEGIN( name, direction, localisation, str, x1, x2, x3) \
832	INTERFACE_PRINT(name); \
833	uint32_t iterator_1 = 0; \
834	uint32_t iterator_2 = 0; \
835	uint32_t iterator_3 = 0; \
836	morpheo::behavioural::Interface_fifo **** interface; \
837	{ \
838	std::string separator="_"; \
839	iterator_1 = x1; \
840	interface = new morpheo::behavioural::Interface_fifo *** [iterator_1]; \
841	for (uint32_t it1=0; it1<iterator_1; it1++) \
842	{ \
843	iterator_2 = x2; \
844	interface [it1] = new morpheo::behavioural::Interface_fifo ** [iterator_2]; \
845	for (uint32_t it2=0; it2<iterator_2; it2++) \
846	{ \
847	iterator_3 = x3; \
848	interface [it1][it2] = new morpheo::behavioural::Interface_fifo * [iterator_3]; \
849	for (uint32_t it3=0; it3<iterator_3; it3++) \
850	{ \
851	interface [it1][it2][it3] = _interfaces->set_interface( name+separator+toString(it1)+separator+toString(it2)+separator+toString(it3), direction, localisation, str); \
852	} \
853	} \
854	} \
855	}
856	#else
857	#define ALLOC3_INTERFACE_BEGIN( name, direction, localisation, str, x1, x2, x3) \
858	INTERFACE_PRINT(name); \
859	uint32_t iterator_1 = 0; \
860	uint32_t iterator_2 = 0; \
861	uint32_t iterator_3 = 0; \
862	morpheo::behavioural::Interface_fifo **** interface; \
863	{ \
864	std::string separator="_"; \
865	iterator_1 = x1; \
866	interface = new morpheo::behavioural::Interface_fifo *** [iterator_1]; \
867	for (uint32_t it1=0; it1<iterator_1; it1++) \
868	{ \
869	iterator_2 = x2; \
870	interface [it1] = new morpheo::behavioural::Interface_fifo ** [iterator_2]; \
871	for (uint32_t it2=0; it2<iterator_2; it2++) \
872	{ \
873	iterator_3 = x3; \
874	interface [it1][it2] = new morpheo::behavioural::Interface_fifo * [iterator_3]; \
875	for (uint32_t it3=0; it3<iterator_3; it3++) \
876	{ \
877	interface [it1][it2][it3] = _interfaces->set_interface( name+separator+toString(it1)+separator+toString(it2)+separator+toString(it3)); \
878	} \
879	} \
880	} \
881	}
882	#endif
883
884	#define ALLOC3_INTERFACE_END(x1, x2, x3) \
885	do \
886	{ \
887	for (uint32_t it1=0; it1<x1; it1++) \
888	{ \
889	for (uint32_t it2=0; it2<x2; it2++) \
890	delete [] interface [it1][it2]; \
891	delete [] interface [it1]; \
892	} \
893	delete [] interface; \
894	} while (0)
895
896	#ifdef VHDL_TESTBENCH
897	#define INTERFACE3_TEST(value,x1,x2,x3) \
898	do \
899	{ \
900	for (uint32_t it1=0; it1<x1; it1++) \
901	for (uint32_t it2=0; it2<x2; it2++) \
902	for (uint32_t it3=0; it3<x3; it3++) \
903	interface [it1][it2][it3]->make_testbench(value); \
904	} while(0)
905	#else
906	#define INTERFACE3_TEST(value,x1,x2,x3)
907	#endif
908
909	// #define _ALLOC3_VAL_ACK_IN( sig, name, type, x1, x2, x3)
910	// #define _ALLOC3_VAL_ACK_OUT( sig, name, type, x1, x2, x3)
911
912	#define _ALLOC3_VALACK_IN( sig,type, x1, x2, x3) \
913	do \
914	{ \
915	sig = new SC_IN (Tcontrol_t) *** [x1]; \
916	for (uint32_t it1=0; it1<x1; it1++) \
917	{ \
918	sig [it1] = new SC_IN (Tcontrol_t) ** [x2]; \
919	for (uint32_t it2=0; it2<x2; it2++) \
920	{ \
921	sig [it1][it2] = new SC_IN (Tcontrol_t) * [x3]; \
922	for (uint32_t it3=0; it3<x3; it3++) \
923	{ \
924	sig [it1][it2][it3] = interface[it1][it2][it3]->set_signal_valack_in (type); \
925	} \
926	} \
927	} \
928	} while (0)
929
930	#define _ALLOC3_VALACK_OUT( sig,type, x1, x2, x3) \
931	do \
932	{ \
933	sig = new SC_OUT (Tcontrol_t) *** [x1]; \
934	for (uint32_t it1=0; it1<x1; it1++) \
935	{ \
936	sig [it1] = new SC_OUT (Tcontrol_t) ** [x2]; \
937	for (uint32_t it2=0; it2<x2; it2++) \
938	{ \
939	sig [it1][it2] = new SC_OUT (Tcontrol_t) * [x3]; \
940	for (uint32_t it3=0; it3<x3; it3++) \
941	{ \
942	sig [it1][it2][it3] = interface[it1][it2][it3]->set_signal_valack_out (type); \
943	} \
944	} \
945	} \
946	} while (0)
947
948
949	#define _ALLOC3_SIGNAL_IN( sig, name, type, size, x1, x2,x3) \
950	do \
951	{ \
952	sig = new SC_IN (type) *** [x1]; \
953	for (uint32_t it1=0; it1<x1; it1++) \
954	{ \
955	sig [it1] = new SC_IN (type) ** [x2]; \
956	for (uint32_t it2=0; it2<x2; it2++) \
957	{ \
958	sig [it1][it2] = new SC_IN (type) * [x3]; \
959	for (uint32_t it3=0; it3<x3; it3++) \
960	{ \
961	if (size > 0) \
962	{ \
963	sig [it1][it2][it3] = interface[it1][it2][it3]->set_signal_in <type> (name, size); \
964	} \
965	else \
966	{ \
967	PRINT_SIZE_NUL(_component,interface[it1][it2][it3],name); \
968	} \
969	} \
970	} \
971	} \
972	} while (0)
973
974	#define _ALLOC3_SIGNAL_OUT( sig, name, type, size, x1, x2,x3) \
975	do \
976	{ \
977	sig = new SC_OUT (type) *** [x1]; \
978	for (uint32_t it1=0; it1<x1; it1++) \
979	{ \
980	sig [it1] = new SC_OUT (type) ** [x2]; \
981	for (uint32_t it2=0; it2<x2; it2++) \
982	{ \
983	sig [it1][it2] = new SC_OUT (type) * [x3]; \
984	for (uint32_t it3=0; it3<x3; it3++) \
985	{ \
986	if (size > 0) \
987	{ \
988	sig [it1][it2][it3] = interface[it1][it2][it3]->set_signal_out <type> (name, size); \
989	} \
990	else \
991	{ \
992	PRINT_SIZE_NUL(_component,interface[it1][it2][it3],name); \
993	} \
994	} \
995	} \
996	} \
997	} while (0)
998
999	// #define ALLOC3_VAL_ACK_IN( sig, name, type ) _ALLOC3_VAL_ACK_IN( sig, name, type , iterator_1, iterator_2, iterator_3)
1000	// #define ALLOC3_VAL_ACK_OUT(sig, name, type ) _ALLOC3_VAL_ACK_OUT(sig, name, type , iterator_1, iterator_2, iterator_3)
1001	#define ALLOC3_VALACK_IN( sig, type ) _ALLOC3_VALACK_IN( sig, type , iterator_1, iterator_2, iterator_3)
1002	#define ALLOC3_VALACK_OUT( sig, type ) _ALLOC3_VALACK_OUT( sig, type , iterator_1, iterator_2, iterator_3)
1003	#define ALLOC3_SIGNAL_IN( sig, name, type, size) _ALLOC3_SIGNAL_IN( sig, name, type, size, iterator_1, iterator_2, iterator_3)
1004	#define ALLOC3_SIGNAL_OUT( sig, name, type, size) _ALLOC3_SIGNAL_OUT( sig, name, type, size, iterator_1, iterator_2, iterator_3)
1005
1006	#define DELETE3_SIGNAL(sig, x1, x2, x3, size) \
1007	do \
1008	{ \
1009	for (uint32_t it1=0; it1<x1; it1++) \
1010	{ \
1011	for (uint32_t it2=0; it2<x2; it2++) \
1012	{ \
1013	for (uint32_t it3=0; it3<x3; it3++) \
1014	{ \
1015	if (size > 0) \
1016	{ \
1017	delete sig[it1][it2][it3]; \
1018	} \
1019	} \
1020	delete [] sig[it1][it2]; \
1021	} \
1022	delete [] sig[it1]; \
1023	} \
1024	delete [] sig; \
1025	} while (0)
1026
1027	#define ALLOC3_FOREIGN_SIGNAL_IN( sig, interface, name, type, size, x1, x2,x3) \
1028	do \
1029	{ \
1030	sig = new SC_IN (type) *** [x1]; \
1031	for (uint32_t it1=0; it1<x1; it1++) \
1032	{ \
1033	sig [it1] = new SC_IN (type) ** [x2]; \
1034	for (uint32_t it2=0; it2<x2; it2++) \
1035	{ \
1036	sig [it1][it2] = new SC_IN (type) * [x3]; \
1037	for (uint32_t it3=0; it3<x3; it3++) \
1038	if (size > 0) \
1039	{ \
1040	std::string str = (toString("in")+"_"+((interface!="")?(toString(interface)+"_"):toString(""))+toString(it1)+"_"+toString(it2)+"_"+toString(it3)+"_"+toString(name)); \
1041	sig [it1][it2][it3] = new SC_IN (type) (str.c_str()); \
1042	} \
1043	} \
1044	} \
1045	} while (0)
1046
1047	#define ALLOC3_FOREIGN_SIGNAL_OUT( sig, interface, name, type, size, x1, x2,x3) \
1048	do \
1049	{ \
1050	sig = new SC_OUT (type) *** [x1]; \
1051	for (uint32_t it1=0; it1<x1; it1++) \
1052	{ \
1053	sig [it1] = new SC_OUT (type) ** [x2]; \
1054	for (uint32_t it2=0; it2<x2; it2++) \
1055	{ \
1056	sig [it1][it2] = new SC_OUT (type) * [x3]; \
1057	for (uint32_t it3=0; it3<x3; it3++) \
1058	if (size > 0) \
1059	{ \
1060	std::string str = (toString("out")+"_"+((interface!="")?(toString(interface)+"_"):toString(""))+toString(it1)+"_"+toString(it2)+"_"+toString(it3)+"_"+toString(name)); \
1061	sig [it1][it2][it3] = new SC_OUT(type) (str.c_str()); \
1062	} \
1063	} \
1064	} \
1065	} while (0)
1066
1067	#define DELETE3_FOREIGN_SIGNAL( sig, size,x1,x2,x3) \
1068	do \
1069	{ \
1070	DELETE3_SIGNAL(sig,x1,x2,x3,size); \
1071	} while (0)
1072
1073	#define ALLOC3_SC_SIGNAL( sig, name, type, x1, x2, x3) \
1074	do \
1075	{ \
1076	sig = new sc_signal<type> *** [x1]; \
1077	{ \
1078	std::string separator="_"; \
1079	std::string str; \
1080	for (uint32_t it1=0; it1<x1; it1++) \
1081	{ \
1082	sig [it1] = new sc_signal<type> ** [x2]; \
1083	for (uint32_t it2=0; it2<x2; it2++) \
1084	{ \
1085	sig [it1][it2] = new sc_signal<type> * [x3]; \
1086	for (uint32_t it3=0; it3<x3; it3++) \
1087	{ \
1088	str = name+separator+toString(it1)+separator+toString(it2)+separator+toString(it3); \
1089	sig [it1][it2][it3] = new sc_signal<type> (str.c_str()); \
1090	PRINT_SIGNAL_ADDRESS(str.c_str(),sig[it1][it2][it3]); \
1091	} \
1092	} \
1093	} \
1094	} \
1095	} while (0)
1096
1097	#define INSTANCE3_SC_SIGNAL(component, sig, x1, x2, x3) \
1098	do \
1099	{ \
1100	for (uint32_t it1=0; it1<x1; it1++) \
1101	for (uint32_t it2=0; it2<x2; it2++) \
1102	for (uint32_t it3=0; it3<x3; it3++) \
1103	{ \
1104	TEST_SIGNAL(component->sig [it1][it2][it3]->name(),component->sig [it1][it2][it3]); \
1105	TEST_SIGNAL(sig [it1][it2][it3]->name(),sig [it1][it2][it3]); \
1106	((component->sig[it1][it2][it3])) ((sig[it1][it2][it3])); \
1107	} \
1108	} while (0)
1109
1110	#define _INSTANCE3_SC_SIGNAL(component, sig1, sig2, x1, x2, x3) \
1111	do \
1112	{ \
1113	for (uint32_t it1=0; it1<x1; it1++) \
1114	for (uint32_t it2=0; it2<x2; it2++) \
1115	for (uint32_t it3=0; it3<x3; it3++) \
1116	{ \
1117	TEST_SIGNAL(component->sig1 [it1][it2][it3]->name(),component->sig1 [it1][it2][it3]); \
1118	TEST_SIGNAL(sig2 [it1][it2][it3]->name(),sig2 [it1][it2][it3]); \
1119	((component->sig1[it1][it2][it3])) ((sig2[it1][it2][it3])); \
1120	} \
1121	} while (0)
1122
1123	#define DELETE3_SC_SIGNAL(sig,x1,x2,x3) \
1124	do \
1125	{ \
1126	for (uint32_t it1=0; it1<x1; it1++) \
1127	{ \
1128	for (uint32_t it2=0; it2<x2; it2++) \
1129	{ \
1130	for (uint32_t it3=0; it3<x3; it3++) \
1131	{ \
1132	PRINT_SIGNAL_ADDRESS("",sig[it1][it2][it3]); \
1133	delete sig[it1][it2][it3]; \
1134	} \
1135	delete [] sig[it1][it2]; \
1136	} \
1137	delete [] sig[it1]; \
1138	} \
1139	delete [] sig; \
1140	} while (0)
1141
1142	#endif

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