Ignore:
Timestamp:
Apr 30, 2009, 3:51:41 PM (15 years ago)
Author:
moulu
Message:

1) added a generic multiplier (systemC isn't working with 8bits)
2) added a partial functionnal unit vhdl.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_vhdl_body.cpp

    r81 r116  
    2525    log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin");
    2626    vhdl->set_body ("");
     27    vhdl->set_comment(0,"");
     28    vhdl->set_comment(0,"-----------------------------------");
     29    vhdl->set_comment(0,"-- Registers                       ");
     30    vhdl->set_comment(0,"-----------------------------------");
     31    vhdl->set_comment(0,"");
     32    vhdl->set_body ("");
     33    vhdl->set_body (0,"process (in_CLOCK)");
     34    vhdl->set_body (0,"begin");
     35    vhdl->set_body (1,"if in_CLOCK'event and in_CLOCK = '1' then");
     36
     37    vhdl->set_body (2,"if (in_NRESET = '0') then");
     38    vhdl->set_body (3,"reg_BUSY_IN <= '0';");
     39    vhdl->set_body (3,"reg_BUSY_OUT <= '0';");
     40    vhdl->set_body (2,"else");
     41
     42    vhdl->set_comment (3,"Input Buffer");
     43    vhdl->set_body (3,"if (sig_EXECUTE_IN_ACK = '1') then");
     44    vhdl->set_body (4,"reg_BUSY_IN <= in_EXECUTE_IN_VAL;");
     45    if(_param->_have_port_context_id)
     46      vhdl->set_body (4,"reg_EXECUTE_IN_CONTEXT_ID <= in_EXECUTE_IN_CONTEXT_ID;");
     47    if(_param->_have_port_front_end_id)
     48      vhdl->set_body (4,"reg_EXECUTE_IN_FRONT_END_ID <= in_EXECUTE_IN_FRONT_END_ID;");
     49    if(_param->_have_port_ooo_engine_id)
     50      vhdl->set_body (4,"reg_EXECUTE_IN_OOO_ENGINE_ID <= in_EXECUTE_IN_OOO_ENGINE_ID;");
     51    if(_param->_have_port_rob_ptr)
     52      vhdl->set_body (4,"reg_EXECUTE_IN_PACKET_ID <= in_EXECUTE_IN_PACKET_ID;");
     53    vhdl->set_body (4,"reg_EXECUTE_IN_OPERATION <= in_EXECUTE_IN_OPERATION;");
     54    vhdl->set_body (4,"reg_EXECUTE_IN_TYPE <= in_EXECUTE_IN_TYPE;");
     55    vhdl->set_body (4,"reg_EXECUTE_IN_DATA_RA <= in_EXECUTE_IN_DATA_RA;");
     56    vhdl->set_body (4,"reg_EXECUTE_IN_DATA_RB <= in_EXECUTE_IN_DATA_RB;");
     57    vhdl->set_body (4,"reg_EXECUTE_IN_DATA_RC <= in_EXECUTE_IN_DATA_RC;");
     58    vhdl->set_body (4,"reg_EXECUTE_IN_HAS_IMMEDIAT <= in_EXECUTE_IN_HAS_IMMEDIAT;");   
     59    vhdl->set_body (4,"reg_EXECUTE_IN_IMMEDIAT <= in_EXECUTE_IN_IMMEDIAT;");
     60    vhdl->set_body (4,"reg_EXECUTE_IN_WRITE_RD <= in_EXECUTE_IN_WRITE_RD;");
     61    vhdl->set_body (4,"reg_EXECUTE_IN_NUM_REG_RD <= in_EXECUTE_IN_NUM_REG_RD;");
     62    vhdl->set_body (4,"reg_EXECUTE_IN_WRITE_RE <= in_EXECUTE_IN_WRITE_RE;");
     63    vhdl->set_body (4,"reg_EXECUTE_IN_NUM_REG_RE <= in_EXECUTE_IN_NUM_REG_RE;");
     64    vhdl->set_body (3,"end if;");
     65
     66    vhdl->set_comment (3,"Output Buffer");
     67    vhdl->set_body (3,"if (sig_EXECUTE_OUT_UPDATE = '1') then");
     68    vhdl->set_body (4,"reg_BUSY_OUT <= reg_BUSY_IN;");
     69    if(_param->_have_port_context_id)
     70      vhdl->set_body (4,"reg_EXECUTE_OUT_CONTEXT_ID <= sig_EXECUTE_OUT_CONTEXT_ID;");
     71    if(_param->_have_port_front_end_id)
     72      vhdl->set_body (4,"reg_EXECUTE_OUT_FRONT_END_ID <= sig_EXECUTE_OUT_FRONT_END_ID;");
     73    if(_param->_have_port_ooo_engine_id)
     74      vhdl->set_body (4,"reg_EXECUTE_OUT_OOO_ENGINE_ID <= sig_EXECUTE_OUT_OOO_ENGINE_ID;");
     75    if(_param->_have_port_rob_ptr)
     76      vhdl->set_body (4,"reg_EXECUTE_OUT_PACKET_ID <= sig_EXECUTE_OUT_PACKET_ID;");
     77    vhdl->set_body (4,"reg_EXECUTE_OUT_WRITE_RD <= sig_EXECUTE_OUT_WRITE_RD;");
     78    vhdl->set_body (4,"reg_EXECUTE_OUT_NUM_REG_RD <= sig_EXECUTE_OUT_NUM_REG_RD;");
     79    vhdl->set_body (4,"reg_EXECUTE_OUT_DATA_RD <= sig_EXECUTE_OUT_DATA_RD;");
     80    vhdl->set_body (4,"reg_EXECUTE_OUT_WRITE_RE <= sig_EXECUTE_OUT_WRITE_RE;");
     81    vhdl->set_body (4,"reg_EXECUTE_OUT_NUM_REG_RE <= sig_EXECUTE_OUT_NUM_REG_RE;");
     82    vhdl->set_body (4,"reg_EXECUTE_OUT_DATA_RE <= sig_EXECUTE_OUT_DATA_RE;");
     83    vhdl->set_body (4,"reg_EXECUTE_OUT_EXCEPTION <= sig_EXECUTE_OUT_EXCEPTION;");
     84    vhdl->set_body (4,"reg_EXECUTE_OUT_NO_SEQUENCE <= sig_EXECUTE_OUT_NO_SEQUENCE;");
     85    vhdl->set_body (4,"reg_EXECUTE_OUT_ADDRESS <= sig_EXECUTE_OUT_ADDRESS;");
     86    vhdl->set_body (3,"end if;");
     87    vhdl->set_body (2,"end if;");
     88    vhdl->set_body (1,"end if;");
     89    vhdl->set_body (0,"end process;");
     90
     91    vhdl->set_body ("");
     92    vhdl->set_comment(0,"");
     93    vhdl->set_comment(0,"-----------------------------------");
     94    vhdl->set_comment(0,"-- Insides                         ");
     95    vhdl->set_comment(0,"-----------------------------------");
     96    vhdl->set_comment(0,"");
     97
     98    vhdl->set_body (0,"");
     99    vhdl->set_body (0,"sig_B_OPERAND <= reg_EXECUTE_IN_IMMEDIAT when (reg_EXECUTE_IN_HAS_IMMEDIAT = '1') else");
     100    vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RB;");
     101
     102    vhdl->set_comment(0,"");
     103    vhdl->set_comment(0,"ALU");
     104    vhdl->set_comment(0,"");
     105
     106    vhdl->set_body (0,"sig_IS_ARITH <= reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADD))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADDC))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+");");
     107
     108    vhdl->set_body (0,"sig_IS_LOGIC <= reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_AND))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_OR))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_XOR))+");");
     109
     110    vhdl->set_body (0,"sig_CIN_ARITH <= reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_CY)+") and reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADDC))+");");
     111//    vhdl->set_body (0,"sig_CIN_ARITH <= (reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_CY)+") and reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADDC))+")) or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+");");
     112
     113//    vhdl->set_body (0,"sig_ARITH_B_OPERAND <= not (sig_B_OPERAND) when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+") = '1') else");
     114    vhdl->set_body (0,"sig_ARITH_B_OPERAND <= ((not sig_B_OPERAND) + 1) when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+") = '1') else");
     115    vhdl->set_body (1,"sig_B_OPERAND;");
     116
     117    vhdl->set_body (0,"sig_RES_ARITH <= ('0' & reg_EXECUTE_IN_DATA_RA) + ('0' & sig_ARITH_B_OPERAND) + ("+std_logic_cst(_param->_size_general_data-2,0)+" & sig_CIN_ARITH);");
     118
     119    vhdl->set_body (0,"");
     120    vhdl->set_body (0,"sig_A_AND_B <= reg_EXECUTE_IN_DATA_RA and sig_B_OPERAND;");
     121    vhdl->set_body (0,"sig_A_OR_B <= reg_EXECUTE_IN_DATA_RA or sig_B_OPERAND;");
     122    vhdl->set_body (0,"sig_A_XOR_B <= reg_EXECUTE_IN_DATA_RA xor sig_B_OPERAND;");
     123
     124    vhdl->set_body (0,"");
     125    vhdl->set_body (0,"with reg_EXECUTE_IN_OPERATION select");
     126    vhdl->set_body (0,"sig_RES_LOGIC <=");
     127    vhdl->set_body (1,"sig_A_AND_B when "+std_logic_cst(_param->_size_operation,OPERATION_ALU_L_AND)+",");
     128    vhdl->set_body (1,"sig_A_OR_B  when "+std_logic_cst(_param->_size_operation,OPERATION_ALU_L_OR)+",");
     129    vhdl->set_body (1,"sig_A_XOR_B when "+std_logic_cst(_param->_size_operation,OPERATION_ALU_L_XOR)+",");
     130    vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+" when others;");
     131
     132    vhdl->set_body (0,"sig_RES_ALU <=");
     133    vhdl->set_body (1,"sig_RES_ARITH ("+toString(_param->_size_general_data-1)+" downto 0) when (sig_IS_ARITH = '1') else");
     134    vhdl->set_body (1,"sig_RES_LOGIC when (sig_IS_LOGIC = '1') else");
     135    vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+";");
     136
     137    vhdl->set_body (0,"");
     138    vhdl->set_comment(0,"In ISA l.sub doesn't change carry flag.");
     139    vhdl->set_body (0,"sig_COUT_ALU <= (sig_RES_ARITH("+toString(_param->_size_general_data)+") and (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADD))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADDC))+"))) or (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+") and reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_CY)+"));");
     140    vhdl->set_body (0,"sig_OVR_ALU <= ((sig_ARITH_B_OPERAND("+toString(_param->_size_general_data-1)+") and reg_EXECUTE_IN_DATA_RA("+toString(_param->_size_general_data-1)+") and not sig_RES_ARITH("+toString(_param->_size_general_data-1)+")) or (not sig_ARITH_B_OPERAND("+toString(_param->_size_general_data-1)+") and not reg_EXECUTE_IN_DATA_RA("+toString(_param->_size_general_data-1)+") and sig_RES_ARITH("+toString(_param->_size_general_data-1)+"))) and sig_IS_ARITH;");
     141
     142    vhdl->set_body (0,"");
     143    vhdl->set_comment(0,"");
     144    vhdl->set_comment(0,"MOVE");
     145    vhdl->set_comment(0,"");
     146    vhdl->set_body (0,"sig_MOVHI <= reg_EXECUTE_IN_IMMEDIAT("+toString(_param->_size_general_data-17)+" downto 0) & "+std_logic_cst(16,0)+";");
     147   
     148    vhdl->set_body (0,"sig_CMOV <=");
     149    vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RA when (reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_F)+") = '1') else");
     150    vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RB;");
     151   
     152    vhdl->set_body (0,"sig_RES_MOVE <=");
     153    vhdl->set_body (1,"sig_MOVHI when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_MOVE_L_MOVHI))+") = '1') else");
     154    vhdl->set_body (1,"sig_CMOV when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_MOVE_L_CMOV))+") = '1') else");
     155    vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+";");
     156
     157    vhdl->set_body (0,"");
     158    vhdl->set_comment(0,"");
     159    vhdl->set_comment(0,"BRANCH");
     160    vhdl->set_comment(0,"");
     161    vhdl->set_body (0,"sig_NOSQ_BRANCH <= (reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_F)+") and reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_TEST_F))+")) or (not reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_F)+") and reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_TEST_NF))+")) or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_JALR))+");");
     162
     163#ifdef SYSTEMC_VHDL_COMPATIBILITY
     164    vhdl->set_body (0,"sig_RES_BRANCH <=");
     165    vhdl->set_body (1,"reg_EXECUTE_IN_IMMEDIAT("+toString(_param->_size_general_data-3)+" downto 0) & "+std_logic_cst(2,0)+"when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_JALR))+") = '1') else");
     166    vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+";");
     167#else
     168    vhdl->set_body (0,"sig_RES_BRANCH <= reg_EXECUTE_IN_IMMEDIAT("+toString(_param->_size_general_data-3)+" downto 0) & "+std_logic_cst(2,0)+";");
     169#endif
     170
     171    vhdl->set_body (0,"sig_ADDR_BRANCH <=");
     172    vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RB("+toString(_param->_size_instruction_address+1)+" downto 2) when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_JALR))+") = '1') else");
     173    vhdl->set_body (1,"reg_EXECUTE_IN_IMMEDIAT("+toString(_param->_size_instruction_address-1)+" downto 0);");
     174 
     175    vhdl->set_body ("");
     176    vhdl->set_comment(0,"");
     177    vhdl->set_comment(0,"SHIFTER");
     178    vhdl->set_comment(0,"");
     179
     180    vhdl->set_comment(0,"Instance shifter");
     181    vhdl->set_body   (0,"instance_"+_name+"_shifter : "+_name+"_shifter");
     182    vhdl->set_body   (0,"port map (");
     183    vhdl->set_body   (1,"  in_SHIFTER_0_DATA      \t=>\treg_EXECUTE_IN_DATA_RA");
     184    vhdl->set_body   (1,", in_SHIFTER_0_SHIFT     \t=>\tsig_B_OPERAND("+toString((log2(_param->_size_general_data))-1)+" downto 0)");
     185    vhdl->set_body   (1,", in_SHIFTER_0_DIRECTION \t=>\treg_EXECUTE_IN_OPERATION(0)");
     186    vhdl->set_body   (1,", in_SHIFTER_0_TYPE      \t=>\treg_EXECUTE_IN_OPERATION(1)");
     187    vhdl->set_body   (1,", in_SHIFTER_0_CARRY     \t=>\treg_EXECUTE_IN_OPERATION(2)");
     188    vhdl->set_body   (1,",out_SHIFTER_0_DATA      \t=>\tsig_RES_SHIFTER");
     189    vhdl->set_body   (0,");");
     190    vhdl->set_body   (0,"");
     191
     192    vhdl->set_body ("");
     193    vhdl->set_comment(0,"");
     194    vhdl->set_comment(0,"EXTEND");
     195    vhdl->set_comment(0,"");
     196
     197    vhdl->set_body (0,"sig_EXT_BYTE_S <=");
     198    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-8,(1<<_param->_size_general_data-8)-1)+" & reg_EXECUTE_IN_DATA_RA (7 downto 0) when (reg_EXECUTE_IN_DATA_RA (7) = '1') else");
     199    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-8,0)+" & reg_EXECUTE_IN_DATA_RA (7 downto 0);");
     200    vhdl->set_body (0,"");
     201
     202    vhdl->set_body (0,"sig_EXT_BYTE_Z <=");
     203    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-8,0)+" & reg_EXECUTE_IN_DATA_RA (7 downto 0);");
     204    vhdl->set_body (0,"");
     205
     206    vhdl->set_body (0,"sig_EXT_HALF_WORD_S <=");
     207    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-16,(1<<_param->_size_general_data-16)-1)+" & reg_EXECUTE_IN_DATA_RA (15 downto 0) when (reg_EXECUTE_IN_DATA_RA (15) = '1') else");
     208    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-16,0)+" & reg_EXECUTE_IN_DATA_RA (15 downto 0);");
     209    vhdl->set_body (0,"");
     210
     211    vhdl->set_body (0,"sig_EXT_HALF_WORD_Z <=");
     212    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-16,0)+" & reg_EXECUTE_IN_DATA_RA (15 downto 0);");
     213    vhdl->set_body (0,"");
     214
     215    vhdl->set_body (0,"sig_EXT_WORD_S <=");
     216    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-32,(1<<_param->_size_general_data-32)-1)+" & reg_EXECUTE_IN_DATA_RA (31 downto 0) when (reg_EXECUTE_IN_DATA_RA (31) = '1') else");
     217    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-32,0)+" & reg_EXECUTE_IN_DATA_RA (31 downto 0);");
     218    vhdl->set_body (0,"");
     219
     220    vhdl->set_body (0,"sig_EXT_WORD_Z <=");
     221    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-32,0)+" & reg_EXECUTE_IN_DATA_RA (31 downto 0);");
     222    vhdl->set_body (0,"");
     223
     224    vhdl->set_body (0,"sig_EXT_S <=");
     225    vhdl->set_body (1,"sig_EXT_BYTE_S      when (reg_EXECUTE_IN_IMMEDIAT = 8)  else");
     226    vhdl->set_body (1,"sig_EXT_HALF_WORD_S when (reg_EXECUTE_IN_IMMEDIAT = 16) else");
     227    vhdl->set_body (1,"sig_EXT_WORD_S;");
     228    vhdl->set_body (0,"");
     229
     230    vhdl->set_body (0,"sig_EXT_Z <=");
     231    vhdl->set_body (1,"sig_EXT_BYTE_Z      when (reg_EXECUTE_IN_IMMEDIAT = 8)  else");
     232    vhdl->set_body (1,"sig_EXT_HALF_WORD_Z when (reg_EXECUTE_IN_IMMEDIAT = 16) else");
     233    vhdl->set_body (1,"sig_EXT_WORD_Z;");
     234    vhdl->set_body (0,"");
     235
     236    vhdl->set_body (0,"sig_RES_EXTEND <=");
     237    vhdl->set_body (1,"sig_EXT_Z      when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_EXTEND_L_EXTEND_Z))+") = '1')  else");
     238    vhdl->set_body (1,"sig_EXT_S;");
     239    vhdl->set_body (0,"");
     240
     241    vhdl->set_body (0,"");
     242    vhdl->set_comment(0,"");
     243    vhdl->set_comment(0,"FIND");
     244    vhdl->set_comment(0,"");
     245
     246    vhdl->set_body (0,"sig_FF1 <=");
     247    for (uint32_t i=0; i<_param->_size_general_data; i++)
     248      vhdl->set_body (1,std_logic_cst(log2(_param->_size_general_data)+1,i+1)+" \twhen (reg_EXECUTE_IN_DATA_RA ("+toString(i)+") = '1') \telse");
     249    vhdl->set_body (1,std_logic_cst(log2(_param->_size_general_data)+1,0)+";");
     250    vhdl->set_body (0,"");
     251
     252    vhdl->set_body (0,"sig_FL1 <=");
     253    for (uint32_t i=_param->_size_general_data; i>0; i--)
     254      vhdl->set_body (1,std_logic_cst(log2(_param->_size_general_data)+1,i)+" \twhen (reg_EXECUTE_IN_DATA_RA ("+toString(i-1)+") = '1') \telse");
     255    vhdl->set_body (1,std_logic_cst(log2(_param->_size_general_data)+1,0)+";");
     256    vhdl->set_body (0,"");
     257
     258    vhdl->set_body (0,"sig_RES_FIND <=");
     259    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-log2(_param->_size_general_data)-1,0)+"&"+"sig_FF1      when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_FIND_L_FF1))+") = '1')  else");
     260    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-log2(_param->_size_general_data)-1,0)+"&"+"sig_FL1;");
     261    vhdl->set_body (0,"");
     262
     263    vhdl->set_body (0,"");
     264    vhdl->set_comment(0,"");
     265    vhdl->set_comment(0,"SPECIAL");
     266    vhdl->set_comment(0,"");
     267
     268    vhdl->set_body (0,"sig_SPR_IS_HERE <=");
     269    //    vhdl->set_body (1,"'1' when (sig_A_OR_B("+toString(_param->_size_special_address_group+_param->_size_special_address_register-1)+" downto "+toString(_param->_size_special_address_register)+") = "+std_logic_cst(_param->_size_special_address_group,GROUP_MAC)+") else");
     270    vhdl->set_body (1,"'1' when (sig_A_OR_B(15 downto 0) = "+std_logic_cst(_param->_size_special_address_group,GROUP_MAC)+") else");
     271    vhdl->set_body (1,"'0';");
     272
     273    vhdl->set_comment(0,"MFSPR");
     274    vhdl->set_body (0,"sig_MFSPR <=");
     275    vhdl->set_body (1,"reg_MACLO"+toString((_param->_have_port_context_id == 1) ? "(reg_EXECUTE_IN_CONTEXT_ID)" : "(0)")+" when (sig_SPR_IS_HERE = '1' and sig_A_OR_B("+toString(_param->_size_special_address_register-1)+" downto 0) = "+std_logic_cst(_param->_size_special_address_register,SPR_MACLO)+") else");
     276    vhdl->set_body (1,"reg_MACHI"+toString((_param->_have_port_context_id == 1) ? "(reg_EXECUTE_IN_CONTEXT_ID)" : "(0)")+" when (sig_SPR_IS_HERE = '1' and sig_A_OR_B("+toString(_param->_size_special_address_register-1)+" downto 0) = "+std_logic_cst(_param->_size_special_address_register,SPR_MACHI)+") else");
     277    vhdl->set_body (1,std_logic_cst(_param->_size_spr,0)+";");
     278    vhdl->set_body (0,"");
     279
     280    vhdl->set_body (0,"");
     281
     282    vhdl->set_comment(0,"MTSPR");
     283    vhdl->set_body (0,"process (in_CLOCK)");
     284    vhdl->set_body (0,"begin");
     285    vhdl->set_body (1,"if in_CLOCK'event and in_CLOCK = '1' then");
     286    vhdl->set_body (2,"if (sig_SPR_IS_HERE = '1') then");
     287    vhdl->set_body (3,"if (sig_A_OR_B("+toString(_param->_size_special_address_register-1)+" downto 0) = "+std_logic_cst(_param->_size_special_address_register,SPR_MACLO)+") then");
     288    vhdl->set_body (4,"reg_MACLO"+toString((_param->_have_port_context_id == 1) ? "(reg_EXECUTE_IN_CONTEXT_ID)" : "(0)")+" <= reg_EXECUTE_IN_DATA_RB;");
     289    vhdl->set_body (3,"end if;");
     290    vhdl->set_body (3,"if (sig_A_OR_B("+toString(_param->_size_special_address_register-1)+" downto 0) = "+std_logic_cst(_param->_size_special_address_register,SPR_MACHI)+") then");
     291    vhdl->set_body (4,"reg_MACHI"+toString((_param->_have_port_context_id == 1) ? "(reg_EXECUTE_IN_CONTEXT_ID)" : "(0)")+" <= reg_EXECUTE_IN_DATA_RB;");
     292    vhdl->set_body (3,"end if;");
     293    vhdl->set_body (2,"end if;");
     294    vhdl->set_body (1,"end if;");
     295    vhdl->set_body (0,"end process;");
     296    vhdl->set_body (0,"");
     297
     298    vhdl->set_body (0,"sig_RES_SPECIAL <=");
     299    vhdl->set_body (1,"sig_MFSPR when (reg_EXECUTE_IN_OPERATION = "+std_logic_cst(_param->_size_operation,OPERATION_SPECIAL_L_MFSPR)+")  else");
     300    vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RB when (reg_EXECUTE_IN_OPERATION = "+std_logic_cst(_param->_size_operation,OPERATION_SPECIAL_L_MTSPR)+")  else");
     301    vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+";");
     302    vhdl->set_body (0,"");
     303
     304    vhdl->set_body (0,"");
     305    vhdl->set_comment(0,"");
     306    vhdl->set_comment(0,"TRANSACTION");
     307    vhdl->set_comment(0,"");
     308//     vhdl->set_body (0,"sig_EXECUTE_OUT_VAL <= reg_BUSY_IN;");
     309//     vhdl->set_body (0,"sig_EXECUTE_IN_ACK <= not reg_BUSY_IN or (reg_BUSY_IN and in_EXECUTE_OUT_ACK);");
     310   
     311    vhdl->set_body (0,"sig_EXECUTE_OUT_VAL <= reg_BUSY_OUT;");
     312    vhdl->set_body (0,"sig_EXECUTE_OUT_UPDATE <= not reg_BUSY_OUT or (reg_BUSY_OUT and in_EXECUTE_OUT_ACK);");
     313    vhdl->set_body (0,"sig_EXECUTE_IN_ACK <= not reg_BUSY_IN or (reg_BUSY_IN and sig_EXECUTE_OUT_UPDATE);");
     314   
     315    vhdl->set_body ("");
     316    vhdl->set_comment(0,"");
     317    vhdl->set_comment(0,"-----------------------------------");
     318    vhdl->set_comment(0,"--                                  ");
     319    vhdl->set_comment(0,"-----------------------------------");
     320    vhdl->set_comment(0,"");
     321    vhdl->set_body ("");
     322    if(_param->_have_port_context_id)
     323      vhdl->set_body (0,"sig_EXECUTE_OUT_CONTEXT_ID <= reg_EXECUTE_IN_CONTEXT_ID;");
     324
     325    if(_param->_have_port_front_end_id)
     326      vhdl->set_body (0,"sig_EXECUTE_OUT_FRONT_END_ID <= reg_EXECUTE_IN_FRONT_END_ID;");
     327
     328    if(_param->_have_port_ooo_engine_id)
     329      vhdl->set_body (0,"sig_EXECUTE_OUT_OOO_ENGINE_ID <= reg_EXECUTE_IN_OOO_ENGINE_ID;");
     330
     331    if(_param->_have_port_rob_ptr)
     332      vhdl->set_body (0,"sig_EXECUTE_OUT_PACKET_ID <= reg_EXECUTE_IN_PACKET_ID;");
     333
     334    vhdl->set_body (0,"sig_EXECUTE_OUT_WRITE_RD <=  reg_EXECUTE_IN_WRITE_RD;");
     335
     336    vhdl->set_body (0,"sig_EXECUTE_OUT_NUM_REG_RD <= reg_EXECUTE_IN_NUM_REG_RD;");
     337
     338    vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select");
     339    vhdl->set_body (0,"sig_EXECUTE_OUT_DATA_RD <=");
     340    vhdl->set_body (1,"sig_RES_ALU when "+std_logic_cst(_param->_size_type,TYPE_ALU)+",");
     341    vhdl->set_body (1,"sig_RES_MOVE when "+std_logic_cst(_param->_size_type,TYPE_MOVE)+",");
     342    vhdl->set_body (1,"sig_RES_BRANCH when "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+",");
     343    vhdl->set_body (1,"sig_RES_SHIFTER when "+std_logic_cst(_param->_size_type,TYPE_SHIFT)+",");
     344    vhdl->set_body (1,"sig_RES_EXTEND when "+std_logic_cst(_param->_size_type,TYPE_EXTEND)+",");
     345    vhdl->set_body (1,"sig_RES_FIND when "+std_logic_cst(_param->_size_type,TYPE_FIND)+",");
     346    vhdl->set_body (1,"sig_RES_SPECIAL when "+std_logic_cst(_param->_size_type,TYPE_SPECIAL)+",");
     347    vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+" when others;");
     348
     349    vhdl->set_body (0,"sig_EXECUTE_OUT_WRITE_RE <= reg_EXECUTE_IN_WRITE_RE;");
     350
     351    vhdl->set_body (0,"sig_EXECUTE_OUT_NUM_REG_RE <= reg_EXECUTE_IN_NUM_REG_RE;");
     352
     353    vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select");
     354    vhdl->set_body (0,"sig_EXECUTE_OUT_DATA_RE <=");
     355    if(FLAG_POSITION_CY > FLAG_POSITION_OV)
     356    vhdl->set_body (1,"sig_COUT_ALU & sig_OVR_ALU when "+std_logic_cst(_param->_size_type,TYPE_ALU)+",");
     357    else
     358    vhdl->set_body (1,"sig_OVR_ALU & sig_COUT_ALU when "+std_logic_cst(_param->_size_type,TYPE_ALU)+",");
     359    vhdl->set_body (1,std_logic_cst(_param->_size_special_data,0)+" when others;");
     360
     361    vhdl->set_body (0,"sig_EXECUTE_OUT_EXCEPTION <=");
     362    vhdl->set_body (1,std_logic_cst(_param->_size_exception,EXCEPTION_ALU_RANGE)+" when (reg_EXECUTE_IN_TYPE = "+std_logic_cst(_param->_size_type,TYPE_ALU)+" and sig_OVR_ALU = '1') else");
     363    vhdl->set_body (1,std_logic_cst(_param->_size_exception,EXCEPTION_ALU_SPR_ACCESS_MUST_READ)+" when (reg_EXECUTE_IN_TYPE = "+std_logic_cst(_param->_size_type,TYPE_SPECIAL)+" and reg_EXECUTE_IN_OPERATION = "+std_logic_cst(_param->_size_operation,OPERATION_SPECIAL_L_MFSPR)+" and sig_SPR_IS_HERE = '0') else");
     364    vhdl->set_body (1,std_logic_cst(_param->_size_exception,EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE)+" when (reg_EXECUTE_IN_TYPE = "+std_logic_cst(_param->_size_type,TYPE_SPECIAL)+" and reg_EXECUTE_IN_OPERATION = "+std_logic_cst(_param->_size_operation,OPERATION_SPECIAL_L_MTSPR)+" and sig_SPR_IS_HERE = '0') else");
     365    vhdl->set_body (1,std_logic_cst(_param->_size_exception,EXCEPTION_NONE)+";");
     366
     367    vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select");
     368    vhdl->set_body (0,"sig_EXECUTE_OUT_NO_SEQUENCE <=");
     369    vhdl->set_body (1,"sig_NOSQ_BRANCH when "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+",");
     370    vhdl->set_body (1,std_logic_cst(1,0)+"when others;");
     371
     372#ifdef SYSTEMC_VHDL_COMPATIBILITY
     373    vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select");
     374    vhdl->set_body (0,"sig_EXECUTE_OUT_ADDRESS <=");
     375    vhdl->set_body (1,"sig_ADDR_BRANCH when "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+",");
     376    vhdl->set_body (1,"sig_A_OR_B("+toString(_param->_size_instruction_address-1)+" downto 0) when "+std_logic_cst(_param->_size_type,TYPE_SPECIAL)+",");
     377    vhdl->set_body (1,std_logic_cst(_param->_size_instruction_address,0)+" when others;");
     378#else
     379    vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select");
     380    vhdl->set_body (0,"sig_EXECUTE_OUT_ADDRESS <=");
     381    vhdl->set_body (1,"sig_ADDR_BRANCH when "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+",");
     382    vhdl->set_body (1,"sig_A_OR_B when others;");
     383//    vhdl->set_body (0,"sig_EXECUTE_OUT_ADDRESS <= sig_ADDR_BRANCH;");
     384#endif
     385
     386    vhdl->set_body ("");
     387    vhdl->set_comment(0,"");
     388    vhdl->set_comment(0,"-----------------------------------");
     389    vhdl->set_comment(0,"-- Outputs                          ");
     390    vhdl->set_comment(0,"-----------------------------------");
     391    vhdl->set_comment(0,"");
     392    vhdl->set_body ("");
     393//     if(_param->_have_port_context_id)
     394//       vhdl->set_body (0,"out_EXECUTE_OUT_CONTEXT_ID <= sig_EXECUTE_OUT_CONTEXT_ID;");
     395//     if(_param->_have_port_front_end_id)
     396//       vhdl->set_body (0,"out_EXECUTE_OUT_FRONT_END_ID <= sig_EXECUTE_OUT_FRONT_END_ID;");
     397//     if(_param->_have_port_ooo_engine_id)
     398//       vhdl->set_body (0,"out_EXECUTE_OUT_OOO_ENGINE_ID <= sig_EXECUTE_OUT_OOO_ENGINE_ID;");
     399//     if(_param->_have_port_rob_ptr)
     400//       vhdl->set_body (0,"out_EXECUTE_OUT_PACKET_ID <= sig_EXECUTE_OUT_PACKET_ID;");
     401//     vhdl->set_body (0,"out_EXECUTE_OUT_WRITE_RD <=  sig_EXECUTE_OUT_WRITE_RD;");
     402//     vhdl->set_body (0,"out_EXECUTE_OUT_NUM_REG_RD <= sig_EXECUTE_OUT_NUM_REG_RD;");
     403//     vhdl->set_body (0,"out_EXECUTE_OUT_DATA_RD <= sig_EXECUTE_OUT_DATA_RD;");
     404//     vhdl->set_body (0,"out_EXECUTE_OUT_WRITE_RE <= sig_EXECUTE_OUT_WRITE_RE;");
     405//     vhdl->set_body (0,"out_EXECUTE_OUT_NUM_REG_RE <= sig_EXECUTE_OUT_NUM_REG_RE;");
     406//     vhdl->set_body (0,"out_EXECUTE_OUT_DATA_RE <= sig_EXECUTE_OUT_DATA_RE;");
     407//     vhdl->set_body (0,"out_EXECUTE_OUT_EXCEPTION <= sig_EXECUTE_OUT_EXCEPTION;");
     408//     vhdl->set_body (0,"out_EXECUTE_OUT_NO_SEQUENCE <= sig_EXECUTE_OUT_NO_SEQUENCE;");
     409//     vhdl->set_body (0,"out_EXECUTE_OUT_ADDRESS <= sig_EXECUTE_OUT_ADDRESS;");
     410//     vhdl->set_body (0,"out_EXECUTE_OUT_VAL <= sig_EXECUTE_OUT_VAL;");
     411//     vhdl->set_body (0,"out_EXECUTE_IN_ACK <= sig_EXECUTE_IN_ACK;");
     412
     413    if(_param->_have_port_context_id)
     414      vhdl->set_body (0,"out_EXECUTE_OUT_CONTEXT_ID <= reg_EXECUTE_OUT_CONTEXT_ID;");
     415    if(_param->_have_port_front_end_id)
     416      vhdl->set_body (0,"out_EXECUTE_OUT_FRONT_END_ID <= reg_EXECUTE_OUT_FRONT_END_ID;");
     417    if(_param->_have_port_ooo_engine_id)
     418      vhdl->set_body (0,"out_EXECUTE_OUT_OOO_ENGINE_ID <= reg_EXECUTE_OUT_OOO_ENGINE_ID;");
     419    if(_param->_have_port_rob_ptr)
     420      vhdl->set_body (0,"out_EXECUTE_OUT_PACKET_ID <= reg_EXECUTE_OUT_PACKET_ID;");
     421    vhdl->set_body (0,"out_EXECUTE_OUT_WRITE_RD <=  reg_EXECUTE_OUT_WRITE_RD;");
     422    vhdl->set_body (0,"out_EXECUTE_OUT_NUM_REG_RD <= reg_EXECUTE_OUT_NUM_REG_RD;");
     423    vhdl->set_body (0,"out_EXECUTE_OUT_DATA_RD <= reg_EXECUTE_OUT_DATA_RD;");
     424    vhdl->set_body (0,"out_EXECUTE_OUT_WRITE_RE <= reg_EXECUTE_OUT_WRITE_RE;");
     425    vhdl->set_body (0,"out_EXECUTE_OUT_NUM_REG_RE <= reg_EXECUTE_OUT_NUM_REG_RE;");
     426    vhdl->set_body (0,"out_EXECUTE_OUT_DATA_RE <= reg_EXECUTE_OUT_DATA_RE;");
     427    vhdl->set_body (0,"out_EXECUTE_OUT_EXCEPTION <= reg_EXECUTE_OUT_EXCEPTION;");
     428    vhdl->set_body (0,"out_EXECUTE_OUT_NO_SEQUENCE <= reg_EXECUTE_OUT_NO_SEQUENCE;");
     429    vhdl->set_body (0,"out_EXECUTE_OUT_ADDRESS <= reg_EXECUTE_OUT_ADDRESS;");
     430    vhdl->set_body (0,"out_EXECUTE_OUT_VAL <= sig_EXECUTE_OUT_VAL;");
     431    vhdl->set_body (0,"out_EXECUTE_IN_ACK <= sig_EXECUTE_IN_ACK;");
     432
    27433    log_printf(FUNC,Functionnal_unit,FUNCTION,"End");
    28434  };
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