Changeset 131 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/RegisterFile_allocation.cpp
- Timestamp:
- Jul 8, 2009, 8:40:08 PM (15 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/src/RegisterFile_allocation.cpp
r82 r131 3 3 * $Id$ 4 4 * 5 * [ 5 * [ Description ] 6 6 * 7 7 */ 8 8 9 9 #include "Behavioural/Generic/RegisterFile/include/RegisterFile.h" 10 #include "Behavioural/include/Allocation.h" 10 11 11 12 namespace morpheo { … … 13 14 namespace generic { 14 15 namespace registerfile { 15 16 16 17 17 void RegisterFile::allocation ( … … 27 27 log_printf(FUNC,RegisterFile,"allocation","Begin"); 28 28 29 // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 29 #ifdef SYSTEMCASS_SPECIFIC 30 // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 30 31 { 31 in_CLOCK = new SC_CLOCK ("in_CLOCK");32 in_NRESET = new SC_IN (Tcontrol_t) ("in_NRESET");32 __ALLOC0_SIGNAL(in_CLOCK ,"in_CLOCK" ,SC_CLOCK ); 33 __ALLOC0_SIGNAL(in_NRESET,"in_NRESET",SC_IN (Tcontrol_t)); 33 34 } 34 // ~~~~~[ Interface : "read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 35 // ~~~~~[ Interface : "read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 36 { 37 __ALLOC1_INTERFACE_BEGIN("READ",_param->_nb_port_read); 35 38 36 in_READ_VAL = new SC_IN (Tcontrol_t) * [_param->_nb_port_read];37 out_READ_ACK = new SC_OUT(Tcontrol_t) * [_param->_nb_port_read];38 if (_param->_have_port_address == true)39 in_READ_ADDRESS = new SC_IN (Taddress_t) * [_param->_nb_port_read];40 out_READ_DATA = new SC_OUT(Tdata_t ) * [_param->_nb_port_read];39 __ALLOC1_SIGNAL_IN ( in_READ_VAL ,"VAL" ,Tcontrol_t); 40 __ALLOC1_SIGNAL_OUT(out_READ_ACK ,"ACK" ,Tcontrol_t); 41 if (_param->_have_port_address) 42 __ALLOC1_SIGNAL_IN ( in_READ_ADDRESS,"ADDRESS",Taddress_t); 43 __ALLOC1_SIGNAL_OUT(out_READ_DATA ,"DATA" ,Tdata_t ); 41 44 42 for (uint32_t i=0; i<_param->_nb_port_read; i++) 43 { 44 rename = "in_READ_"+toString(i)+"_VAL" ; 45 in_READ_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); 46 rename = "out_READ_"+toString(i)+"_ACK" ; 47 out_READ_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); 48 if (_param->_have_port_address == true) 49 { 50 rename = "in_READ_"+toString(i)+"_ADDRESS"; 51 in_READ_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); 52 } 53 rename = "out_READ_"+toString(i)+"_DATA" ; 54 out_READ_DATA [i] = new SC_OUT(Tdata_t ) (rename.c_str()); 55 } 45 __ALLOC1_INTERFACE_END(_param->_nb_port_read); 46 } 56 47 57 // ~~~~~[ Interface : "write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 48 // ~~~~~[ Interface : "write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 49 { 50 __ALLOC1_INTERFACE_BEGIN("WRITE",_param->_nb_port_write); 58 51 59 in_WRITE_VAL = new SC_IN (Tcontrol_t) * [_param->_nb_port_write]; 60 out_WRITE_ACK = new SC_OUT(Tcontrol_t) * [_param->_nb_port_write]; 61 if (_param->_have_port_address == true) 62 in_WRITE_ADDRESS = new SC_IN (Taddress_t) * [_param->_nb_port_write]; 63 in_WRITE_DATA = new SC_IN (Tdata_t ) * [_param->_nb_port_write]; 64 65 for (uint32_t i=0; i<_param->_nb_port_write; i++) 66 { 67 rename = "in_WRITE_"+toString(i)+"_VAL" ; 68 in_WRITE_VAL [i] = new SC_IN (Tcontrol_t) (rename.c_str()); 69 rename = "out_WRITE_"+toString(i)+"_ACK" ; 70 out_WRITE_ACK [i] = new SC_OUT(Tcontrol_t) (rename.c_str()); 71 if (_param->_have_port_address == true) 72 { 73 rename = "in_WRITE_"+toString(i)+"_ADDRESS"; 74 in_WRITE_ADDRESS [i] = new SC_IN (Taddress_t) (rename.c_str()); 75 } 76 rename = "in_WRITE_"+toString(i)+"_DATA" ; 77 in_WRITE_DATA [i] = new SC_IN (Tdata_t ) (rename.c_str()); 78 } 52 __ALLOC1_SIGNAL_IN ( in_WRITE_VAL ,"VAL" ,Tcontrol_t); 53 __ALLOC1_SIGNAL_OUT(out_WRITE_ACK ,"ACK" ,Tcontrol_t); 54 if (_param->_have_port_address) 55 __ALLOC1_SIGNAL_IN ( in_WRITE_ADDRESS,"ADDRESS",Taddress_t); 56 __ALLOC1_SIGNAL_IN ( in_WRITE_DATA ,"DATA" ,Tdata_t ); 79 57 80 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 58 __ALLOC1_INTERFACE_END(_param->_nb_port_write); 59 } 60 #endif 61 62 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 81 63 if (_param->_instance == instance_RegisterFile_Monolithic) 82 64 // =====[ component_RegisterFile_Monolithic ]========================= … … 106 88 // =====[ Component_RegisterFile_Monolithic - Instanciation ]========= 107 89 { 108 (*(component_RegisterFile_Monolithic ->in_CLOCK )) (*(in_CLOCK )); 90 #ifdef SYSTEMCASS_SPECIFIC 91 (*(component_RegisterFile_Monolithic ->in_CLOCK )) (*(in_CLOCK )); 109 92 (*(component_RegisterFile_Monolithic ->in_NRESET)) (*(in_NRESET)); 110 93 … … 126 109 (*(component_RegisterFile_Monolithic -> in_WRITE_DATA [i])) (*( in_WRITE_DATA [i])); 127 110 } 111 #else 112 in_CLOCK = component_RegisterFile_Monolithic-> in_CLOCK ; 113 in_NRESET = component_RegisterFile_Monolithic-> in_NRESET ; 114 115 in_READ_VAL = component_RegisterFile_Monolithic-> in_READ_VAL ; 116 out_READ_ACK = component_RegisterFile_Monolithic->out_READ_ACK ; 117 in_READ_ADDRESS = component_RegisterFile_Monolithic-> in_READ_ADDRESS ; 118 out_READ_DATA = component_RegisterFile_Monolithic->out_READ_DATA ; 119 120 in_WRITE_VAL = component_RegisterFile_Monolithic-> in_WRITE_VAL ; 121 out_WRITE_ACK = component_RegisterFile_Monolithic->out_WRITE_ACK ; 122 in_WRITE_ADDRESS = component_RegisterFile_Monolithic-> in_WRITE_ADDRESS; 123 in_WRITE_DATA = component_RegisterFile_Monolithic-> in_WRITE_DATA ; 124 #endif 128 125 } 129 126 else 130 127 // =====[ Component_RegisterFile_Multi_Banked - Instanciation ]======= 131 128 { 129 #ifdef SYSTEMCASS_SPECIFIC 132 130 (*(component_RegisterFile_Multi_Banked->in_CLOCK )) (*(in_CLOCK )); 133 131 (*(component_RegisterFile_Multi_Banked->in_NRESET)) (*(in_NRESET)); … … 150 148 (*(component_RegisterFile_Multi_Banked-> in_WRITE_DATA [i])) (*( in_WRITE_DATA [i])); 151 149 } 150 #else 151 in_CLOCK = component_RegisterFile_Multi_Banked-> in_CLOCK ; 152 in_NRESET = component_RegisterFile_Multi_Banked-> in_NRESET ; 153 154 in_READ_VAL = component_RegisterFile_Multi_Banked-> in_READ_VAL ; 155 out_READ_ACK = component_RegisterFile_Multi_Banked->out_READ_ACK ; 156 in_READ_ADDRESS = component_RegisterFile_Multi_Banked-> in_READ_ADDRESS ; 157 out_READ_DATA = component_RegisterFile_Multi_Banked->out_READ_DATA ; 158 159 in_WRITE_VAL = component_RegisterFile_Multi_Banked-> in_WRITE_VAL ; 160 out_WRITE_ACK = component_RegisterFile_Multi_Banked->out_WRITE_ACK ; 161 in_WRITE_ADDRESS = component_RegisterFile_Multi_Banked-> in_WRITE_ADDRESS; 162 in_WRITE_DATA = component_RegisterFile_Multi_Banked-> in_WRITE_DATA ; 163 #endif 164 152 165 } 153 166
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