Changeset 3 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_body.cpp
- Timestamp:
- Mar 6, 2007, 3:34:04 PM (17 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_body.cpp
r2 r3 20 20 { 21 21 log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_body","Begin"); 22 vhdl.set_body (""); 22 23 list<string> list_port_map; 24 25 if (_param._have_bht) 26 { 27 list_port_map.clear(); 28 29 vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK"); 30 31 for (uint32_t i=0; i<_param._nb_prediction; i++) 32 { 33 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_VAL_"+toString(i)+" "," in_PREDICT_VAL_"+toString(i)); 34 vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_ACK_"+toString(i)+" ","signal_PREDICT_BHT_ACK_"+toString(i)); 35 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_ADDRESS_"+toString(i)+" ","signal_PREDICT_BHT_ADDRESS_"+toString(i)); 36 vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_HISTORY_"+toString(i)+" ","signal_PREDICT_BHT_HISTORY_"+toString(i)); 37 } 38 39 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 40 { 41 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_VAL_"+toString(i)+" "," in_BRANCH_COMPLETE_VAL_"+toString(i)); 42 vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_ACK_"+toString(i)+" ","signal_BRANCH_COMPLETE_BHT_ACK_"+toString(i)); 43 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ","signal_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i)); 44 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" "," in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)); 45 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+""," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)); 46 } 47 48 vhdl.set_body_component ("component_Branch_History_Table",_name+"_Branch_History_Table",list_port_map); 49 } 50 51 if (_param._have_pht) 52 { 53 list_port_map.clear(); 54 55 vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK"); 56 57 for (uint32_t i=0; i<_param._nb_prediction; i++) 58 { 59 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_VAL_"+toString(i)+" "," in_PREDICT_VAL_"+toString(i)); 60 vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_ACK_"+toString(i)+" ","signal_PREDICT_PHT_ACK_"+toString(i)); 61 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_ADDRESS_"+toString(i)+" ","signal_PREDICT_PHT_ADDRESS_"+toString(i)); 62 vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_HISTORY_"+toString(i)+" "," out_PREDICT_PHT_HISTORY_"+toString(i)); 63 } 64 65 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 66 { 67 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_VAL_"+toString(i)+" "," in_BRANCH_COMPLETE_VAL_"+toString(i)); 68 vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_ACK_"+toString(i)+" ","signal_BRANCH_COMPLETE_PHT_ACK_"+toString(i)); 69 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" ","signal_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i)); 70 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_HISTORY_"+toString(i)+" "," in_BRANCH_COMPLETE_PHT_HISTORY_"+toString(i)); 71 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)+""," in_BRANCH_COMPLETE_DIRECTION_"+toString(i)); 72 } 73 74 vhdl.set_body_component ("component_Pattern_History_Table",_name+"_Pattern_History_Table",list_port_map); 75 } 76 77 list_port_map.clear(); 78 79 for (uint32_t i=0; i<_param._nb_prediction; i++) 80 { 81 if (_param._have_bht) 82 { 83 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_BHT_ACK_"+toString(i)+" ","signal_PREDICT_BHT_ACK_"+toString(i)); 84 vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_BHT_ADDRESS_"+toString(i)+" ","signal_PREDICT_BHT_ADDRESS_"+toString(i)); 85 } 86 if (_param._have_pht) 87 { 88 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_PHT_ACK_"+toString(i)+" ","signal_PREDICT_PHT_ACK_"+toString(i)); 89 vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_PHT_ADDRESS_"+toString(i)+" ","signal_PREDICT_PHT_ADDRESS_"+toString(i)); 90 } 91 if (_param._have_bht and _param._have_pht) 92 { 93 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_BHT_HISTORY_"+toString(i)+" ","signal_PREDICT_BHT_HISTORY_"+toString(i)); 94 } 95 vhdl.set_body_component_port_map (list_port_map,"out_PREDICT_ACK_"+toString(i)+" "," out_PREDICT_ACK_"+toString(i)); 96 vhdl.set_body_component_port_map (list_port_map," in_PREDICT_ADDRESS_"+toString(i)+" "," in_PREDICT_ADDRESS_"+toString(i)); 97 } 98 99 for (uint32_t i=0; i<_param._nb_branch_complete; i++) 100 { 101 if (_param._have_bht) 102 { 103 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_BHT_ACK_"+toString(i)+" ","signal_BRANCH_COMPLETE_BHT_ACK_"+toString(i)); 104 vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i)+"","signal_BRANCH_COMPLETE_BHT_ADDRESS_"+toString(i)); 105 } 106 if (_param._have_pht) 107 { 108 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_PHT_ACK_"+toString(i)+" ","signal_BRANCH_COMPLETE_PHT_ACK_"+toString(i)); 109 vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i)+"","signal_BRANCH_COMPLETE_PHT_ADDRESS_"+toString(i)); 110 } 111 if (_param._have_bht and _param._have_pht) 112 { 113 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)+""," in_BRANCH_COMPLETE_BHT_HISTORY_"+toString(i)); 114 } 115 vhdl.set_body_component_port_map (list_port_map,"out_BRANCH_COMPLETE_ACK_"+toString(i)+" "," out_BRANCH_COMPLETE_ACK_"+toString(i)); 116 vhdl.set_body_component_port_map (list_port_map," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)+" "," in_BRANCH_COMPLETE_ADDRESS_"+toString(i)); 117 } 118 119 vhdl.set_body_component ("component_Two_Level_Branch_Predictor_Glue",_name+"_Two_Level_Branch_Predictor_Glue",list_port_map); 120 121 if (_param._have_bht) 122 for (uint32_t i=0; i<_param._nb_prediction; i++) 123 vhdl.set_body("out_PREDICT_BHT_HISTORY_"+toString(i)+" <= signal_PREDICT_BHT_HISTORY_"+toString(i)+";"); 124 23 125 log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_body","End"); 24 126 };
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