Changeset 3 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_transition.cpp

Timestamp:

Mar 6, 2007, 3:34:04 PM (17 years ago)

Author:

kane

Message:

1) Ajout d'un "printer" XML pour la configuration de paramètres

2) Fin du composant "Two_Level_Branch_Predictor"

validation * systemc

• vhdl

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_transition.cpp (modified) (1 diff)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_transition.cpp

@@ -29 +29 @@
     // (because we have no control on the ordonnancer's policy)
 
-//     _vhdl_testbench->add_input (PORT_READ( in_NRESET));
     for (uint32_t i=0; i<_param._nb_prediction; i++)
       {
-        _vhdl_testbench->add_input (PORT_READ( in_PREDICT_VAL                 [i]));
-        _vhdl_testbench->add_output(PORT_READ(out_PREDICT_ACK                 [i]));
-        _vhdl_testbench->add_input (PORT_READ( in_PREDICT_ADDRESS             [i]));
+        _vhdl_testbench->add_input (PORT_READ( in_PREDICT_VAL                          [i]));
+        _vhdl_testbench->add_output(PORT_READ(component_Two_Level_Branch_Predictor_Glue->
+                                              out_PREDICT_ACK                          [i]));
+        _vhdl_testbench->add_input (PORT_READ( in_PREDICT_ADDRESS                      [i]));
         if (_param._have_bht)
-        _vhdl_testbench->add_output(PORT_READ(out_PREDICT_BHT_HISTORY         [i]));
+        _vhdl_testbench->add_output(PORT_READ(component_Branch_History_Table           ->
+                                              component_RegisterFile                   ->
+                                              out_READ_DATA                            [i]));
         if (_param._have_pht)
-        _vhdl_testbench->add_output(PORT_READ(out_PREDICT_PHT_HISTORY         [i]));
+        _vhdl_testbench->add_output(PORT_READ(component_Pattern_History_Table          ->
+                                              component_RegisterFile                   ->
+                                              out_READ_DATA                            [i]));
       }
 
     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
       {
-        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_VAL         [i]));
-        _vhdl_testbench->add_output(PORT_READ(out_BRANCH_COMPLETE_ACK         [i]));
-        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ADDRESS     [i]));
+        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_VAL                  [i]));
+        _vhdl_testbench->add_output(PORT_READ(component_Two_Level_Branch_Predictor_Glue->
+                                              out_BRANCH_COMPLETE_ACK                  [i]));
+        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_ADDRESS              [i]));
         if (_param._have_bht)
-        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_BHT_HISTORY [i]));
-        if (_param._have_bht)
-        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_PHT_HISTORY [i]));
-        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_HIT         [i]));
+        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_BHT_HISTORY          [i]));
+        if (_param._have_pht)
+        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_PHT_HISTORY          [i]));
+        _vhdl_testbench->add_input (PORT_READ( in_BRANCH_COMPLETE_DIRECTION            [i]));
       }