Ignore:
Timestamp:
Sep 28, 2007, 2:58:08 PM (17 years ago)
Author:
rosiere
Message:
  • VHDL - RegisterFile_Multi_Banked (only partial_crossbar)
  • SystemC - modif Component, interface and co -> ajout du type Tusage_T pour instancier un coposant mais ne demander que le VHDL ou le systemC.
  • Séminaire interne
File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_partial_crossbar_genMealy_read.cpp

    r53 r57  
    2121    log_printf(FUNC,RegisterFile_Multi_Banked,"partial_crossbar_genMealy_read","Begin");
    2222
    23     bool read_port_use [_param._nb_bank][_param._nb_port_read_by_bank];
     23    bool read_port_use [_param->_nb_bank][_param->_nb_port_read_by_bank];
    2424
    25     for (uint32_t i=0; i<_param._nb_bank; i++)
    26       for (uint32_t j=0; j<_param._nb_port_read_by_bank; j++)
     25    for (uint32_t i=0; i<_param->_nb_bank; i++)
     26      for (uint32_t j=0; j<_param->_nb_port_read_by_bank; j++)
    2727        read_port_use [i][j]=false;
    2828
    29     for (uint32_t i=0; i<_param._nb_port_read; i++)
     29    for (uint32_t i=0; i<_param->_nb_port_read; i++)
    3030      {
    3131        bool val = PORT_READ(in_READ_VAL    [i]);
     
    4343
    4444//          // Search loop
    45 //          for (uint32_t j=0; j<_param._nb_port_read_by_bank; j++)
     45//          for (uint32_t j=0; j<_param->_nb_port_read_by_bank; j++)
    4646//            {
    4747           
    48             uint32_t j = _param._link_port_read_to_bank_read [i];
     48            uint32_t j = _param->_link_port_read_to_bank_read [i];
    4949
    5050                // find a unbusy port on this bank
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