Changeset 57 for trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-overview.fig

Timestamp:

Sep 28, 2007, 2:58:08 PM (17 years ago)

Author:

rosiere

Message:

• VHDL - RegisterFile_Multi_Banked (only partial_crossbar)
• SystemC - modif Component, interface and co -> ajout du type Tusage_T pour instancier un coposant mais ne demander que le VHDL ou le systemC.
• Séminaire interne

File:

• trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-overview.fig (modified) (4 diffs)

trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/MORPHEO_micro_architecture-overview.fig

@@ -1 @@
-#FIG 3.2  Produced by xfig version 3.2.5-alpha5
+#FIG 3.2
 Landscape
 Center
@@ -11 +11 @@
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          5490 4140 4770 4140 4770 3690 5490 3690 5490 4140
-4 1 0 50 -1 -1 12 0.0000 4 135 495 5130 3960 decod\001
+4 1 0 50 -1 -1 12 0.0000 4 135 450 5130 3960 decod\001
 -6
 6 4770 3240 5490 3690
 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5
          5490 3690 4770 3690 4770 3240 5490 3240 5490 3690
-4 1 0 50 -1 -1 12 0.0000 4 120 615 5130 3420 context\001
-4 1 0 50 -1 -1 12 0.0000 4 120 375 5130 3600 state\001
+4 1 0 50 -1 -1 12 0.0000 4 105 570 5130 3420 context\001
+4 1 0 50 -1 -1 12 0.0000 4 105 390 5130 3600 state\001
 -6
 6 5850 3690 6570 4140
 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5
          6570 4140 5850 4140 5850 3690 6570 3690 6570 4140
-4 1 0 50 -1 -1 12 0.0000 4 90 585 6210 3960 rename\001
+4 1 0 50 -1 -1 12 0.0000 4 90 555 6210 3960 rename\001
 -6
 6 8370 3690 9090 4140
 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5
          9090 4140 8370 4140 8370 3690 9090 3690 9090 4140
-4 1 0 50 -1 -1 12 0.0000 4 135 345 8730 3960 read\001
+4 1 0 50 -1 -1 12 0.0000 4 135 330 8730 3960 read\001
 -6
 6 11250 3690 11970 4140
 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5
          11970 4140 11250 4140 11250 3690 11970 3690 11970 4140
-4 1 0 50 -1 -1 12 0.0000 4 135 405 11610 3960 write\001
--6
-6 9810 3420 10530 3870
-2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 5
-         10530 3870 9810 3870 9810 3420 10530 3420 10530 3870
-4 1 0 50 -1 -1 12 0.0000 4 135 660 10170 3690 memory\001
--6
-6 9810 3960 10530 4410
-2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5
-         10530 4410 9810 4410 9810 3960 10530 3960 10530 4410
-4 1 0 50 -1 -1 12 0.0000 4 120 630 10170 4230 execute\001
+4 1 0 50 -1 -1 12 0.0000 4 135 390 11610 3960 write\001
 -6
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 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5
          10530 2925 9810 2925 9810 2475 10530 2475 10530 2925
-4 1 0 50 -1 -1 12 0.0000 4 165 330 10170 2835 port\001
-4 1 0 50 -1 -1 12 0.0000 4 135 570 10170 2655 dcache\001
+4 1 0 50 -1 -1 12 0.0000 4 150 300 10170 2835 port\001
+4 1 0 50 -1 -1 12 0.0000 4 135 540 10170 2655 dcache\001
 -6
 6 6570 3015 7290 3465
 2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 5
          7290 3465 6570 3465 6570 3015 7290 3015 7290 3465
-4 1 0 50 -1 -1 12 0.0000 4 135 615 6930 3285 commit\001
+4 1 0 50 -1 -1 12 0.0000 4 135 555 6930 3285 commit\001
 -6
 6 3825 3060 4635 3510
 2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 5
          4590 3510 3870 3510 3870 3060 4590 3060 4590 3510
-4 1 0 50 -1 -1 12 0.0000 4 180 735 4230 3330 predictor\001
+4 1 0 50 -1 -1 12 0.0000 4 180 675 4230 3330 predictor\001
 -6
 6 2970 3690 3690 4140
 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5
          3690 4140 2970 4140 2970 3690 3690 3690 3690 4140
-4 1 0 50 -1 -1 12 0.0000 4 135 405 3330 3960 fetch\001
+4 1 0 50 -1 -1 12 0.0000 4 135 390 3330 3960 fetch\001
 -6
 6 1890 3690 2610 4140
 2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5
          2610 4140 1890 4140 1890 3690 2610 3690 2610 4140
-4 1 0 50 -1 -1 12 0.0000 4 165 330 2250 4050 port\001
-4 1 0 50 -1 -1 12 0.0000 4 135 525 2250 3870 icache\001
+4 1 0 50 -1 -1 12 0.0000 4 150 300 2250 4050 port\001
+4 1 0 50 -1 -1 12 0.0000 4 135 495 2250 3870 icache\001
 -6
 6 1800 4590 5265 5355
@@ -78 +68 @@
 2 4 0 1 0 31 50 -1 20 4.000 0 0 7 0 0 5
          2160 5310 1800 5310 1800 5130 2160 5130 2160 5310
-4 0 0 50 -1 -1 12 0.0000 4 180 600 2340 4770 Groupe\001
-4 0 0 50 -1 -1 12 0.0000 4 180 2430 2340 5310 Une occurence dans le groupe\001
-4 0 0 50 -1 -1 12 0.0000 4 180 2910 2340 5040 Plusieurs occurences dans le groupe\001
+4 0 0 50 -1 -1 12 0.0000 4 180 555 2340 4770 Groupe\001
+4 0 0 50 -1 -1 12 0.0000 4 180 2280 2340 5310 Une occurence dans le groupe\001
+4 0 0 50 -1 -1 12 0.0000 4 180 2760 2340 5040 Plusieurs occurences dans le groupe\001
 -6
 2 1 0 1 0 7 50 -1 -1 4.000 0 0 -1 1 0 4
@@ -176 +166 @@
 2 4 0 1 0 7 50 -1 20 3.000 0 0 8 0 0 5
          8010 2880 8010 4320 7650 4320 7650 2880 8010 2880
-4 1 0 50 -1 -1 12 0.0000 4 180 600 10170 4905 register\001
+2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5
+         10530 4410 9810 4410 9810 3960 10530 3960 10530 4410
+2 4 0 1 0 11 50 -1 20 4.000 0 0 7 0 0 5
+         10530 3870 9810 3870 9810 3420 10530 3420 10530 3870
+4 1 0 50 -1 -1 12 0.0000 4 180 585 10170 4905 register\001
 4 1 0 50 -1 -1 12 1.5708 4 135 465 10935 3915 select\001
 4 1 0 50 -1 -1 12 1.5708 4 135 465 9495 3915 select\001
-4 0 1 50 -1 -1 12 0.0000 4 135 390 1710 2205 Core\001
-4 0 1 50 -1 -1 12 0.0000 4 135 810 2790 2790 Front End\001
-4 0 1 50 -1 -1 12 0.0000 4 180 1320 8190 3015 Execution Loop\001
-4 0 1 50 -1 -1 12 0.0000 4 180 1665 5760 2520 Out Of Order Engine\001
+4 0 1 50 -1 -1 12 0.0000 4 135 360 1710 2205 Core\001
+4 0 1 50 -1 -1 12 0.0000 4 135 750 2790 2790 Front End\001
+4 0 1 50 -1 -1 12 0.0000 4 180 1185 8190 3015 Execution Loop\001
+4 0 1 50 -1 -1 12 0.0000 4 180 1575 5760 2520 Out Of Order Engine\001
 4 1 0 50 -1 -1 12 1.5708 4 135 465 7875 3600 select\001
+4 1 0 50 -1 -1 12 0.0000 4 105 600 10170 4230 execute\001
+4 1 0 50 -1 -1 12 0.0000 4 135 600 10170 3690 memory\001