Changeset 58 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_vhdl_body.cpp
- Timestamp:
- Oct 1, 2007, 1:36:39 PM (17 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/src/RegisterFile_Multi_Banked_vhdl_body.cpp
r57 r58 82 82 for (uint32_t k=0; k<nb_port; k++) 83 83 { 84 uint32_t num_port = _param->_nb_port_read_by_bank*k+j;84 uint32_t num_port = (_param->_crossbar == FULL_CROSSBAR)?k:(_param->_nb_port_read_by_bank*k+j); 85 85 string separator = ((k==0)?" ":","); 86 87 vhdl->set_body("\t"+separator+" in_VAL_"+toString(k)+" \t=>\tinternal_READ_"+toString(i)+"_"+toString(num_port)+"_VAL"); 88 vhdl->set_body("\t,out_ACK_"+toString(k)+" \t=>\tinternal_SELECT_READ_"+toString(i)+"_"+toString(num_port)+"_VAL"); 86 string index = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):""; 87 88 vhdl->set_body("\t"+separator+" in_VAL_"+toString(k)+" \t=>\tinternal_READ_"+toString(i)+"_"+toString(num_port)+index+"_VAL"); 89 vhdl->set_body("\t,out_ACK_"+toString(k)+" \t=>\tinternal_SELECT_READ_"+toString(i)+"_"+toString(num_port)+index+"_VAL"); 89 90 } 90 91 vhdl->set_body(");"); … … 100 101 for (uint32_t k=0; k<nb_port; k++) 101 102 { 102 uint32_t num_port = _param->_nb_port_write_by_bank*k+j;103 uint32_t num_port = (_param->_crossbar == FULL_CROSSBAR)?k:(_param->_nb_port_write_by_bank*k+j); 103 104 string separator = ((k==0)?" ":","); 105 string index = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):""; 104 106 105 vhdl->set_body("\t"+separator+" in_VAL_"+toString(k)+" \t=>\tinternal_WRITE_"+toString(i)+"_"+toString(num_port)+ "_VAL");106 vhdl->set_body("\t,out_ACK_"+toString(k)+" \t=>\tinternal_SELECT_WRITE_"+toString(i)+"_"+toString(num_port)+ "_VAL");107 vhdl->set_body("\t"+separator+" in_VAL_"+toString(k)+" \t=>\tinternal_WRITE_"+toString(i)+"_"+toString(num_port)+index+"_VAL"); 108 vhdl->set_body("\t,out_ACK_"+toString(k)+" \t=>\tinternal_SELECT_WRITE_"+toString(i)+"_"+toString(num_port)+index+"_VAL"); 107 109 } 108 110 vhdl->set_body(");"); … … 122 124 uint32_t nb_port = (_param->_crossbar == FULL_CROSSBAR)?_param->_nb_port_read:((j<read_select_limit)?read_nb_select1:read_nb_select2); 123 125 124 vhdl->set_body("internal_BANK_READ_"+toString(i)+"_"+toString(j)+ "_VAL <= '0'");126 vhdl->set_body("internal_BANK_READ_"+toString(i)+"_"+toString(j)+ "_VAL <= '0'"); 125 127 for (uint32_t k=0; k<nb_port; k++) 126 128 { 127 uint32_t num_port = _param->_nb_port_read_by_bank*k+j;128 129 vhdl->set_body("\tor internal_SELECT_READ_"+toString(i)+"_"+toString(num_port)+ "_VAL");129 uint32_t num_port = (_param->_crossbar == FULL_CROSSBAR)?k:(_param->_nb_port_read_by_bank*k+j); 130 string index = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):""; 131 vhdl->set_body("\tor internal_SELECT_READ_"+toString(i)+"_"+toString(num_port)+index+"_VAL"); 130 132 } 131 133 vhdl->set_body(";"); … … 138 140 for (uint32_t k=0; k<nb_port; k++) 139 141 { 140 uint32_t num_port = _param->_nb_port_write_by_bank*k+j; 141 142 vhdl->set_body("\tor internal_SELECT_WRITE_"+toString(i)+"_"+toString(num_port)+"_VAL"); 142 uint32_t num_port = (_param->_crossbar == FULL_CROSSBAR)?k:(_param->_nb_port_write_by_bank*k+j); 143 string index = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):""; 144 145 vhdl->set_body("\tor internal_SELECT_WRITE_"+toString(i)+"_"+toString(num_port)+index+"_VAL"); 143 146 } 144 147 vhdl->set_body(";"); … … 157 160 uint32_t nb_port = (_param->_crossbar == FULL_CROSSBAR)?_param->_nb_port_read:((j<read_select_limit)?read_nb_select1:read_nb_select2); 158 161 159 vhdl->set_body("internal_BANK_READ_"+toString(i)+"_"+toString(j)+ "_ADDRESS <=");162 vhdl->set_body("internal_BANK_READ_"+toString(i)+"_"+toString(j)+ "_ADDRESS <="); 160 163 for (uint32_t k=1; k<nb_port; k++) 161 164 { 162 uint32_t num_port = _param->_nb_port_read_by_bank*k+j; 163 164 vhdl->set_body("\tin_READ_"+toString(num_port)+"_ADDRESS"+std_logic_range(_param->_size_address_by_bank)+" when internal_READ_"+toString(i)+"_"+toString(num_port)+"_VAL='1' else"); 165 uint32_t num_port = (_param->_crossbar == FULL_CROSSBAR)?k:(_param->_nb_port_read_by_bank*k+j); 166 string index = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):""; 167 168 vhdl->set_body("\tin_READ_"+toString(num_port)+"_ADDRESS"+std_logic_range(_param->_size_address_by_bank)+" when internal_SELECT_READ_"+toString(i)+"_"+toString(num_port)+index+"_VAL ='1' else"); 165 169 } 166 170 vhdl->set_body("\tin_READ_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address_by_bank)+";"); … … 174 178 for (uint32_t k=1; k<nb_port; k++) 175 179 { 176 uint32_t num_port = _param->_nb_port_write_by_bank*k+j; 177 178 vhdl->set_body("\tin_WRITE_"+toString(num_port)+"_ADDRESS"+std_logic_range(_param->_size_address_by_bank)+" when internal_WRITE_"+toString(i)+"_"+toString(num_port)+"_VAL='1' else"); 180 uint32_t num_port = (_param->_crossbar == FULL_CROSSBAR)?k:(_param->_nb_port_write_by_bank*k+j); 181 string index = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):""; 182 183 vhdl->set_body("\tin_WRITE_"+toString(num_port)+"_ADDRESS"+std_logic_range(_param->_size_address_by_bank)+" when internal_SELECT_WRITE_"+toString(i)+"_"+toString(num_port)+index+"_VAL='1' else"); 179 184 } 180 185 vhdl->set_body("\tin_WRITE_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address_by_bank)+";"); … … 197 202 for (uint32_t k=1; k<nb_port; k++) 198 203 { 199 uint32_t num_port = _param->_nb_port_write_by_bank*k+j;200 201 vhdl->set_body("\tin_WRITE_"+toString(num_port)+"_DATA when internal_ WRITE_"+toString(i)+"_"+toString(num_port)+"_VAL='1' else");204 uint32_t num_port = (_param->_crossbar == FULL_CROSSBAR)?k:(_param->_nb_port_write_by_bank*k+j); 205 string index = (_param->_crossbar == FULL_CROSSBAR)?("_"+toString(j)):""; 206 vhdl->set_body("\tin_WRITE_"+toString(num_port)+"_DATA when internal_SELECT_WRITE_"+toString(i)+"_"+toString(num_port)+index+"_VAL='1' else"); 202 207 } 203 208 vhdl->set_body("\tin_WRITE_"+toString(j)+"_DATA;"); … … 216 221 for (uint32_t j=0; j<_param->_nb_port_read; j ++) 217 222 { 218 string address = (_param->_nb_bank==1)?"":("and (in_READ_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+") ");219 220 vhdl->set_body("internal_READ_"+toString(i)+"_"+toString(j)+"_VAL <= '1' when (in_READ_"+toString(j)+"_VAL='1') "+address+"else '0';");223 string address = (_param->_nb_bank==1)?"":("and (in_READ_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+") "); 224 225 vhdl->set_body("internal_READ_"+toString(i)+"_"+toString(j)+"_VAL <= '1' when (in_READ_"+toString(j)+"_VAL ='1') "+address+"else '0';"); 221 226 } 222 227 for (uint32_t j=0; j<_param->_nb_port_write; j ++) 223 228 { 224 string address = (_param->_nb_bank==1)?"":("and (in_WRITE_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+")"); 225 vhdl->set_body("internal_WRITE_"+toString(i)+"_"+toString(j)+"_VAL <= '1' when (in_WRITE_"+toString(j)+"_VAL='1') "+address+" else '0';"); 226 } 227 } 228 229 string address = (_param->_nb_bank==1)?"":("and (in_WRITE_"+toString(j)+"_ADDRESS"+std_logic_range(_param->_size_address-1,_param->_size_address_by_bank)+"="+std_logic_conv( _param->_size_address-_param->_size_address_by_bank,i)+") "); 230 vhdl->set_body("internal_WRITE_"+toString(i)+"_"+toString(j)+"_VAL <= '1' when (in_WRITE_"+toString(j)+"_VAL='1') "+address+"else '0';"); 231 } 232 } 233 234 if (_param->_crossbar == FULL_CROSSBAR) 235 { 236 for (uint32_t i=0; i<_param->_nb_bank; i++) 237 { 238 for (uint32_t j=0; j<_param->_nb_port_read; j++) 239 { 240 for (uint32_t k=0; k<_param->_nb_port_read_by_bank; k++) 241 { 242 vhdl->set_body("internal_READ_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_VAL <= internal_READ_"+toString(i)+"_"+toString(j)+"_VAL and not"); 243 vhdl->set_body("\t('0'"); 244 for (uint32_t l=0; l<k; l++) 245 { 246 vhdl->set_body("\tor internal_SELECT_READ_"+toString(i)+"_"+toString(j)+"_"+toString(l)+"_VAL"); 247 } 248 249 vhdl->set_body("\t);"); 250 } 251 } 252 for (uint32_t j=0; j<_param->_nb_port_write; j++) 253 { 254 for (uint32_t k=0; k<_param->_nb_port_write_by_bank; k++) 255 { 256 vhdl->set_body("internal_WRITE_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_VAL <= internal_WRITE_"+toString(i)+"_"+toString(j)+"_VAL and not"); 257 vhdl->set_body("\t('0'"); 258 259 for (uint32_t l=0; l<k; l++) 260 { 261 vhdl->set_body("\tor internal_SELECT_WRITE_"+toString(i)+"_"+toString(j)+"_"+toString(l)+"_VAL"); 262 } 263 264 vhdl->set_body("\t);"); 265 } 266 } 267 } 268 } 229 269 vhdl->set_body(""); 230 270 vhdl->set_body("-----------------------------------"); … … 237 277 for (uint32_t i=0; i<_param->_nb_port_read; i ++) 238 278 { 239 vhdl->set_body("out_READ_"+toString(i)+"_ACK <= ");279 vhdl->set_body("out_READ_"+toString(i)+"_ACK <= "); 240 280 for (uint32_t j=0; j<_param->_nb_bank; j ++) 241 281 { 242 282 for (uint32_t k=0; k<_param->_nb_port_read_by_bank; k ++) 243 283 { 244 vhdl->set_body("\tinternal_BANK_READ_"+toString(j)+"_"+toString(k)+"_ACK when internal_SELECT_READ_"+toString(j)+"_"+toString(k)+"_VAL= '1' else");284 vhdl->set_body("\tinternal_BANK_READ_"+toString(j)+"_"+toString(k)+"_ACK when internal_SELECT_READ_"+toString(j)+"_"+toString(i)+"_"+toString(k)+"_VAL = '1' else"); 245 285 } 246 286 } … … 251 291 for (uint32_t k=0; k<_param->_nb_port_read_by_bank; k ++) 252 292 { 253 vhdl->set_body("\tinternal_BANK_READ_"+toString(j)+"_"+toString(k)+"_DATA when internal_SELECT_READ_"+toString(j)+"_"+toString( k)+"_VAL= '1' else");293 vhdl->set_body("\tinternal_BANK_READ_"+toString(j)+"_"+toString(k)+"_DATA when internal_SELECT_READ_"+toString(j)+"_"+toString(i)+"_"+toString(k)+"_VAL = '1' else"); 254 294 } 255 295 } … … 263 303 for (uint32_t k=0; k<_param->_nb_port_write_by_bank; k ++) 264 304 { 265 vhdl->set_body("\tinternal_BANK_WRITE_"+toString(j)+"_"+toString(k)+"_ACK when internal_SELECT_WRITE_"+toString(j)+"_"+toString( k)+"_VAL = '1' else");305 vhdl->set_body("\tinternal_BANK_WRITE_"+toString(j)+"_"+toString(k)+"_ACK when internal_SELECT_WRITE_"+toString(j)+"_"+toString(i)+"_"+toString(k)+"_VAL = '1' else"); 266 306 } 267 307 } … … 275 315 uint32_t link = _param->_link_port_read_to_bank_read[i]; 276 316 277 vhdl->set_body("out_READ_"+toString(i)+"_ACK <= ");278 for (uint32_t j=0; j<_param->_nb_bank; j ++) 279 { 280 vhdl->set_body("\tinternal_BANK_READ_"+toString(j)+"_"+toString(link)+"_ACK when internal_SELECT_READ_"+toString(j)+"_"+toString(link)+"_VAL= '1' else");317 vhdl->set_body("out_READ_"+toString(i)+"_ACK <= "); 318 for (uint32_t j=0; j<_param->_nb_bank; j ++) 319 { 320 vhdl->set_body("\tinternal_BANK_READ_"+toString(j)+"_"+toString(link)+"_ACK when internal_SELECT_READ_"+toString(j)+"_"+toString(i)+"_VAL = '1' else"); 281 321 } 282 322 // vhdl->set_body("\tinternal_BANK_READ_"+toString(0)+"_"+toString(link)+"_ACK;");
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