Changeset 62 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
- Timestamp:
- Dec 4, 2007, 2:31:54 PM (17 years ago)
- File:
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- 1 edited
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
r59 r62 57 57 // others in speculation_access_queue 58 58 59 Toperation_t operation = PORT_READ(in_MEMORY_IN_OPERATION); 60 Tgeneral_data_t address = (PORT_READ(in_MEMORY_IN_IMMEDIAT) + 61 PORT_READ(in_MEMORY_IN_DATA_RA )); 62 63 bool exception_alignement= (mask_memory_access(operation) & address) != 0; 59 Toperation_t operation = PORT_READ(in_MEMORY_IN_OPERATION); 60 Tgeneral_data_t address = (PORT_READ(in_MEMORY_IN_IMMEDIAT) + 61 PORT_READ(in_MEMORY_IN_DATA_RA )); 62 bool exception_alignement = (mask_memory_access(operation) & address) != 0; 64 63 65 64 if (is_operation_memory_store(operation) == true) … … 159 158 _store_queue [index]._context_id = PORT_READ(in_MEMORY_IN_CONTEXT_ID ); 160 159 _store_queue [index]._packet_id = PORT_READ(in_MEMORY_IN_PACKET_ID ); 161 #ifdef HAVE_MEMORY_OUT_OPERATION 162 _store_queue [index]._operation = operation; 163 #endif 164 #ifdef HAVE_MEMORY_OUT_TYPE 165 _store_queue [index]._type = PORT_READ(in_MEMORY_IN_TYPE ); 166 #endif 160 _store_queue [index]._dcache_type = operation_to_dcache_type(operation); 161 _store_queue [index]._uncached = 0; // is the MMU that have this info 167 162 _store_queue [index]._load_queue_ptr_write = PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE); 168 163 _store_queue [index]._address = address; … … 217 212 } 218 213 } 214 215 //================================================================ 216 // Interface "DCACHE_REQ" 217 //================================================================ 218 if (( internal_DCACHE_REQ_VAL == 1) and 219 (PORT_READ(in_DCACHE_REQ_ACK) == 1)) 220 { 221 switch (internal_DCACHE_REQ_SELECT_QUEUE) 222 { 223 case SELECT_STORE_QUEUE : 224 { 225 // ======================= 226 // ===== STORE_QUEUE ===== 227 // ======================= 228 229 // Entry flush and increase the read pointer 230 231 _store_queue [internal_MEMORY_STORE_QUEUE_PTR_READ]._state = STORE_QUEUE_COMMIT; 232 233 break; 234 } 235 case SELECT_LOAD_QUEUE : 236 case SELECT_LOAD_QUEUE_SPECULATIVE : 237 break; 238 } 239 } 240 241 #if DEBUG>=DEBUG_TRACE 242 // ***** dump store queue 243 cout << "Dump store queue" << endl 244 << "ptr_read : " << toString(static_cast<uint32_t>(internal_MEMORY_STORE_QUEUE_PTR_READ)) << endl; 245 246 for (uint32_t i=0; i<_param->_size_store_queue; i++) 247 { 248 uint32_t j = (internal_MEMORY_STORE_QUEUE_PTR_READ+i)%_param->_size_store_queue; 249 cout << "{" << j << "}" << endl 250 << _store_queue[j] << endl; 251 } 252 #endif 219 253 } 220 254
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