Changeset 88 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp
- Timestamp:
- Dec 10, 2008, 7:31:39 PM (15 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp
r82 r88 8 8 9 9 #define NB_ITERATION 1 10 #define CYCLE_MAX (128*NB_ITERATION)10 #define CYCLE_MAX 1000000 11 11 12 12 #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/include/test.h" … … 23 23 #endif 24 24 25 Tusage_t _usage = USE_ALL; 26 27 // _usage = usage_unset(_usage,USE_SYSTEMC ); 28 // _usage = usage_unset(_usage,USE_VHDL ); 29 // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH ); 30 // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT); 31 // _usage = usage_unset(_usage,USE_POSITION ); 32 // _usage = usage_unset(_usage,USE_STATISTICS ); 33 // _usage = usage_unset(_usage,USE_INFORMATION ); 34 25 35 Prediction_unit * _Prediction_unit = new Prediction_unit 26 36 (name.c_str(), … … 29 39 #endif 30 40 _param, 31 USE_ALL);41 _usage); 32 42 33 43 #ifdef SYSTEMC … … 48 58 ALLOC1_SC_SIGNAL(out_PREDICT_PC_NEXT ,"out_PREDICT_PC_NEXT ",Taddress_t ,_param->_nb_context); 49 59 ALLOC1_SC_SIGNAL(out_PREDICT_PC_NEXT_IS_DS_TAKE ,"out_PREDICT_PC_NEXT_IS_DS_TAKE ",Tcontrol_t ,_param->_nb_context); 50 ALLOC2_SC_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE ,"out_PREDICT_INSTRUCTION_ENABLE ",Tcontrol_t ,_param->_nb_context,_param->_nb_instruction[ alloc_signal_it1]);60 ALLOC2_SC_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE ,"out_PREDICT_INSTRUCTION_ENABLE ",Tcontrol_t ,_param->_nb_context,_param->_nb_instruction[it1]); 51 61 ALLOC1_SC_SIGNAL(out_PREDICT_INST_IFETCH_PTR ,"out_PREDICT_INST_IFETCH_PTR ",Tinst_ifetch_ptr_t ,_param->_nb_context); 52 62 ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_STATE ,"out_PREDICT_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_context); 53 63 ALLOC1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"out_PREDICT_BRANCH_UPDATE_PREDICTION_ID",Tprediction_ptr_t ,_param->_nb_context); 54 64 55 ALLOC2_SC_SIGNAL( in_DECOD_VAL ," in_DECOD_VAL ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);56 ALLOC2_SC_SIGNAL(out_DECOD_ACK ,"out_DECOD_ACK ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);57 ALLOC2_SC_SIGNAL( in_DECOD_CONTEXT_ID ," in_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);58 ALLOC2_SC_SIGNAL( in_DECOD_MATCH_INST_IFETCH_PTR ," in_DECOD_MATCH_INST_IFETCH_PTR ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);59 ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_STATE ," in_DECOD_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);60 ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_UPDATE_PREDICTION_ID ," in_DECOD_BRANCH_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);61 ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_CONDITION ," in_DECOD_BRANCH_CONDITION ",Tbranch_condition_t,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);62 ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_DIRECTION ," in_DECOD_BRANCH_DIRECTION ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);63 ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_SRC ," in_DECOD_ADDRESS_SRC ",Taddress_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);64 ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_DEST ," in_DECOD_ADDRESS_DEST ",Taddress_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);65 ALLOC2_SC_SIGNAL( in_DECOD_VAL ," in_DECOD_VAL ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 66 ALLOC2_SC_SIGNAL(out_DECOD_ACK ,"out_DECOD_ACK ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 67 ALLOC2_SC_SIGNAL( in_DECOD_CONTEXT_ID ," in_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 68 ALLOC2_SC_SIGNAL( in_DECOD_MATCH_INST_IFETCH_PTR ," in_DECOD_MATCH_INST_IFETCH_PTR ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 69 ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_STATE ," in_DECOD_BRANCH_STATE ",Tbranch_state_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 70 ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_UPDATE_PREDICTION_ID ," in_DECOD_BRANCH_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 71 ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_CONDITION ," in_DECOD_BRANCH_CONDITION ",Tbranch_condition_t,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 72 ALLOC2_SC_SIGNAL( in_DECOD_BRANCH_DIRECTION ," in_DECOD_BRANCH_DIRECTION ",Tcontrol_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 73 ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_SRC ," in_DECOD_ADDRESS_SRC ",Taddress_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 74 ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_DEST ," in_DECOD_ADDRESS_DEST ",Taddress_t ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 65 75 66 76 ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ," in_BRANCH_COMPLETE_VAL ",Tcontrol_t ,_param->_nb_inst_branch_complete); … … 83 93 ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST ,"out_BRANCH_EVENT_ADDRESS_DEST ",Taddress_t ,_param->_nb_context); 84 94 85 ALLOC1_SC_SIGNAL(out_DEPTH_NB_BRANCH ,"out_DEPTH_NB_BRANCH ",Tdepth_t ,_param->_nb_context); 86 ALLOC1_SC_SIGNAL(out_DEPTH_TAIL ,"out_DEPTH_TAIL ",Tdepth_t ,_param->_nb_context); 95 ALLOC1_SC_SIGNAL(out_DEPTH_CURRENT ,"out_DEPTH_CURRENT ",Tdepth_t ,_param->_nb_context); 96 ALLOC1_SC_SIGNAL(out_DEPTH_MIN ,"out_DEPTH_MIN ",Tdepth_t ,_param->_nb_context); 97 ALLOC1_SC_SIGNAL(out_DEPTH_MAX ,"out_DEPTH_MAX ",Tdepth_t ,_param->_nb_context); 87 98 88 99 /******************************************************** … … 102 113 INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_PC_NEXT ,_param->_nb_context); 103 114 INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_PC_NEXT_IS_DS_TAKE ,_param->_nb_context); 104 INSTANCE2_SC_SIGNAL(_Prediction_unit,out_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_context,_param->_nb_instruction[ alloc_signal_it1]);115 INSTANCE2_SC_SIGNAL(_Prediction_unit,out_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_context,_param->_nb_instruction[it1]); 105 116 INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_BRANCH_STATE ,_param->_nb_context); 106 107 for (uint32_t i=0; i<_param->_nb_context; i++) 108 { 109 if (_param->_have_port_inst_ifetch_ptr [i]) 110 INSTANCE_SC_SIGNAL(_Prediction_unit,out_PREDICT_INST_IFETCH_PTR [i]); 111 if (_param->_have_port_depth [i]) 112 INSTANCE_SC_SIGNAL(_Prediction_unit,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i]); 113 } 114 115 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_VAL ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]); 116 INSTANCE2_SC_SIGNAL(_Prediction_unit,out_DECOD_ACK ,_param->_nb_decod_unit,_param->_nb_inst_decod[alloc_signal_it1]); 117 if (_param->_have_port_inst_ifetch_ptr) 118 INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_INST_IFETCH_PTR ,_param->_nb_context); 119 if (_param->_have_port_depth) 120 INSTANCE1_SC_SIGNAL(_Prediction_unit,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_context); 121 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_VAL ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 122 INSTANCE2_SC_SIGNAL(_Prediction_unit,out_DECOD_ACK ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 117 123 if (_param->_have_port_context_id) 118 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_CONTEXT_ID ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);119 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_MATCH_INST_IFETCH_PTR ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);120 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_STATE ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);121 if (_param->_have_port_ max_depth)122 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);123 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_CONDITION ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);124 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_DIRECTION ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);125 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_ADDRESS_SRC ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);126 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_ADDRESS_DEST ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);124 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_CONTEXT_ID ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 125 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_MATCH_INST_IFETCH_PTR ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 126 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_STATE ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 127 if (_param->_have_port_depth) 128 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 129 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_CONDITION ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 130 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_BRANCH_DIRECTION ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 131 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_ADDRESS_SRC ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 132 INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_ADDRESS_DEST ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 127 133 128 134 INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete); … … 130 136 if (_param->_have_port_context_id) 131 137 INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete); 132 if (_param->_have_port_ max_depth)138 if (_param->_have_port_depth) 133 139 INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete); 134 140 INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_ADDRESS ,_param->_nb_inst_branch_complete); … … 148 154 INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); 149 155 150 INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_NB_BRANCH ,_param->_nb_context); 151 for (uint32_t i=0; i<_param->_nb_context; i++) 152 if (_param->_have_port_depth[i]) 153 INSTANCE_SC_SIGNAL(_Prediction_unit,out_DEPTH_TAIL [i]); 156 if (_param->_have_port_depth) 157 { 158 INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_CURRENT ,_param->_nb_context); 159 INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_MIN ,_param->_nb_context); 160 } 161 INSTANCE1_SC_SIGNAL(_Prediction_unit,out_DEPTH_MAX ,_param->_nb_context); 154 162 155 163 msg(_("<%s> : Start Simulation ............\n"),name.c_str()); … … 166 174 //const uint32_t seed = static_cast<uint32_t>(time(NULL)); 167 175 176 const int32_t percent_transaction_predict = 80; 177 const int32_t percent_transaction_decod = 80; 178 const int32_t percent_transaction_branch_complete = 80; 179 const int32_t percent_transaction_branch_event = 80; 180 168 181 srand(seed); 182 183 uint32_t test1 = 1024; // TEST 1 : instruction without branch 184 uint32_t test2 = 1024; // TEST 2 : sequence : 1 branch, 1 delayed slot 169 185 170 186 SC_START(0); 171 187 LABEL("Initialisation"); 188 189 for (uint32_t i=0; i<_param->_nb_context; ++i) 190 { 191 in_PREDICT_VAL [i]->write(0); 192 in_BRANCH_EVENT_ACK [i]->write(0); 193 } 194 195 for (uint32_t i=0; i<_param->_nb_decod_unit;++i) 196 for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j) 197 { 198 in_DECOD_VAL [i][j]->write(0); 199 } 200 201 for (uint32_t i=0; i<_param->_nb_inst_branch_complete; ++i) 202 { 203 in_BRANCH_COMPLETE_VAL [i]->write(0); 204 } 172 205 173 206 LABEL("Reset"); … … 176 209 in_NRESET->write(1); 177 210 211 for (uint32_t i=0; i<_param->_nb_context; ++i) 212 { 213 TEST(Tcontrol_t,out_PREDICT_ACK [i]->read(),1); // Accept new request 214 TEST(Tcontrol_t,out_BRANCH_EVENT_VAL [i]->read(),0); 215 TEST(Tdepth_t ,out_DEPTH_CURRENT [i]->read(),0); 216 TEST(Tdepth_t ,out_DEPTH_MIN [i]->read(),0); 217 TEST(Tdepth_t ,out_DEPTH_MAX [i]->read(),0); 218 } 219 220 for (uint32_t i=0; i<_param->_nb_decod_unit;++i) 221 for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j) 222 { 223 TEST(Tcontrol_t,out_DECOD_ACK [i][j]->read(),0); // No decod instruction 224 } 225 226 for (uint32_t i=0; i<_param->_nb_inst_branch_complete; ++i) 227 { 228 TEST(Tcontrol_t,out_BRANCH_COMPLETE_ACK [i]->read(),1); // Accept new branch_complete 229 } 230 178 231 LABEL("Loop of Test"); 179 232 233 Taddress_t PC_PREVIOUS [_param->_nb_context]; 234 Taddress_t PC_CURRENT [_param->_nb_context]; 235 Tcontrol_t PC_CURRENT_IS_DS_TAKE [_param->_nb_context]; 236 180 237 for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) 181 238 { 182 239 LABEL("Iteration %d",iteration); 240 241 // TEST 1 : instruction without branch 242 for (uint32_t test=0; test<test1; ++test) 243 { 244 for (uint32_t i=0; i<_param->_nb_context; ++i) 245 { 246 PC_CURRENT [i] = (0x100000>>2); 247 PC_CURRENT_IS_DS_TAKE [i] = 0; 248 PC_PREVIOUS [i] = PC_CURRENT[i]-1; 249 } 250 251 for (uint32_t i=0; i<_param->_nb_context; ++i) 252 { 253 in_PREDICT_VAL [i]->write((rand()%100)<percent_transaction_predict); 254 in_PREDICT_PC_PREVIOUS [i]->write(PC_PREVIOUS [i]); 255 in_PREDICT_PC_CURRENT [i]->write(PC_CURRENT [i]); 256 in_PREDICT_PC_CURRENT_IS_DS_TAKE [i]->write(PC_CURRENT_IS_DS_TAKE[i]); 257 } 258 259 SC_START(1); 260 261 for (uint32_t i=0; i<_param->_nb_context; ++i) 262 // Test if transaction 263 if (in_PREDICT_VAL [i]->read() and out_PREDICT_ACK [i]->read()) 264 { 265 TEST(Taddress_t ,out_PREDICT_PC_NEXT [i]->read(),PC_CURRENT[i]+_param->_nb_instruction[i]); 266 TEST(Tcontrol_t ,out_PREDICT_PC_NEXT_IS_DS_TAKE [i]->read(),0); 267 for (uint32_t j=0; j<_param->_nb_instruction[i]; ++j) 268 TEST(Tcontrol_t ,out_PREDICT_INSTRUCTION_ENABLE [i][j]->read(),1); 269 TEST(Tinst_ifetch_ptr_t,out_PREDICT_INST_IFETCH_PTR [i]->read(),0); 270 TEST(Tbranch_state_t ,out_PREDICT_BRANCH_STATE [i]->read(),BRANCH_STATE_NONE); 271 TEST(Tprediction_ptr_t ,out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i]->read(),0); 272 273 PC_PREVIOUS [i] = PC_CURRENT [i]; 274 PC_CURRENT [i] = out_PREDICT_PC_NEXT [i]->read(); 275 PC_CURRENT_IS_DS_TAKE [i] = out_PREDICT_PC_NEXT_IS_DS_TAKE [i]->read(); 276 } 277 278 // Test another output 279 for (uint32_t i=0; i<_param->_nb_context; ++i) 280 { 281 TEST(Tcontrol_t,out_BRANCH_EVENT_VAL [i]->read(),0); 282 TEST(Tdepth_t ,out_DEPTH_CURRENT [i]->read(),0); 283 TEST(Tdepth_t ,out_DEPTH_MIN [i]->read(),0); 284 TEST(Tdepth_t ,out_DEPTH_MAX [i]->read(),0); 285 } 286 287 for (uint32_t i=0; i<_param->_nb_decod_unit;++i) 288 for (uint32_t j=0; j<_param->_nb_inst_decod[i]; ++j) 289 { 290 TEST(Tcontrol_t,out_DECOD_ACK [i][j]->read(),0); // No decod instruction 291 } 292 293 for (uint32_t i=0; i<_param->_nb_inst_branch_complete; ++i) 294 { 295 TEST(Tcontrol_t,out_BRANCH_COMPLETE_ACK [i]->read(),1); // Accept new branch_complete 296 } 297 } 183 298 184 299 SC_START(1); … … 208 323 DELETE1_SC_SIGNAL(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_context); 209 324 210 DELETE2_SC_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_context,_param->_nb_instruction[ alloc_signal_it1]);211 DELETE2_SC_SIGNAL( in_DECOD_VAL ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);212 DELETE2_SC_SIGNAL(out_DECOD_ACK ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);213 DELETE2_SC_SIGNAL( in_DECOD_CONTEXT_ID ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);214 DELETE2_SC_SIGNAL( in_DECOD_MATCH_INST_IFETCH_PTR ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);215 DELETE2_SC_SIGNAL( in_DECOD_BRANCH_STATE ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);216 DELETE2_SC_SIGNAL( in_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);217 DELETE2_SC_SIGNAL( in_DECOD_BRANCH_CONDITION ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);218 DELETE2_SC_SIGNAL( in_DECOD_BRANCH_DIRECTION ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);219 DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_SRC ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);220 DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_DEST ,_param->_nb_decod_unit,_param->_nb_inst_decod[ alloc_signal_it1]);325 DELETE2_SC_SIGNAL(out_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_context,_param->_nb_instruction[it1]); 326 DELETE2_SC_SIGNAL( in_DECOD_VAL ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 327 DELETE2_SC_SIGNAL(out_DECOD_ACK ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 328 DELETE2_SC_SIGNAL( in_DECOD_CONTEXT_ID ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 329 DELETE2_SC_SIGNAL( in_DECOD_MATCH_INST_IFETCH_PTR ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 330 DELETE2_SC_SIGNAL( in_DECOD_BRANCH_STATE ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 331 DELETE2_SC_SIGNAL( in_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 332 DELETE2_SC_SIGNAL( in_DECOD_BRANCH_CONDITION ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 333 DELETE2_SC_SIGNAL( in_DECOD_BRANCH_DIRECTION ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 334 DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_SRC ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 335 DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_DEST ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]); 221 336 222 337 DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete); … … 239 354 DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); 240 355 241 DELETE1_SC_SIGNAL(out_DEPTH_NB_BRANCH ,_param->_nb_context); 242 DELETE1_SC_SIGNAL(out_DEPTH_TAIL ,_param->_nb_context); 356 DELETE1_SC_SIGNAL(out_DEPTH_CURRENT ,_param->_nb_context); 357 DELETE1_SC_SIGNAL(out_DEPTH_MIN ,_param->_nb_context); 358 DELETE1_SC_SIGNAL(out_DEPTH_MAX ,_param->_nb_context); 243 359 #endif 244 360
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