Ignore:
Timestamp:
Dec 31, 2008, 11:18:08 AM (15 years ago)
Author:
rosiere
Message:

1) Fix bug (read unit, RAT -> write in R0, SPR desallocation ...)
2) Change VHDL Execute_queue -> use Generic/Queue?
3) Complete document on VHDL generation
4) Add soc test

File:
1 edited

Legend:

Unmodified
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  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_deallocation.cpp

    r88 r98  
    7070        DELETE1_SIGNAL( in_BRANCH_COMPLETE_DEPTH            ,_param->_nb_inst_branch_complete,_param->_size_depth     );
    7171        DELETE1_SIGNAL( in_BRANCH_COMPLETE_ADDRESS          ,_param->_nb_inst_branch_complete,_param->_size_instruction_address   );
    72         DELETE1_SIGNAL( in_BRANCH_COMPLETE_FLAG             ,_param->_nb_inst_branch_complete,1                       );
     72        DELETE1_SIGNAL( in_BRANCH_COMPLETE_NO_SEQUENCE      ,_param->_nb_inst_branch_complete,1                       );
    7373        DELETE1_SIGNAL(out_BRANCH_COMPLETE_MISS_PREDICTION  ,_param->_nb_inst_branch_complete,1                       );
    7474
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