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Changeset 10 for trunk/hardware/pic_conso.pro
- Timestamp:
- Jul 31, 2019, 5:41:26 PM (5 years ago)
- File:
-
- 1 edited
-
trunk/hardware/pic_conso.pro (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/hardware/pic_conso.pro
r9 r10 1 update= 20 mai 2019 17:04:41MEST1 update=14 juin 2019 11:13:47 MEST 2 2 version=1 3 3 last_client=kicad 4 [pcbnew]5 version=16 LastNetListRead=7 UseCmpFile=18 PadDrill=0.6000000000009 PadDrillOvalY=0.60000000000010 PadSizeH=1.50000000000011 PadSizeV=1.50000000000012 PcbTextSizeV=1.50000000000013 PcbTextSizeH=1.50000000000014 PcbTextThickness=0.30000000000015 ModuleTextSizeV=1.00000000000016 ModuleTextSizeH=1.00000000000017 ModuleTextSizeThickness=0.15000000000018 SolderMaskClearance=0.00000000000019 SolderMaskMinWidth=0.00000000000020 DrawSegmentWidth=0.20000000000021 BoardOutlineThickness=0.10000000000022 ModuleOutlineThickness=0.15000000000023 4 [cvpcb] 24 5 version=1 … … 38 19 [eeschema] 39 20 version=1 40 LibDir=../libraries;../libraries/github_kicadlibrary;../libraries/github_kicadlibrary/kicadlibrary-master 41 [eeschema/libraries] 42 LibName1=pic_conso-rescue 43 LibName2=microchip-local 44 LibName3=power 45 LibName4=device 46 LibName5=transistors 47 LibName6=conn 48 LibName7=linear 49 LibName8=regul 50 LibName9=74xx 51 LibName10=cmos4000 52 LibName11=adc-dac 53 LibName12=memory 54 LibName13=xilinx 55 LibName14=microcontrollers 56 LibName15=dsp 57 LibName16=microchip 58 LibName17=analog_switches 59 LibName18=motorola 60 LibName19=texas 61 LibName20=intel 62 LibName21=audio 63 LibName22=interface 64 LibName23=digital-audio 65 LibName24=philips 66 LibName25=display 67 LibName26=cypress 68 LibName27=siliconi 69 LibName28=opto 70 LibName29=atmel 71 LibName30=contrib 72 LibName31=valves 73 LibName32=linear-local 74 LibName33=mcp2200 75 LibName34=library.oshec.org/converted/crystal 76 LibName35=github_kicadlibrary/kicadlibrary-master/device 77 LibName36=VO1400AEFTR 78 LibName37=logic-local 21 LibDir= 22 [pcbnew] 23 version=1 24 PageLayoutDescrFile= 25 LastNetListRead=pic_conso.net 26 CopperLayerCount=2 27 BoardThickness=1.6 28 AllowMicroVias=0 29 AllowBlindVias=0 30 RequireCourtyardDefinitions=0 31 ProhibitOverlappingCourtyards=1 32 MinTrackWidth=0.5 33 MinViaDiameter=0.7999999999999999 34 MinViaDrill=0.5 35 MinMicroViaDiameter=0.2 36 MinMicroViaDrill=0.09999999999999999 37 MinHoleToHole=0.25 38 TrackWidth1=0.5 39 TrackWidth2=0.7 40 TrackWidth3=0.8 41 TrackWidth4=0.9 42 TrackWidth5=1 43 TrackWidth6=2 44 TrackWidth7=4 45 ViaDiameter1=1 46 ViaDrill1=0.8 47 ViaDiameter2=0.8 48 ViaDrill2=0.5 49 ViaDiameter3=1 50 ViaDrill3=0.6 51 ViaDiameter4=1.7 52 ViaDrill4=0.8 53 ViaDiameter5=2 54 ViaDrill5=0.8 55 ViaDiameter6=2 56 ViaDrill6=1 57 dPairWidth1=0.2 58 dPairGap1=0.25 59 dPairViaGap1=0.25 60 SilkLineWidth=0.15 61 SilkTextSizeV=1 62 SilkTextSizeH=1 63 SilkTextSizeThickness=0.15 64 SilkTextItalic=0 65 SilkTextUpright=1 66 CopperLineWidth=0.2 67 CopperTextSizeV=1.5 68 CopperTextSizeH=1.5 69 CopperTextThickness=0.3 70 CopperTextItalic=0 71 CopperTextUpright=1 72 EdgeCutLineWidth=0.15 73 CourtyardLineWidth=0.05 74 OthersLineWidth=0.15 75 OthersTextSizeV=1 76 OthersTextSizeH=1 77 OthersTextSizeThickness=0.15 78 OthersTextItalic=0 79 OthersTextUpright=1 80 SolderMaskClearance=0.2 81 SolderMaskMinWidth=0 82 SolderPasteClearance=0 83 SolderPasteRatio=0 84 [pcbnew/Layer.F.Cu] 85 Name=F.Cu 86 Type=0 87 Enabled=1 88 [pcbnew/Layer.In1.Cu] 89 Name=In1.Cu 90 Type=0 91 Enabled=0 92 [pcbnew/Layer.In2.Cu] 93 Name=In2.Cu 94 Type=0 95 Enabled=0 96 [pcbnew/Layer.In3.Cu] 97 Name=In3.Cu 98 Type=0 99 Enabled=0 100 [pcbnew/Layer.In4.Cu] 101 Name=In4.Cu 102 Type=0 103 Enabled=0 104 [pcbnew/Layer.In5.Cu] 105 Name=In5.Cu 106 Type=0 107 Enabled=0 108 [pcbnew/Layer.In6.Cu] 109 Name=In6.Cu 110 Type=0 111 Enabled=0 112 [pcbnew/Layer.In7.Cu] 113 Name=In7.Cu 114 Type=0 115 Enabled=0 116 [pcbnew/Layer.In8.Cu] 117 Name=In8.Cu 118 Type=0 119 Enabled=0 120 [pcbnew/Layer.In9.Cu] 121 Name=In9.Cu 122 Type=0 123 Enabled=0 124 [pcbnew/Layer.In10.Cu] 125 Name=In10.Cu 126 Type=0 127 Enabled=0 128 [pcbnew/Layer.In11.Cu] 129 Name=In11.Cu 130 Type=0 131 Enabled=0 132 [pcbnew/Layer.In12.Cu] 133 Name=In12.Cu 134 Type=0 135 Enabled=0 136 [pcbnew/Layer.In13.Cu] 137 Name=In13.Cu 138 Type=0 139 Enabled=0 140 [pcbnew/Layer.In14.Cu] 141 Name=In14.Cu 142 Type=0 143 Enabled=0 144 [pcbnew/Layer.In15.Cu] 145 Name=In15.Cu 146 Type=0 147 Enabled=0 148 [pcbnew/Layer.In16.Cu] 149 Name=In16.Cu 150 Type=0 151 Enabled=0 152 [pcbnew/Layer.In17.Cu] 153 Name=In17.Cu 154 Type=0 155 Enabled=0 156 [pcbnew/Layer.In18.Cu] 157 Name=In18.Cu 158 Type=0 159 Enabled=0 160 [pcbnew/Layer.In19.Cu] 161 Name=In19.Cu 162 Type=0 163 Enabled=0 164 [pcbnew/Layer.In20.Cu] 165 Name=In20.Cu 166 Type=0 167 Enabled=0 168 [pcbnew/Layer.In21.Cu] 169 Name=In21.Cu 170 Type=0 171 Enabled=0 172 [pcbnew/Layer.In22.Cu] 173 Name=In22.Cu 174 Type=0 175 Enabled=0 176 [pcbnew/Layer.In23.Cu] 177 Name=In23.Cu 178 Type=0 179 Enabled=0 180 [pcbnew/Layer.In24.Cu] 181 Name=In24.Cu 182 Type=0 183 Enabled=0 184 [pcbnew/Layer.In25.Cu] 185 Name=In25.Cu 186 Type=0 187 Enabled=0 188 [pcbnew/Layer.In26.Cu] 189 Name=In26.Cu 190 Type=0 191 Enabled=0 192 [pcbnew/Layer.In27.Cu] 193 Name=In27.Cu 194 Type=0 195 Enabled=0 196 [pcbnew/Layer.In28.Cu] 197 Name=In28.Cu 198 Type=0 199 Enabled=0 200 [pcbnew/Layer.In29.Cu] 201 Name=In29.Cu 202 Type=0 203 Enabled=0 204 [pcbnew/Layer.In30.Cu] 205 Name=In30.Cu 206 Type=0 207 Enabled=0 208 [pcbnew/Layer.B.Cu] 209 Name=B.Cu 210 Type=0 211 Enabled=1 212 [pcbnew/Layer.B.Adhes] 213 Enabled=1 214 [pcbnew/Layer.F.Adhes] 215 Enabled=1 216 [pcbnew/Layer.B.Paste] 217 Enabled=1 218 [pcbnew/Layer.F.Paste] 219 Enabled=1 220 [pcbnew/Layer.B.SilkS] 221 Enabled=1 222 [pcbnew/Layer.F.SilkS] 223 Enabled=1 224 [pcbnew/Layer.B.Mask] 225 Enabled=1 226 [pcbnew/Layer.F.Mask] 227 Enabled=1 228 [pcbnew/Layer.Dwgs.User] 229 Enabled=1 230 [pcbnew/Layer.Cmts.User] 231 Enabled=1 232 [pcbnew/Layer.Eco1.User] 233 Enabled=1 234 [pcbnew/Layer.Eco2.User] 235 Enabled=1 236 [pcbnew/Layer.Edge.Cuts] 237 Enabled=1 238 [pcbnew/Layer.Margin] 239 Enabled=1 240 [pcbnew/Layer.B.CrtYd] 241 Enabled=1 242 [pcbnew/Layer.F.CrtYd] 243 Enabled=1 244 [pcbnew/Layer.B.Fab] 245 Enabled=1 246 [pcbnew/Layer.F.Fab] 247 Enabled=1 248 [pcbnew/Layer.Rescue] 249 Enabled=0 250 [pcbnew/Netclasses] 251 [pcbnew/Netclasses/Default] 252 Name=Default 253 Clearance=0.4 254 TrackWidth=0.5 255 ViaDiameter=1 256 ViaDrill=0.8 257 uViaDiameter=0.3 258 uViaDrill=0.1 259 dPairWidth=0.2 260 dPairGap=0.25 261 dPairViaGap=0.25 262 [pcbnew/Netclasses/1] 263 Name=power 264 Clearance=1 265 TrackWidth=1 266 ViaDiameter=1 267 ViaDrill=0.8 268 uViaDiameter=0.3 269 uViaDrill=0.1 270 dPairWidth=0.2 271 dPairGap=0.25 272 dPairViaGap=0.25 273 [pcbnew/Netclasses/2] 274 Name=power2 275 Clearance=1 276 TrackWidth=4 277 ViaDiameter=1 278 ViaDrill=0.8 279 uViaDiameter=0.3 280 uViaDrill=0.1 281 dPairWidth=0.2 282 dPairGap=0.25 283 dPairViaGap=0.25 284 [pcbnew/Netclasses/3] 285 Name=powermedium 286 Clearance=1 287 TrackWidth=0.5 288 ViaDiameter=1 289 ViaDrill=0.8 290 uViaDiameter=0.3 291 uViaDrill=0.1 292 dPairWidth=0.2 293 dPairGap=0.25 294 dPairViaGap=0.25 295 [pcbnew/Netclasses/4] 296 Name=powersmall 297 Clearance=0.9 298 TrackWidth=0.5 299 ViaDiameter=1 300 ViaDrill=0.8 301 uViaDiameter=0.3 302 uViaDrill=0.1 303 dPairWidth=0.2 304 dPairGap=0.25 305 dPairViaGap=0.25
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