source: trunk/modules/vci_synthetic_initator/caba/sources/include/vci_synthetic_initator.h @ 77

Last change on this file since 77 was 77, checked in by choichil, 14 years ago

Rename of vci_traffic_generator to vci_synthetic_initiator

File size: 3.6 KB
Line 
1/* -*- c++ -*-
2 * File         : vci_synthetic_initiator.h
3 * Date         : 26/08/2010
4 * Copyright    : UPMC / LIP6
5 * Authors      : Christophe Choichillon
6 *
7 * SOCLIB_LGPL_HEADER_BEGIN
8 *
9 * This file is part of SoCLib, GNU LGPLv2.1.
10 *
11 * SoCLib is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU Lesser General Public License as published
13 * by the Free Software Foundation; version 2.1 of the License.
14 *
15 * SoCLib is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18 * Lesser General Public License for more details.
19 *
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with SoCLib; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 * 02110-1301 USA
24 *
25 * SOCLIB_LGPL_HEADER_END
26 *
27 * Maintainers: christophe.choichillon@lip6.fr
28 */
29
30#ifndef SOCLIB_CABA_SYNTHETIC_INITIATOR_H
31#define SOCLIB_CABA_SYNTHETIC_INITIATOR_H
32
33#include <systemc>
34
35namespace soclib {  namespace caba {
36    using namespace sc_core;
37
38    template<typename vci_param>
39    class VciSyntheticInitiator
40      : public soclib::caba::BaseModule
41    {
42      typedef uint32_t addr_t;
43      typedef uint32_t data_t;
44      typedef uint32_t tag_t;
45      typedef uint32_t size_t;
46      typedef uint32_t be_t;
47      typedef uint32_t copy_t;
48
49
50      /* States of the GENERATOR fsm */
51      enum vci_fsm_state_e{
52        VCI_IDLE,
53        VCI_SINGLE_SEND,
54        VCI_SINGLE_RECEIVE,
55        VCI_BC_SEND,
56        VCI_BC_RECEIVE
57      };
58      enum gen_fsm_state_e{
59        A_IDLE,
60        A_DATA
61      };
62
63      uint32_t     m_cpt_cycles;            // Counter of cycles
64
65    protected:
66
67      SC_HAS_PROCESS(VciSyntheticInitiator);
68   
69    public:
70      sc_in<bool>                               p_clk;
71      sc_in<bool>                               p_resetn;
72      soclib::caba::VciInitiator<vci_param>     p_vci; 
73
74      VciSyntheticInitiator(
75                  sc_module_name name,                            // Instance Name
76                  const soclib::common::MappingTable &mtp,        // Mapping table for primary requets
77                  const soclib::common::IntTab &vci_index,        // VCI port to PROC (initiator)
78                  size_t nways,                                   // Number of ways per set
79                  size_t nsets,                                   // Number of sets
80                  size_t nwords);                                 // Number of words per line
81
82      ~VciSyntheticInitiator();
83
84      void transition();
85
86      void genMoore();
87
88      void print_stats();
89
90    private:
91
92      // Component attributes
93      const size_t                        m_initiators;         // Number of initiators
94      const size_t                        m_ways;               // Number of ways in a set
95      const size_t                        m_sets;               // Number of cache sets
96      const size_t                        m_words;              // Number of words in a line
97      const size_t                        m_srcid;              // Srcid for requests to processors
98
99      data_t                              ***m_cache_data;      // data array[set][way][word]
100
101      // adress masks
102      const soclib::common::AddressMaskingTable<addr_t>   m_x;
103      const soclib::common::AddressMaskingTable<addr_t>   m_y;
104      const soclib::common::AddressMaskingTable<addr_t>   m_z;
105      const soclib::common::AddressMaskingTable<addr_t> m_nline; 
106
107      //////////////////////////////////////////////////
108      // Registers controlled by the TGT_CMD fsm
109      //////////////////////////////////////////////////
110
111      // Fifo between TGT_CMD fsm and READ fsm
112      GenericFifo<addr_t>    m_cmd_read_addr_fifo;
113
114      sc_signal<int>         r_vci_fsm;
115       
116      sc_signal<size_t>      r_index;
117
118    }; // end class VciMemCache
119 
120  }}
121
122#endif
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