What is the TSAR project ?
- TSAR (Tera-Scale ARchitecture), coherent shared memory, manycore architecture, designed and implemented by the LIP6 laboratory. It supports commodity operating systems such as LINUX or NetBSD. A 96 cores VLSI prototype containing MIPS32 processors has been physically implemented by the CEA-LETI in CMOS 28nm, but the architecture has been designed to scale up to 1024 cores.
TSAR documentation
- Architecture Overview
- Memory Management Unit
- Cache Coherence Protocol
- Atomic Operations
- Communication Infrastructure
- Architecture Versions
- TLMDT Modeling
TSAR components documentation
Testing TSAR virtual prototype
- Install SoCLib
- Checkout Tsar modules
$ svn co https://www-soc.lip6.fr/svn/tsar/trunk tsar
- Add the newly created tsar directory to soclib-cc; add the following line in your ~/.soclib/global.conf:
config.addDescPath("/path/to/tsar")
- Go to tsar/platforms and try the prototypes
- subscribe to the tsar-commit mailing list to receive notifications on TSAR svn commits
Keywords
- Multi-core and Many-core Architecture
- Cache Coherence Protocol
- Shared Memory
- CC-NUMA
Last modified 5 months ago
Last modified on Dec 1, 2017, 6:13:24 PM