| [793] | 1 | #!/usr/bin/env python |
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| 2 | |
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| [803] | 3 | from math import log, ceil |
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| [793] | 4 | from mapping import * |
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| 5 | |
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| 6 | ############################################################################### |
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| [803] | 7 | # file : arch.py (for the tsar_generic_leti architecture) |
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| [793] | 8 | # date : may 2014 |
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| 9 | # author : Alain Greiner |
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| 10 | ############################################################################### |
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| [803] | 11 | # This file contains a mapping generator for the "tsar_generic_leti" platform. |
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| [793] | 12 | # This includes both the hardware architecture (clusters, processors, |
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| 13 | # peripherals, physical space segmentation) and the mapping of all kernel |
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| [803] | 14 | # objects (global vsegs). |
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| [793] | 15 | # |
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| 16 | # The "constructor" parameters are: |
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| 17 | # - x_size : number of clusters in a row |
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| 18 | # - y_size : number of clusters in a column |
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| 19 | # - nb_procs : number of processors per cluster |
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| [820] | 20 | # - fbf_width : frame_buffer width = frame_buffer heigth |
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| [793] | 21 | # |
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| 22 | # The "hidden" parameters (defined below) are: |
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| 23 | # - nb_ttys : number of TTY channels |
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| 24 | # - nb_nics : number of NIC channels |
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| 25 | # - x_io : cluster_io x coordinate |
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| 26 | # - y_io : cluster_io y coordinate |
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| 27 | # - x_width : number of bits for x coordinate |
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| 28 | # - y_width : number of bits for y coordinate |
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| 29 | # - paddr_width : number of bits for physical address |
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| 30 | # - irq_per_proc : number of input IRQs per processor |
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| 31 | # - use_ramdisk : use a ramdisk when True |
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| 32 | # - peri_increment : address increment for replicated peripherals |
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| [820] | 33 | # |
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| 34 | # Regarding physical memory allocation, there is one allocator per cluster: |
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| 35 | # - We use only one big physical page (2 Mbytes) for the five boot vsegs, |
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| 36 | # allocated in cluster[0,0], identity mapping. |
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| 37 | # - We use one big page per cluster for the kernel vsegs. |
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| 38 | # The kernel_code, kernel_init and kernel_ptab can be replicated in all clusters. |
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| 39 | # The kernel_data and kernel_uncdata shared vsegs are only mapped in cluster[0,0]. |
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| 40 | # - We use 8 small physical pages (4 Kbytes) per cluster for the schedulers. |
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| 41 | # - We use one big page for each external peripheral in IO cluster, |
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| 42 | # - We use one small page per cluster for each internal peripheral. |
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| 43 | ################################################################################### |
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| [793] | 44 | |
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| 45 | ######################## |
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| [820] | 46 | def arch( x_size = 2, |
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| 47 | y_size = 2, |
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| 48 | nb_procs = 2, |
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| 49 | fbf_width = 128 ): |
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| [793] | 50 | |
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| 51 | ### define architecture constants |
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| 52 | |
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| [820] | 53 | nb_ttys = 1 |
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| 54 | nb_nics = 2 |
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| 55 | x_io = 0 |
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| 56 | y_io = 0 |
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| 57 | x_width = 4 |
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| 58 | y_width = 4 |
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| 59 | p_width = 4 |
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| 60 | paddr_width = 40 |
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| 61 | irq_per_proc = 4 |
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| 62 | use_ramdisk = True |
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| 63 | peri_increment = 0x10000 # distributed peripherals vbase address increment |
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| 64 | sched_increment = 0x10000 # distributed schedulers vbase address increment |
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| 65 | ptab_increment = 0x200000 # distributed page tables vbase address increment |
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| 66 | reset_address = 0x00000000 |
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| [793] | 67 | |
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| 68 | ### parameters checking |
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| 69 | |
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| [803] | 70 | assert( nb_procs <= (1 << p_width) ) |
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| [793] | 71 | |
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| 72 | assert( (x_size == 1) or (x_size == 2) or (x_size == 4) |
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| 73 | or (x_size == 8) or (x_size == 16) ) |
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| 74 | |
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| 75 | assert( (y_size == 1) or (y_size == 2) or (y_size == 4) |
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| 76 | or (y_size == 8) or (y_size == 16) ) |
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| 77 | |
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| 78 | assert( nb_ttys == 1 ) |
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| 79 | |
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| 80 | assert( ((x_io == 0) and (y_io == 0)) or |
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| 81 | ((x_io == x_size-1) and (y_io == y_size-1)) ) |
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| 82 | |
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| [803] | 83 | platform_name = 'tsar_leti_%d_%d_%d' % ( x_size, y_size, nb_procs ) |
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| [793] | 84 | |
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| 85 | ### define physical segments |
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| [820] | 86 | ### These segments are replicated in all clusters |
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| [793] | 87 | |
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| 88 | ram_base = 0x0000000000 |
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| 89 | ram_size = 0x4000000 # 64 Mbytes |
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| 90 | |
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| 91 | xcu_base = 0x00F0000000 |
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| 92 | xcu_size = 0x1000 # 4 Kbytes |
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| 93 | |
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| 94 | mmc_base = 0x00E0000000 |
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| 95 | mmc_size = 0x1000 # 4 Kbytes |
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| 96 | |
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| [820] | 97 | ### define physical segments for external peripherals |
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| 98 | ## These segments are only defined in cluster_io |
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| 99 | |
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| [793] | 100 | offset_io = ((x_io << y_width) + y_io) << (paddr_width - x_width - y_width) |
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| 101 | |
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| 102 | bdv_base = 0x00F2000000 + offset_io |
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| 103 | bdv_size = 0x1000 # 4kbytes |
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| 104 | |
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| 105 | tty_base = 0x00F4000000 + offset_io |
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| 106 | tty_size = 0x4000 # 16 Kbytes |
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| 107 | |
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| 108 | nic_base = 0x00F7000000 + offset_io |
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| 109 | nic_size = 0x80000 # 512 kbytes |
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| 110 | |
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| 111 | cma_base = 0x00F8000000 + offset_io |
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| 112 | cma_size = 0x1000 * 2 * nb_nics # 4 kbytes * 2 * nb_nics |
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| 113 | |
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| 114 | fbf_base = 0x00F3000000 + offset_io |
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| 115 | fbf_size = fbf_width * fbf_width # fbf_width * fbf_width bytes |
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| 116 | |
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| 117 | pic_base = 0x00F9000000 + offset_io |
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| 118 | pic_size = 0x1000 # 4 Kbytes |
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| 119 | |
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| 120 | rdk_base = 0x02000000 |
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| 121 | rdk_size = 0x02000000 # 32 Mbytes |
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| 122 | |
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| [819] | 123 | ### define preloader & bootloader vsegs base addresses and sizes |
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| [820] | 124 | ### We want to pack these 5 vsegs in the same big page |
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| 125 | ### => boot cost is one BPP in cluster[0][0] |
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| [803] | 126 | |
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| [820] | 127 | '__W_', vtype = 'PERI' , x = x , y = y , pseg = |
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| 128 | 'XCU', |
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| [803] | 129 | preloader_vbase = 0x00000000 # ident |
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| 130 | preloader_size = 0x00010000 # 64 Kbytes |
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| 131 | |
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| 132 | boot_mapping_vbase = 0x00010000 # ident |
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| [793] | 133 | boot_mapping_size = 0x00080000 # 512 Kbytes |
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| 134 | |
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| [803] | 135 | boot_code_vbase = 0x00090000 # ident |
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| [793] | 136 | boot_code_size = 0x00040000 # 256 Kbytes |
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| 137 | |
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| [803] | 138 | boot_data_vbase = 0x000D0000 # ident |
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| [793] | 139 | boot_data_size = 0x00080000 # 512 Kbytes |
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| 140 | |
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| [803] | 141 | boot_stack_vbase = 0x00150000 # ident |
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| [793] | 142 | boot_stack_size = 0x00050000 # 320 Kbytes |
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| 143 | |
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| 144 | ### define kernel vsegs base addresses and sizes |
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| [820] | 145 | ### code, init, ptab & sched vsegs are replicated in all clusters. |
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| 146 | ### data & uncdata vsegs are only mapped in cluster[0][0]. |
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| 147 | ### - We pack code, init, data vsegs in the same BIG page. |
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| 148 | ### - We use another BIG page for the ptab vseg. |
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| 149 | ### - We use 2*nb_procs SMALL pages for the sched vseg. |
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| 150 | ### - we use one SMALL page for uncdata |
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| 151 | ### => kernel cost is 2 BPPs and (2*n + 1) SPPs per cluster. |
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| 152 | |
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| [793] | 153 | kernel_code_vbase = 0x80000000 |
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| [819] | 154 | kernel_code_size = 0x00080000 # 512 Kbytes per cluster |
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| [793] | 155 | |
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| [819] | 156 | kernel_init_vbase = 0x80080000 |
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| 157 | kernel_init_size = 0x00080000 # 512 Kbytes per cluster |
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| [793] | 158 | |
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| [819] | 159 | kernel_data_vbase = 0x80100000 |
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| [820] | 160 | kernel_data_size = 0x00100000 # 1 Mbytes in cluster[0][0] |
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| [793] | 161 | |
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| [819] | 162 | kernel_ptab_vbase = 0xB0000000 |
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| 163 | kernel_ptab_size = 0x00200000 # 2 Mbytes per cluster |
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| [793] | 164 | |
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| [819] | 165 | kernel_uncdata_vbase = 0x90000000 |
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| 166 | kernel_uncdata_size = 0x00001000 # 4 Kbytes |
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| [793] | 167 | |
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| [820] | 168 | kernel_sched_vbase = 0xA0000000 # distributed in all clusters |
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| 169 | kernel_sched_size = 0x00002000 * nb_procs # 8 kbytes per processor |
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| [819] | 170 | |
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| [793] | 171 | ### create mapping |
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| 172 | |
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| 173 | mapping = Mapping( name = platform_name, |
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| 174 | x_size = x_size, |
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| 175 | y_size = y_size, |
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| [819] | 176 | nprocs = nb_procs, |
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| [793] | 177 | x_width = x_width, |
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| 178 | y_width = y_width, |
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| [803] | 179 | p_width = p_width, |
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| [793] | 180 | paddr_width = paddr_width, |
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| 181 | coherence = True, |
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| 182 | irq_per_proc = irq_per_proc, |
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| 183 | use_ramdisk = use_ramdisk, |
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| 184 | x_io = x_io, |
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| 185 | y_io = y_io, |
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| 186 | peri_increment = peri_increment, |
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| 187 | reset_address = reset_address, |
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| 188 | ram_base = ram_base, |
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| 189 | ram_size = ram_size ) |
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| 190 | |
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| 191 | ### external peripherals (accessible in cluster[0,0] only for this mapping) |
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| 192 | |
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| [820] | 193 | bdv = mapping.addPeriph( 'BDV', base = bdv_base, size = bdv_size, ptype = 'IOC', subtype = 'BDV' ) |
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| [793] | 194 | |
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| [820] | 195 | tty = mapping.addPeriph( 'TTY', base = tty_base, size = tty_size, ptype = 'TTY', channels = nb_ttys ) |
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| [793] | 196 | |
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| [820] | 197 | nic = mapping.addPeriph( 'NIC', base = nic_base, size = nic_size, ptype = 'NIC', channels = nb_nics ) |
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| [793] | 198 | |
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| [820] | 199 | cma = mapping.addPeriph( 'CMA', base = cma_base, size = cma_size, ptype = 'CMA', channels = 2*nb_nics ) |
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| [793] | 200 | |
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| [820] | 201 | fbf = mapping.addPeriph( 'FBF', base = fbf_base, size = fbf_size, ptype = 'FBF', arg = fbf_width ) |
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| [793] | 202 | |
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| [820] | 203 | pic = mapping.addPeriph( 'PIC', base = pic_base, size = pic_size, ptype = 'PIC', channels = 32 ) |
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| [793] | 204 | |
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| 205 | mapping.addIrq( pic, index = 0 , isrtype = 'ISR_NIC_RX', channel = 0 ) |
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| 206 | mapping.addIrq( pic, index = 1 , isrtype = 'ISR_NIC_RX', channel = 1 ) |
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| 207 | mapping.addIrq( pic, index = 2 , isrtype = 'ISR_NIC_TX', channel = 0 ) |
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| 208 | mapping.addIrq( pic, index = 3 , isrtype = 'ISR_NIC_TX', channel = 1 ) |
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| 209 | mapping.addIrq( pic, index = 4 , isrtype = 'ISR_CMA' , channel = 0 ) |
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| 210 | mapping.addIrq( pic, index = 5 , isrtype = 'ISR_CMA' , channel = 1 ) |
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| 211 | mapping.addIrq( pic, index = 6 , isrtype = 'ISR_CMA' , channel = 2 ) |
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| 212 | mapping.addIrq( pic, index = 7 , isrtype = 'ISR_CMA' , channel = 3 ) |
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| 213 | mapping.addIrq( pic, index = 8 , isrtype = 'ISR_BDV' , channel = 0 ) |
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| 214 | mapping.addIrq( pic, index = 16, isrtype = 'ISR_TTY_RX', channel = 0 ) |
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| 215 | |
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| 216 | ### hardware components replicated in all clusters |
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| 217 | |
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| 218 | for x in xrange( x_size ): |
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| 219 | for y in xrange( y_size ): |
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| 220 | cluster_xy = (x << y_width) + y; |
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| 221 | offset = cluster_xy << (paddr_width - x_width - y_width) |
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| 222 | |
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| [820] | 223 | ram = mapping.addRam( 'RAM', base = ram_base + offset, size = ram_size ) |
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| [793] | 224 | |
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| [820] | 225 | mmc = mapping.addPeriph( 'MMC', base = mmc_base + offset, size = mmc_size, |
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| 226 | ptype = 'MMC' ) |
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| [793] | 227 | |
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| [820] | 228 | xcu = mapping.addPeriph( 'XCU', base = xcu_base + offset, size = xcu_size, |
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| 229 | ptype = 'XCU', channels = nb_procs * irq_per_proc, arg = 16 ) |
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| [793] | 230 | |
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| 231 | # IRQs replicated in all clusters |
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| 232 | mapping.addIrq( xcu, index = 8, isrtype = 'ISR_MMC' ) |
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| 233 | |
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| 234 | # IRQ in IO cluster (0,0) |
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| 235 | if x == 0 and y == 0: |
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| 236 | mapping.addIrq( xcu, index = 9 , isrtype = 'ISR_BDV' ) |
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| 237 | mapping.addIrq( xcu, index = 10, isrtype = 'ISR_TTY_RX' ) |
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| 238 | |
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| 239 | # processors |
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| 240 | for p in xrange ( nb_procs ): |
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| 241 | mapping.addProc( x, y, p ) |
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| 242 | |
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| [820] | 243 | ### global vsegs for preloader & boot_loader |
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| 244 | ### we want to pack those 5 vsegs in the same big page |
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| 245 | ### => same flags CXW_ / identity mapping / non local / big page |
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| [793] | 246 | |
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| [820] | 247 | mapping.addGlobal( 'seg_preloader', preloader_vbase, preloader_size, |
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| [819] | 248 | 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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| 249 | identity = True, local = False, big = True ) |
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| 250 | |
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| [793] | 251 | mapping.addGlobal( 'seg_boot_mapping', boot_mapping_vbase, boot_mapping_size, |
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| [819] | 252 | 'CXW_', vtype = 'BLOB' , x = 0, y = 0, pseg = 'RAM', |
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| 253 | identity = True, local = False, big = True ) |
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| [793] | 254 | |
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| 255 | mapping.addGlobal( 'seg_boot_code', boot_code_vbase, boot_code_size, |
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| 256 | 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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| [819] | 257 | identity = True, local = False, big = True ) |
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| [793] | 258 | |
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| 259 | mapping.addGlobal( 'seg_boot_data', boot_data_vbase, boot_data_size, |
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| [819] | 260 | 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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| 261 | identity = True, local = False, big = True ) |
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| [793] | 262 | |
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| 263 | mapping.addGlobal( 'seg_boot_stack', boot_stack_vbase, boot_stack_size, |
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| [819] | 264 | 'CXW_', vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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| 265 | identity = True, local = False, big = True ) |
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| [793] | 266 | |
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| [820] | 267 | ### global vsegs kernel_code, kernel_init : local / big page |
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| 268 | ### replicated in all clusters with the same name (same vbase) |
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| [819] | 269 | for x in xrange( x_size ): |
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| 270 | for y in xrange( y_size ): |
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| 271 | cluster_xy = (x << y_width) + y; |
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| [793] | 272 | |
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| [819] | 273 | mapping.addGlobal( 'seg_kernel_code', kernel_code_vbase, kernel_code_size, |
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| [820] | 274 | 'CXW_', vtype = 'ELF', x = x, y = y, pseg = 'RAM', |
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| 275 | binpath = 'build/kernel/kernel.elf', |
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| [819] | 276 | local = True, big = True ) |
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| [793] | 277 | |
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| [819] | 278 | mapping.addGlobal( 'seg_kernel_init', kernel_init_vbase, kernel_init_size, |
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| [820] | 279 | 'CXW_', vtype = 'ELF', x = x, y = y, pseg = 'RAM', |
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| [819] | 280 | binpath = 'build/kernel/kernel.elf', |
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| 281 | local = True, big = True ) |
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| [793] | 282 | |
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| [820] | 283 | ### global vseg kernel_data: non local / big page |
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| 284 | ### Only mapped in cluster[0][0] |
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| [793] | 285 | mapping.addGlobal( 'seg_kernel_data', kernel_data_vbase, kernel_data_size, |
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| 286 | 'C_W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM', |
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| 287 | binpath = 'build/kernel/kernel.elf', local = False ) |
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| 288 | |
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| [820] | 289 | ### global vseg kernel_uncdata: non local / small page |
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| 290 | ### Only mapped in cluster[0][0] |
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| [793] | 291 | mapping.addGlobal( 'seg_kernel_uncdata', kernel_uncdata_vbase, kernel_uncdata_size, |
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| 292 | '__W_', vtype = 'ELF', x = 0, y = 0, pseg = 'RAM', |
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| 293 | binpath = 'build/kernel/kernel.elf', local = False ) |
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| 294 | |
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| [820] | 295 | for x in xrange( x_size ): |
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| 296 | for y in xrange( y_size ): |
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| 297 | cluster_xy = (x << y_width) + y; |
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| 298 | |
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| 299 | ### Global vsegs kernel_ptab_x_y: non local / big pages |
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| 300 | ### replicated in all clusters with name indexed by (x,y) |
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| 301 | ### as vbase address is incremented by (cluster_xy * vseg_increment) |
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| 302 | offset = cluster_xy * ptab_increment |
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| 303 | mapping.addGlobal( 'seg_kernel_ptab_%d_%d' %(x,y), kernel_ptab_vbase + offset, kernel_ptab_size, |
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| 304 | 'CXW_', vtype = 'PTAB', x = x, y = y, pseg = 'RAM', |
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| 305 | local = False, big = True ) |
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| 306 | |
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| 307 | ### global vsegs kernel_sched : non local / small pages |
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| 308 | ### allocated in all clusters with name indexed by (x,y) |
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| 309 | ### as vbase address is incremented by (cluster_xy * vseg_increment) |
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| 310 | offset = cluster_xy * sched_increment |
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| 311 | mapping.addGlobal( 'seg_kernel_sched_%d_%d' %(x,y), kernel_sched_vbase + offset , kernel_sched_size, |
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| 312 | 'C_W_', vtype = 'SCHED', x = x, y = y, pseg = 'RAM', |
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| 313 | local = False, big = False ) |
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| 314 | |
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| 315 | ### global vseg for ram disk |
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| 316 | if use_ramdisk: |
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| 317 | mapping.addGlobal( 'seg_rdk', rdk_base, rdk_size, '__W_', |
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| 318 | vtype = 'BUFFER', x = 0, y = 0, pseg = 'RAM', |
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| 319 | identity = True, local = False, big = True ) |
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| 320 | |
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| 321 | ### global vsegs for external peripherals: non local / big page |
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| 322 | mapping.addGlobal( 'seg_bdv', bdv_base, bdv_size, '__W_', |
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| 323 | vtype = 'PERI', x = 0, y = 0, pseg = 'BDV', |
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| 324 | local = False, big = True ) |
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| 325 | |
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| 326 | mapping.addGlobal( 'seg_tty', tty_base, tty_size, '__W_', |
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| 327 | vtype = 'PERI', x = 0, y = 0, pseg = 'TTY', |
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| 328 | local = False, big = True ) |
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| 329 | |
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| 330 | mapping.addGlobal( 'seg_nic', nic_base, nic_size, '__W_', |
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| 331 | vtype = 'PERI', x = 0, y = 0, pseg = 'NIC', |
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| 332 | local = False, big = True ) |
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| 333 | |
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| 334 | mapping.addGlobal( 'seg_cma', cma_base, cma_size, '__W_', |
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| 335 | vtype = 'PERI', x = 0, y = 0, pseg = 'CMA', |
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| 336 | local = False, big = True ) |
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| 337 | |
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| 338 | mapping.addGlobal( 'seg_fbf', fbf_base, fbf_size, '__W_', |
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| 339 | vtype = 'PERI', x = 0, y = 0, pseg = 'FBF', |
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| 340 | local = False, big = True ) |
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| 341 | |
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| 342 | mapping.addGlobal( 'seg_pic', pic_base, pic_size, '__W_', |
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| 343 | vtype = 'PERI', x = 0, y = 0, pseg = 'PIC', |
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| 344 | local = False, big = True ) |
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| 345 | |
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| 346 | ### global vsegs for internal peripherals : non local / small pages |
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| 347 | ### allocated in all clusters with name indexed by (x,y) |
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| 348 | ### as vbase address is incremented by (cluster_xy * vseg_increment) |
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| 349 | for x in xrange( x_size ): |
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| 350 | for y in xrange( y_size ): |
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| 351 | offset = ((x << y_width) + y) * peri_increment |
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| 352 | |
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| 353 | mapping.addGlobal( 'seg_xcu_%d_%d' %(x,y), xcu_base + offset, xcu_size, |
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| 354 | '__W_', vtype = 'PERI' , x = x , y = y , pseg = 'XCU', |
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| 355 | local = False, big = False ) |
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| 356 | |
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| 357 | mapping.addGlobal( 'seg_mmc_%d_%d' %(x,y), mmc_base + offset, mmc_size, |
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| 358 | '__W_', vtype = 'PERI' , x = x , y = y , pseg = 'MMC', |
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| 359 | local = False, big = False ) |
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| 360 | |
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| [793] | 361 | ### return mapping ### |
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| 362 | |
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| 363 | return mapping |
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| 364 | |
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| 365 | ################################# platform test ####################################################### |
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| 366 | |
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| 367 | if __name__ == '__main__': |
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| 368 | |
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| 369 | mapping = arch( x_size = 2, |
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| 370 | y_size = 2, |
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| 371 | nb_procs = 2 ) |
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| 372 | |
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| 373 | # print mapping.netbsd_dts() |
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| 374 | |
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| 375 | print mapping.xml() |
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| 376 | |
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| 377 | # print mapping.giet_vsegs() |
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| 378 | |
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| 379 | |
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| 380 | # Local Variables: |
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| 381 | # tab-width: 4; |
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| 382 | # c-basic-offset: 4; |
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| 383 | # c-file-offsets:((innamespace . 0)(inline-open . 0)); |
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| 384 | # indent-tabs-mode: nil; |
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| 385 | # End: |
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| 386 | # |
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| 387 | # vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 388 | |
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