Changes between Version 2 and Version 3 of AtomicOperations


Ignore:
Timestamp:
Jun 30, 2009, 8:02:52 PM (15 years ago)
Author:
alain
Comment:

--

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  • AtomicOperations

    v2 v3  
    2525
    2626{{{
    27 _itmask         # enter critical section
     27                        _itmask                 # enter critical section
    2828# lock acquisition
    2929loop            LL Reg1 @               # Reg1 <= M[@]
     
    4848
    4949The actions done by the memory cache controller for the various commands are described below :
    50  
     50
    5151'''LL(SRCID, X)'''
    5252{{{
     
    103103  If (RESERVED = true & ADDRESS = X) {    // local spin-lock         
    104104    return the read data to the processor
    105   } else {                                                           // first LL access                       
     105  } else {                                          // first LL access                       
    106106    RESERVED <= true
    107107    ADDRESS <= X
     
    117117    and return the Boolean response to the processor
    118118    RESERVED <= false
    119   } else {                                                            // failure 
     119  } else {                                         // failure 
    120120   return a false value to the processor
    121121   RESERVED <= false
     
    125125'''INVAL(L) or UPDATE(L) from memory controller'''
    126126{{{
    127   If (ADDRESS = L)  {                                        // invalidate reservation
     127  If (ADDRESS = L)  {                        // invalidate reservation
    128128    RESERVED <= false
    129129  }