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Lionel Lacassagne
Laboratoire d'Informatique de Paris 6 (LIP6) - Universite Pierre et Marie Curie (UPMC)
System on Chip Department (SoC)
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Introduction
This site dedicated to high performance computer architecture and embedded systems.
Image processing
Connected Component Labeling: the Light Speed Labeling is still the world fastest algorithm
Motion Detection algorithms: sigmadelta segmentation
Multi-target tracking: agile algorithmes combining mean-shift and covariance matching
more info
Computer Architecture Benchmarking
Benchmarking COTS components with classical image processing algorithms like: Optimized implementations of image processing and media algorithms:
Contours and edge detection algorithms: VLIW, Altivec & SSE2
Point of Interest: Harris & Achard algorithm for Altivec & SSE2
Optical Flow Algorithm: modified Lucas Kanade algorithm for Onera DTIM
Wavelet Transform
Scan Transform (based on Alain Merigot's idea)
more info
F16: 16-bit floating point: agile FPU for vision-SoC softcore
Developped by ILM, used by NVidia and ATI, coming into Image Processing field...
Dicrete Cosinuse Transform (JPEG)
Wavelet Transform (JPEG200)
Contours and edges detection algorithms
Point of Interest
Optical Flow: Horn-Shunk
more info
XLR8 Works
Code accelerations for COTS: multi-core SIMD processor, Cell, DSP, GPU
Tools for automatic code deployment and optimal parallelization of multi-core multi-processeurs architectures, clusters of processors, CELL
more info
R&D Industrial Projects
Teraops: 1 Teraops of power for embedded plateform
OCelle: Tools development for Cell processor
SafeAround: to detect and protect
LoVE: to avoid pedestrian car crash
more info
Jobs
PhD position (sujet de thèse), intership (stage), R&D recruitement (CDD), ...
more info
Teaching / Enseignement (french)
Cliquer
ici
Cours TD et TP
Big Brother is watching you
just smile ;-)
more info