[29] | 1 | /* |
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| 2 | * hal_init.c - C initialization procedure for x86. |
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| 3 | * |
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| 4 | * Copyright (c) 2017 Maxime Villard |
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| 5 | * |
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| 6 | * This file is part of ALMOS-MKH. |
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| 7 | * |
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| 8 | * ALMOS-MKH is free software; you can redistribute it and/or modify it |
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| 9 | * under the terms of the GNU General Public License as published by |
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| 10 | * the Free Software Foundation; version 2.0 of the License. |
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| 11 | * |
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| 12 | * ALMOS-MKH is distributed in the hope that it will be useful, but |
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| 13 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 15 | * General Public License for more details. |
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| 16 | * |
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| 17 | * You should have received a copy of the GNU General Public License |
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| 18 | * along with ALMOS-MKH.; if not, write to the Free Software Foundation, |
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| 19 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 20 | */ |
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| 21 | |
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| 22 | #include <hal_types.h> |
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| 23 | #include <hal_boot.h> |
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[32] | 24 | #include <hal_multiboot.h> |
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[29] | 25 | #include <hal_segmentation.h> |
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[45] | 26 | #include <hal_acpi.h> |
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[82] | 27 | #include <hal_apic.h> |
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[35] | 28 | #include <hal_internal.h> |
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[166] | 29 | #include <hal_register.h> |
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| 30 | |
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[72] | 31 | #include <hal_remote.h> |
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[99] | 32 | #include <hal_irqmask.h> |
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[29] | 33 | |
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| 34 | #include <memcpy.h> |
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| 35 | #include <thread.h> |
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| 36 | #include <string.h> |
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| 37 | #include <process.h> |
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| 38 | #include <printk.h> |
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| 39 | #include <vmm.h> |
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| 40 | #include <core.h> |
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| 41 | #include <cluster.h> |
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[70] | 42 | #include <chdev.h> |
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[29] | 43 | |
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[70] | 44 | #include <boot_info.h> |
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| 45 | |
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[81] | 46 | void kernel_init(boot_info_t *info); |
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| 47 | |
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[29] | 48 | static void gdt_create(); |
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| 49 | static void idt_create(); |
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[168] | 50 | void cpu_tls_init(size_t lid); |
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[166] | 51 | void cpu_identify(); |
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[29] | 52 | void cpu_attach(); |
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| 53 | |
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[44] | 54 | size_t mytest __in_kdata = 0; |
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[32] | 55 | |
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| 56 | struct multiboot_info mb_info __in_kdata; |
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| 57 | char mb_loader_name[PAGE_SIZE] __in_kdata; |
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| 58 | uint8_t mb_mmap[PAGE_SIZE] __in_kdata; |
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| 59 | |
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[29] | 60 | /* -------------------------------------------------------------------------- */ |
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| 61 | |
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[32] | 62 | static void |
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| 63 | dump_memmap() |
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| 64 | { |
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| 65 | size_t mmap_length = mb_info.mi_mmap_length; |
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| 66 | uint8_t *mmap_addr = (uint8_t *)&mb_mmap; |
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| 67 | size_t i; |
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| 68 | |
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| 69 | if (!(mb_info.mi_flags & MULTIBOOT_INFO_HAS_MMAP)) |
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[46] | 70 | x86_panic("No mmap"); |
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[32] | 71 | |
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| 72 | i = 0; |
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| 73 | while (i < mmap_length) { |
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| 74 | struct multiboot_mmap *mm; |
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| 75 | |
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| 76 | mm = (struct multiboot_mmap *)(mmap_addr + i); |
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| 77 | |
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| 78 | x86_printf("-> [%Z, %Z] %s\n", mm->mm_base_addr, |
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| 79 | mm->mm_base_addr + mm->mm_length, |
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| 80 | (mm->mm_type == 1) ? "ram" : "rsv" ); |
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| 81 | |
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| 82 | i += mm->mm_size + 4; |
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| 83 | } |
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| 84 | } |
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| 85 | |
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[135] | 86 | /* -------------------------------------------------------------------------- */ |
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| 87 | |
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[119] | 88 | static size_t init_bootinfo_pages_nr() |
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| 89 | { |
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| 90 | size_t mmap_length = mb_info.mi_mmap_length; |
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| 91 | uint8_t *mmap_addr = (uint8_t *)&mb_mmap; |
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| 92 | paddr_t maxpa, pa; |
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| 93 | size_t i; |
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| 94 | |
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| 95 | i = 0; |
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| 96 | maxpa = 0; |
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| 97 | while (i < mmap_length) { |
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| 98 | struct multiboot_mmap *mm; |
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| 99 | |
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| 100 | mm = (struct multiboot_mmap *)(mmap_addr + i); |
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| 101 | |
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| 102 | if (mm->mm_type == 1) { |
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| 103 | pa = mm->mm_base_addr + mm->mm_length; |
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| 104 | if (pa > maxpa) |
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| 105 | maxpa = pa; |
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| 106 | } |
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| 107 | |
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| 108 | i += mm->mm_size + 4; |
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| 109 | } |
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| 110 | |
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| 111 | return (maxpa / PAGE_SIZE); |
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| 112 | } |
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| 113 | |
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[116] | 114 | static size_t init_bootinfo_rsvd(boot_rsvd_t *rsvd) |
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| 115 | { |
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| 116 | size_t mmap_length = mb_info.mi_mmap_length; |
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| 117 | uint8_t *mmap_addr = (uint8_t *)&mb_mmap; |
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| 118 | size_t i, rsvd_nr; |
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| 119 | |
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[137] | 120 | memset(rsvd, 0, sizeof(boot_rsvd_t) * CONFIG_PPM_MAX_RSVD); |
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[116] | 121 | |
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| 122 | i = 0, rsvd_nr = 0; |
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| 123 | while (i < mmap_length) { |
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| 124 | struct multiboot_mmap *mm; |
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| 125 | |
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| 126 | mm = (struct multiboot_mmap *)(mmap_addr + i); |
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| 127 | |
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[119] | 128 | if (mm->mm_type != 1) { |
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| 129 | rsvd[rsvd_nr].first_page = |
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| 130 | rounddown(mm->mm_base_addr, PAGE_SIZE) / PAGE_SIZE; |
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| 131 | rsvd[rsvd_nr].npages = |
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| 132 | roundup(mm->mm_length, PAGE_SIZE) / PAGE_SIZE; |
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| 133 | rsvd_nr++; |
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| 134 | if (rsvd_nr == CONFIG_PPM_MAX_RSVD) |
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| 135 | x86_panic("too many memory holes"); |
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| 136 | } |
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[116] | 137 | |
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| 138 | i += mm->mm_size + 4; |
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| 139 | } |
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| 140 | |
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| 141 | return rsvd_nr; |
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| 142 | } |
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| 143 | |
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[70] | 144 | static void init_bootinfo_core(boot_core_t *core) |
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| 145 | { |
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| 146 | memset(core, 0, sizeof(boot_core_t)); |
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| 147 | |
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| 148 | core->gid = hal_lapic_gid(); |
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| 149 | core->lid = 0; |
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| 150 | core->cxy = 0; |
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| 151 | } |
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| 152 | |
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[195] | 153 | static void init_bootinfo_ioc(boot_device_t *dev) |
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| 154 | { |
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| 155 | memset(dev, 0, sizeof(boot_device_t)); |
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| 156 | |
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| 157 | dev->base = 0; |
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| 158 | dev->type = (DEV_FUNC_IOC << 16) | IMPL_IOC_BDV; |
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| 159 | dev->channels = 1; |
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| 160 | } |
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| 161 | |
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[192] | 162 | static void init_bootinfo_pic(boot_device_t *dev) |
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[70] | 163 | { |
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| 164 | memset(dev, 0, sizeof(boot_device_t)); |
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| 165 | |
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[192] | 166 | dev->base = 0; |
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| 167 | dev->type = (DEV_FUNC_PIC << 16) | IMPL_PIC_SCL; |
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[70] | 168 | dev->channels = 1; |
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| 169 | dev->param0 = 0; |
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| 170 | dev->param1 = 0; |
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| 171 | dev->param2 = 0; |
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| 172 | dev->param3 = 0; |
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| 173 | |
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[202] | 174 | dev->irqs = 16; |
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[192] | 175 | |
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| 176 | /* COM1 */ |
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[202] | 177 | dev->irq[IRQ_COM1].dev_type = (DEV_FUNC_TXT << 16) | IMPL_TXT_TTY; |
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| 178 | dev->irq[IRQ_COM1].channel = 0; |
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| 179 | dev->irq[IRQ_COM1].is_rx = 0; |
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| 180 | dev->irq[IRQ_COM1].valid = 1; |
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| 181 | |
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| 182 | /* ATA */ |
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| 183 | dev->irq[IRQ_ATA0].dev_type = (DEV_FUNC_IOC << 16) | IMPL_IOC_BDV; |
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| 184 | dev->irq[IRQ_ATA0].channel = 0; |
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| 185 | dev->irq[IRQ_ATA0].is_rx = 0; |
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| 186 | dev->irq[IRQ_ATA0].valid = 1; |
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[70] | 187 | } |
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| 188 | |
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[192] | 189 | static void init_bootinfo_txt(boot_device_t *dev) |
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| 190 | { |
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| 191 | memset(dev, 0, sizeof(boot_device_t)); |
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| 192 | |
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| 193 | dev->base = 0; |
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| 194 | dev->type = (DEV_FUNC_TXT << 16) | IMPL_TXT_TTY; |
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| 195 | dev->channels = 1; |
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| 196 | dev->param0 = 0; |
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| 197 | dev->param1 = 0; |
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| 198 | dev->param2 = 0; |
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| 199 | dev->param3 = 0; |
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| 200 | } |
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| 201 | |
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[70] | 202 | static void init_bootinfo(boot_info_t *info) |
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| 203 | { |
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[116] | 204 | size_t offset; |
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[114] | 205 | |
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[70] | 206 | extern uint64_t __kernel_data_start; |
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| 207 | extern uint64_t __kernel_end; |
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| 208 | |
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| 209 | memset(info, 0, sizeof(boot_info_t)); |
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| 210 | |
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| 211 | info->signature = 0; |
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| 212 | |
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| 213 | info->paddr_width = 0; |
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| 214 | info->x_width = 1; |
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| 215 | info->y_width = 1; |
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| 216 | info->x_size = 1; |
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| 217 | info->y_size = 1; |
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| 218 | info->io_cxy = 0; |
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| 219 | |
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[195] | 220 | info->ext_dev_nr = 3; |
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[70] | 221 | init_bootinfo_txt(&info->ext_dev[0]); |
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[192] | 222 | init_bootinfo_pic(&info->ext_dev[1]); |
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[195] | 223 | init_bootinfo_ioc(&info->ext_dev[2]); |
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[70] | 224 | |
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| 225 | info->cxy = 0; |
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| 226 | info->cores_nr = 1; |
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| 227 | init_bootinfo_core(&info->core[0]); |
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| 228 | |
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[137] | 229 | info->rsvd_nr = init_bootinfo_rsvd((boot_rsvd_t *)&info->rsvd); |
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[70] | 230 | |
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[192] | 231 | /* TODO: dev_icu */ |
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[135] | 232 | /* TODO: dev_mmc */ |
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| 233 | /* TODO: dev_dma */ |
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| 234 | |
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[116] | 235 | offset = hal_gpt_bootstrap_uniformize(); |
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| 236 | info->pages_offset = offset / PAGE_SIZE; |
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[119] | 237 | info->pages_nr = init_bootinfo_pages_nr(); |
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[70] | 238 | |
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| 239 | info->kernel_code_start = (intptr_t)(KERNTEXTOFF - KERNBASE); |
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| 240 | info->kernel_code_end = (intptr_t)(&__kernel_data_start - KERNBASE) - 1; |
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| 241 | info->kernel_data_start = (intptr_t)(&__kernel_data_start - KERNBASE); |
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| 242 | info->kernel_code_end = (intptr_t)(&__kernel_end - KERNBASE) - 1; |
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| 243 | } |
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| 244 | |
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[166] | 245 | /* -------------------------------------------------------------------------- */ |
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| 246 | |
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[199] | 247 | static void apic_map() |
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| 248 | { |
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| 249 | extern vaddr_t lapic_va, ioapic_va; |
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| 250 | extern paddr_t lapic_pa, ioapic_pa; |
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| 251 | |
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| 252 | lapic_va = hal_gpt_bootstrap_valloc(1); // XXX: should be shared |
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| 253 | hal_gpt_enter(lapic_va, lapic_pa, PG_V|PG_KW|PG_NX|PG_N); |
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| 254 | |
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| 255 | ioapic_va = hal_gpt_bootstrap_valloc(1); // XXX: should be shared |
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| 256 | hal_gpt_enter(ioapic_va, ioapic_pa, PG_V|PG_KW|PG_NX|PG_N); |
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| 257 | } |
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| 258 | |
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[29] | 259 | void init_x86_64(paddr_t firstpa) |
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| 260 | { |
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[70] | 261 | boot_info_t btinfo; |
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| 262 | |
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[154] | 263 | /* Initialize the serial port */ |
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| 264 | hal_com_init_early(); |
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| 265 | |
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[29] | 266 | x86_printf("[+] init_x86_64 called\n"); |
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| 267 | |
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| 268 | /* Create the global structures */ |
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| 269 | gdt_create(); |
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| 270 | idt_create(); |
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| 271 | |
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[166] | 272 | /* Identify the features of the cpu */ |
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| 273 | cpu_identify(); |
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| 274 | |
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[29] | 275 | /* Attach cpu0 */ |
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[162] | 276 | cpu_attach(0); |
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[29] | 277 | x86_printf("[+] cpu_attach called\n"); |
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| 278 | |
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[47] | 279 | x86_printf("[+] bootloader: '%s'\n", mb_loader_name); |
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[32] | 280 | |
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| 281 | dump_memmap(); |
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| 282 | x86_printf("[+] dump finished\n"); |
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| 283 | |
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[35] | 284 | hal_gpt_init(firstpa); |
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| 285 | x86_printf("[+] hal_gpt_init called\n"); |
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[29] | 286 | |
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[35] | 287 | hal_acpi_init(); |
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| 288 | x86_printf("[+] hal_acpi_init called\n"); |
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| 289 | |
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[45] | 290 | hal_gpt_bootstrap_reset(); |
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| 291 | x86_printf("[+] hal_gpt_bootstrap_reset called\n"); |
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| 292 | |
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[199] | 293 | apic_map(); |
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| 294 | x86_printf("[+] apic_map called\n"); |
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| 295 | |
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[82] | 296 | hal_apic_init(); |
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| 297 | x86_printf("[+] hal_apic_init called\n"); |
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[45] | 298 | |
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[168] | 299 | cpu_tls_init(0); |
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| 300 | x86_printf("[+] cput_tls_init called\n"); |
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[46] | 301 | |
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[44] | 302 | x86_printf("-> mytest = %z\n", mytest); |
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[94] | 303 | void *hoho = &init_x86_64; |
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[74] | 304 | xptr_t myptr = XPTR(0, &mytest); |
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[35] | 305 | |
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[94] | 306 | hal_remote_spt(myptr, hoho); |
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| 307 | x86_printf("-> mytest = %Z\n", hal_remote_lpt(myptr)); |
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| 308 | |
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[99] | 309 | init_bootinfo(&btinfo); |
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[94] | 310 | |
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[99] | 311 | reg_t dummy; |
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| 312 | hal_enable_irq(&dummy); |
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| 313 | |
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[70] | 314 | kernel_init(&btinfo); |
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[99] | 315 | |
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[70] | 316 | x86_printf("[+] kernel_init called\n"); |
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[192] | 317 | /* |
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| 318 | void *ptr; |
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[70] | 319 | |
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[192] | 320 | khm_t *khm = &LOCAL_CLUSTER->khm; |
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| 321 | ptr = khm_alloc(khm, 10); |
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| 322 | memset(ptr, 0, 10); |
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| 323 | khm_free(ptr); |
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| 324 | |
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| 325 | |
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| 326 | kcm_t *kcm = &LOCAL_CLUSTER->kcm; |
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| 327 | ptr = kcm_alloc(kcm); |
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| 328 | memset(ptr, 0, 1); |
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| 329 | kcm_free(ptr); |
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| 330 | |
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| 331 | ptr = ppm_alloc_pages(1); |
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| 332 | ppm_free_pages(ptr); |
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| 333 | */ |
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[99] | 334 | while (1); |
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| 335 | |
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[82] | 336 | // void x86_stop(); |
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| 337 | // x86_stop(); |
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[29] | 338 | } |
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| 339 | |
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| 340 | /* -------------------------------------------------------------------------- */ |
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| 341 | |
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[165] | 342 | /* x86-specific per-cluster structures */ |
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[29] | 343 | uint8_t gdtstore[PAGE_SIZE] __in_kdata; |
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| 344 | uint8_t idtstore[PAGE_SIZE] __in_kdata; |
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| 345 | |
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[165] | 346 | /* x86-specific per-cpu structures */ |
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| 347 | typedef struct { |
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| 348 | struct tss tss; |
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[168] | 349 | struct tls tls; |
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[165] | 350 | uint8_t intr_stack[STKSIZE]; |
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| 351 | uint8_t dbfl_stack[STKSIZE]; |
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| 352 | uint8_t nmfl_stack[STKSIZE]; |
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| 353 | } percpu_archdata_t; |
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| 354 | percpu_archdata_t cpudata[CONFIG_MAX_LOCAL_CORES] __in_kdata; |
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| 355 | |
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[29] | 356 | static void |
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| 357 | setregion(struct region_descriptor *rd, void *base, uint16_t limit) |
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| 358 | { |
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| 359 | rd->rd_limit = limit; |
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| 360 | rd->rd_base = (uint64_t)base; |
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| 361 | } |
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| 362 | |
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| 363 | /* -------------------------------------------------------------------------- */ |
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| 364 | |
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| 365 | static void |
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| 366 | gdt_set_memseg(struct gdt_memseg *sd, void *base, size_t limit, |
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| 367 | int type, int dpl, int gran, int is64) |
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| 368 | { |
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| 369 | sd->sd_lolimit = (unsigned)limit; |
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| 370 | sd->sd_lobase = (unsigned long)base; |
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| 371 | sd->sd_type = type; |
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| 372 | sd->sd_dpl = dpl; |
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| 373 | sd->sd_p = 1; |
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| 374 | sd->sd_hilimit = (unsigned)limit >> 16; |
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| 375 | sd->sd_avl = 0; |
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| 376 | sd->sd_long = is64; |
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| 377 | sd->sd_def32 = 0; |
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| 378 | sd->sd_gran = gran; |
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| 379 | sd->sd_hibase = (unsigned long)base >> 24; |
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| 380 | } |
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| 381 | |
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| 382 | static void |
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| 383 | gdt_set_sysseg(struct gdt_sysseg *sd, void *base, size_t limit, |
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| 384 | int type, int dpl, int gran) |
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| 385 | { |
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| 386 | memset(sd, 0, sizeof *sd); |
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| 387 | sd->sd_lolimit = (unsigned)limit; |
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| 388 | sd->sd_lobase = (uint64_t)base; |
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| 389 | sd->sd_type = type; |
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| 390 | sd->sd_dpl = dpl; |
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| 391 | sd->sd_p = 1; |
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| 392 | sd->sd_hilimit = (unsigned)limit >> 16; |
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| 393 | sd->sd_gran = gran; |
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| 394 | sd->sd_hibase = (uint64_t)base >> 24; |
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| 395 | } |
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| 396 | |
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| 397 | static void gdt_create() |
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| 398 | { |
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| 399 | memset(&gdtstore, 0, PAGE_SIZE); |
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| 400 | |
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| 401 | /* Flat segments */ |
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| 402 | gdt_set_memseg(GDT_ADDR_MEM(gdtstore, GDT_KCODE_SEL), 0, |
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| 403 | 0xfffff, SDT_MEMERA, SEL_KPL, 1, 1); |
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| 404 | gdt_set_memseg(GDT_ADDR_MEM(gdtstore, GDT_KDATA_SEL), 0, |
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| 405 | 0xfffff, SDT_MEMRWA, SEL_KPL, 1, 1); |
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| 406 | gdt_set_memseg(GDT_ADDR_MEM(gdtstore, GDT_UCODE_SEL), 0, |
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| 407 | 0xfffff, SDT_MEMERA, SEL_UPL, 1, 1); |
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| 408 | gdt_set_memseg(GDT_ADDR_MEM(gdtstore, GDT_UDATA_SEL), 0, |
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| 409 | 0xfffff, SDT_MEMRWA, SEL_UPL, 1, 1); |
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| 410 | } |
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| 411 | |
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| 412 | void cpu_load_gdt() |
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| 413 | { |
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| 414 | struct region_descriptor region; |
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| 415 | setregion(®ion, &gdtstore, PAGE_SIZE - 1); |
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| 416 | lgdt(®ion); |
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| 417 | } |
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| 418 | |
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| 419 | /* -------------------------------------------------------------------------- */ |
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| 420 | |
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[203] | 421 | struct { |
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| 422 | bool_t busy[256]; |
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| 423 | } idt_bitmap __in_kdata; |
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| 424 | |
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| 425 | int idt_slot_alloc() |
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| 426 | { |
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| 427 | size_t i; |
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| 428 | |
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| 429 | for (i = 0; i < 256; i++) { |
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| 430 | if (!idt_bitmap.busy[i]) |
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| 431 | break; |
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| 432 | } |
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| 433 | if (i == 256) { |
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| 434 | return -1; |
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| 435 | } |
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| 436 | |
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| 437 | idt_bitmap.busy[i] = true; |
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| 438 | return (int)i; |
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| 439 | } |
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| 440 | |
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| 441 | void idt_slot_free(int slot) |
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| 442 | { |
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| 443 | idt_bitmap.busy[slot] = false; |
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| 444 | } |
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| 445 | |
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[29] | 446 | static void |
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| 447 | idt_set_seg(struct idt_seg *seg, void *func, int ist, int type, int dpl, int sel) |
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| 448 | { |
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| 449 | seg->gd_looffset = (uint64_t)func & 0xffff; |
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| 450 | seg->gd_selector = sel; |
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| 451 | seg->gd_ist = ist; |
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| 452 | seg->gd_type = type; |
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| 453 | seg->gd_dpl = dpl; |
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| 454 | seg->gd_p = 1; |
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| 455 | seg->gd_hioffset = (uint64_t)func >> 16; |
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| 456 | seg->gd_zero = 0; |
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| 457 | seg->gd_xx1 = 0; |
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| 458 | seg->gd_xx2 = 0; |
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| 459 | seg->gd_xx3 = 0; |
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| 460 | } |
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| 461 | |
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| 462 | static void idt_create() |
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| 463 | { |
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[80] | 464 | extern uint64_t x86_traps[], x86_intrs[], x86_rsvd; |
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[29] | 465 | struct idt_seg *idt; |
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| 466 | size_t i; |
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| 467 | |
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[203] | 468 | memset(&idt_bitmap, 0, sizeof(idt_bitmap)); |
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[29] | 469 | idt = (struct idt_seg *)&idtstore; |
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[45] | 470 | |
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[80] | 471 | /* First, put a dead entry */ |
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| 472 | for (i = 0; i < NIDT; i++) { |
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| 473 | idt_set_seg(&idt[i], (void *)&x86_rsvd, 0, |
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| 474 | SDT_SYS386IGT, SEL_KPL, GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL)); |
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| 475 | } |
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| 476 | |
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[45] | 477 | /* General exceptions */ |
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| 478 | for (i = CPUVEC_MIN; i < CPUVEC_MAX; i++) { |
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| 479 | idt_set_seg(&idt[i], (void *)x86_traps[i - CPUVEC_MIN], 0, |
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| 480 | SDT_SYS386IGT, SEL_KPL, GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL)); |
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[203] | 481 | idt_bitmap.busy[i] = true; |
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[29] | 482 | } |
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[45] | 483 | |
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[138] | 484 | /* Dynamically configured interrupts */ |
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| 485 | for (i = DYNVEC_MIN; i < DYNVEC_MAX; i++) { |
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| 486 | idt_set_seg(&idt[i], (void *)x86_intrs[i - DYNVEC_MIN], 0, |
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[45] | 487 | SDT_SYS386IGT, SEL_KPL, GDT_FIXED_SEL(GDT_KCODE_SEL, SEL_KPL)); |
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[203] | 488 | idt_bitmap.busy[i] = true; |
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[45] | 489 | } |
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[29] | 490 | } |
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| 491 | |
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| 492 | void cpu_load_idt() |
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| 493 | { |
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| 494 | struct region_descriptor region; |
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| 495 | setregion(®ion, &idtstore, PAGE_SIZE - 1); |
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| 496 | lidt(®ion); |
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| 497 | } |
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| 498 | |
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| 499 | /* -------------------------------------------------------------------------- */ |
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| 500 | |
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[164] | 501 | int tss_alloc(struct tss *tss, size_t lid) |
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[29] | 502 | { |
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| 503 | int slot; |
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| 504 | |
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[164] | 505 | slot = GDT_CPUTSS_SEL + lid; |
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[29] | 506 | |
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| 507 | gdt_set_sysseg(GDT_ADDR_SYS(gdtstore, slot), tss, |
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| 508 | sizeof(*tss) - 1, SDT_SYS386TSS, SEL_KPL, 0); |
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| 509 | |
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| 510 | return GDT_DYNAM_SEL(slot, SEL_KPL); |
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| 511 | } |
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| 512 | |
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[162] | 513 | void cpu_create_tss(size_t lid) |
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[29] | 514 | { |
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[165] | 515 | percpu_archdata_t *data = &cpudata[lid]; |
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| 516 | struct tss *tss = &data->tss; |
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[29] | 517 | int sel; |
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| 518 | |
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| 519 | /* Create the tss */ |
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| 520 | memset(tss, 0, sizeof(*tss)); |
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[162] | 521 | |
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| 522 | /* tss->tss_rsp0 */ |
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[165] | 523 | tss->tss_ist[0] = (uint64_t)data->intr_stack[lid] + STKSIZE; |
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| 524 | tss->tss_ist[1] = (uint64_t)data->dbfl_stack[lid] + STKSIZE; |
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| 525 | tss->tss_ist[2] = (uint64_t)data->nmfl_stack[lid] + STKSIZE; |
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[29] | 526 | tss->tss_iobase = IOMAP_INVALOFF << 16; |
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[164] | 527 | sel = tss_alloc(tss, lid); |
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[29] | 528 | |
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| 529 | /* Load it */ |
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| 530 | ltr(sel); |
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| 531 | } |
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| 532 | |
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| 533 | /* -------------------------------------------------------------------------- */ |
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| 534 | |
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[168] | 535 | void cpu_tls_init(size_t lid) |
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| 536 | { |
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| 537 | percpu_archdata_t *data = &cpudata[lid]; |
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| 538 | tls_t *cputls = &data->tls; |
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| 539 | |
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| 540 | memset(cputls, 0, sizeof(tls_t)); |
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| 541 | |
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| 542 | cputls->tls_self = cputls; |
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| 543 | cputls->tls_gid = hal_lapic_gid(); |
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| 544 | cputls->tls_lid = lid; |
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| 545 | |
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| 546 | wrmsr(MSR_FSBASE, 0); |
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| 547 | wrmsr(MSR_GSBASE, (uint64_t)cputls); |
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| 548 | wrmsr(MSR_KERNELGSBASE, 0); |
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| 549 | } |
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| 550 | |
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| 551 | /* -------------------------------------------------------------------------- */ |
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| 552 | |
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[166] | 553 | uint64_t cpu_features[4] __in_kdata; |
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| 554 | |
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| 555 | void cpu_identify() |
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| 556 | { |
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| 557 | /* |
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| 558 | * desc[0] = eax |
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| 559 | * desc[1] = ebx |
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| 560 | * desc[2] = ecx |
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| 561 | * desc[3] = edx |
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| 562 | */ |
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| 563 | uint32_t desc[4]; |
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| 564 | char vendor[13]; |
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| 565 | size_t lvl; |
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| 566 | |
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| 567 | /* |
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| 568 | * Get information from the standard cpuid leafs |
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| 569 | */ |
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| 570 | cpuid(0, 0, (uint32_t *)&desc); |
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| 571 | |
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| 572 | lvl = (uint64_t)desc[0]; |
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| 573 | x86_printf("-> cpuid standard level: %z\n", lvl); |
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| 574 | |
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| 575 | memcpy(vendor + 0, &desc[1], sizeof(uint32_t)); |
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| 576 | memcpy(vendor + 8, &desc[2], sizeof(uint32_t)); |
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| 577 | memcpy(vendor + 4, &desc[3], sizeof(uint32_t)); |
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| 578 | vendor[12] = '\0'; |
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| 579 | x86_printf("-> CPU vendor: '%s'\n", vendor); |
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| 580 | |
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| 581 | if (lvl >= 1) { |
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| 582 | cpuid(1, 0, (uint32_t *)&desc); |
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| 583 | cpu_features[0] = desc[3]; |
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| 584 | cpu_features[1] = desc[2]; |
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| 585 | } |
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| 586 | |
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| 587 | /* |
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| 588 | * Get information from the extended cpuid leafs |
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| 589 | */ |
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| 590 | cpuid(0x80000000, 0, desc); |
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| 591 | |
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| 592 | lvl = (uint64_t)desc[0]; |
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| 593 | x86_printf("-> cpuid extended level: %Z\n", lvl); |
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| 594 | } |
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| 595 | |
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| 596 | /* -------------------------------------------------------------------------- */ |
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| 597 | |
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[162] | 598 | void cpu_attach(size_t lid) |
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[29] | 599 | { |
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[168] | 600 | /* Per-cluster structures */ |
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[29] | 601 | cpu_load_gdt(); |
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| 602 | cpu_load_idt(); |
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[168] | 603 | |
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| 604 | /* Per-cpu structures */ |
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[162] | 605 | cpu_create_tss(lid); |
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[166] | 606 | |
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| 607 | if (cpu_features[0] & CPUID_PSE) { |
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| 608 | lcr4(rcr4() | CR4_PSE); |
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| 609 | tlbflushg(); |
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| 610 | } else { |
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| 611 | /* |
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| 612 | * amd64 supports PSE by default, if it's not here we have a |
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| 613 | * problem |
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| 614 | */ |
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| 615 | x86_panic("PSE not supported"); |
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| 616 | } |
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[29] | 617 | } |
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| 618 | |
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