Changeset 623 for trunk/hal/tsar_mips32/core/hal_gpt.c

Timestamp:

Mar 6, 2019, 4:37:15 PM (5 years ago)

Author:

alain

Message:

Introduce three new types of vsegs (KCODE,KDATA,KDEV)
to map the kernel vsegs in the process VSL and GPT.
This now used by both the TSAR and the I86 architectures.

File:

• trunk/hal/tsar_mips32/core/hal_gpt.c (modified) (5 diffs)

trunk/hal/tsar_mips32/core/hal_gpt.c

@@ -141 +141 @@
 #endif
 
-    // check page size
-    assert( (CONFIG_PPM_PAGE_SIZE == 4096) ,
-    "for TSAR, the page size must be 4 Kbytes\n" );
+// check page size
+assert( (CONFIG_PPM_PAGE_SIZE == 4096) , "for TSAR, the page size must be 4 Kbytes\n" );
 
     // allocates 2 physical pages for PT1
@@ -287 +286 @@
     vpn_t      vpn;
 
-    assert( (process != NULL) , "NULL process pointer\n");
+// check argument
+assert( (process != NULL) , "NULL process pointer\n");
 
     // get pointer on gpt
@@ -295 +295 @@
     pt1 = (uint32_t *)gpt->ptr;
 
-    printk("\n***** Generic Page Table for process %x : &gpt = %x / &pt1 = %x\n\n",
+    printk("\n***** Tsar Page Table for process %x : &gpt = %x / &pt1 = %x\n\n",
     process->pid , gpt , pt1 );
 
@@ -334 +334 @@
 
 
+/////////////////////////////////////////////////////////////////////////////////////
+// FOr the TSAR architecture, this function allocates a first level PT1 (8 Kbytes),
+// and maps one single big page for the kerne code segment in slot[0].
+/////////////////////////////////////////////////////////////////////////////////////
+void hal_gpt_build_kpt( cxy_t   cxy,
+                        gpt_t * gpt )
+{
+    error_t error;
+
+    // allocate memory for one gpt
+    error = hal_gpt_create( gpt );
+
+    if( error )
+    {
+        printk("\n[PANIC] in %s : cannot allocate kernel GPT in cluster %x\n",
+        __FUNCTION__ , cxy );
+        hal_core_sleep();
+    }
+
+    // compute attr and ppn for one PTE1
+    uint32_t attr  = 0xCA800000;           // bits : V,T,C,X,G
+    uint32_t ppn   = (cxy << 20) >> 9;
+
+    // set PTE1 
+    error = hal_gpt_set_pte( XPTR( cxy , gpt ) , 0 , attr , ppn );
+
+    if( error )
+    {
+        printk("\n[PANIC] in %s : cannot initialize kernel GPT in cluster %x\n",
+        __FUNCTION__ , cxy );
+        hal_core_sleep();
+    }
+}
+
 //////////////////////////////////////////
 error_t hal_gpt_set_pte( xptr_t    gpt_xp,
@@ -390 +424 @@
         if( small == 0 )     // map a big page in PT1 
     {
-        assert( (pte1 == 0) ,
-                "try to set a big page in a mapped PT1 entry / PT1[%d] = %x\n", ix1 , pte1 );
-      
+
+// check PT1 entry not mapped
+assert( (pte1 == 0) , "try to set a big page in a mapped PT1 entry\n" );
+
+// check VPN aligned
+assert( (ix2 == 0) , "illegal vpn for a big page\n" );
+
+// check PPN aligned
+assert( ((ppn & 0x1FF) == 0) , "illegal ppn for a big page\n" );
+
         // set the PTE1 value in PT1
         pte1 = (tsar_attr  & TSAR_MMU_PTE1_ATTR_MASK) | ((ppn >> 9) & TSAR_MMU_PTE1_PPN_MASK);