Changeset 105 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp
- Timestamp:
- Feb 5, 2009, 12:18:31 PM (15 years ago)
- File:
-
- 1 edited
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp
r101 r105 31 31 context_state_t state = reg_STATE [i]; 32 32 33 Tcontrol_t val = ((state == CONTEXT_STATE_KO_EXCEP_ADDR) or 34 (state == CONTEXT_STATE_KO_MISS_ADDR ) or 35 (state == CONTEXT_STATE_KO_PSYNC_ADDR) or 33 Tcontrol_t val = ((state == CONTEXT_STATE_KO_EXCEP_ADDR ) or 34 (state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR) or 35 (state == CONTEXT_STATE_KO_MISS_LOAD_ADDR ) or 36 (state == CONTEXT_STATE_KO_PSYNC_ADDR ) or 36 37 (state == CONTEXT_STATE_KO_CSYNC_ADDR)); 37 38 … … 40 41 Taddress_t address = reg_EVENT_ADDRESS [i] | (((state == CONTEXT_STATE_KO_EXCEP_ADDR) and PORT_READ(in_SPR_SR_EPH [i]))?(0xF000000>>2):0); 41 42 Taddress_t address_next = reg_EVENT_ADDRESS_EPCR [i]; 42 Tcontrol_t address_next_val = (state == CONTEXT_STATE_KO_MISS_ ADDR) and (reg_EVENT_ADDRESS_EPCR_VAL [i]);43 Tcontrol_t is_ds_take = (state == CONTEXT_STATE_KO_MISS_ ADDR) and (reg_EVENT_IS_DS_TAKE [i]);43 Tcontrol_t address_next_val = (state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR) and (reg_EVENT_ADDRESS_EPCR_VAL [i]); 44 Tcontrol_t is_ds_take = (state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR) and (reg_EVENT_IS_DS_TAKE [i]); 44 45 // excep : address exception 45 46 // miss : address delay_slot, and address dest … … 51 52 switch (state) 52 53 { 53 case CONTEXT_STATE_KO_EXCEP_ADDR : (type = EVENT_TYPE_EXCEPTION ); break; 54 case CONTEXT_STATE_KO_MISS_ADDR : (type = EVENT_TYPE_MISS_SPECULATION ); break; 55 case CONTEXT_STATE_KO_PSYNC_ADDR : (type = EVENT_TYPE_PSYNC ); break; 56 case CONTEXT_STATE_KO_CSYNC_ADDR : (type = EVENT_TYPE_CSYNC ); break; 57 default : (type = EVENT_TYPE_NONE ); break; 54 case CONTEXT_STATE_KO_EXCEP_ADDR : (type = EVENT_TYPE_EXCEPTION ); break; 55 case CONTEXT_STATE_KO_MISS_BRANCH_ADDR: (type = EVENT_TYPE_BRANCH_MISS_SPECULATION); break; 56 case CONTEXT_STATE_KO_MISS_LOAD_ADDR : (type = EVENT_TYPE_LOAD_MISS_SPECULATION ); break; 57 case CONTEXT_STATE_KO_PSYNC_ADDR : (type = EVENT_TYPE_PSYNC ); break; 58 case CONTEXT_STATE_KO_CSYNC_ADDR : (type = EVENT_TYPE_CSYNC ); break; 59 default : (type = EVENT_TYPE_NONE ); break; 58 60 } 59 61 // (type = EVENT_TYPE_SPR_ACCESS );
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