Ignore:
Timestamp:
Jul 17, 2009, 10:59:05 AM (15 years ago)
Author:
rosiere
Message:

1) Add Vhdl component
2) Inhib VHDL Seltest interface

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_allocation.cpp

    r112 r135  
    7070    {
    7171      ALLOC1_INTERFACE_BEGIN("address", OUT, SOUTH, _("Access at request icache."),_param->_nb_instruction);
     72      INTERFACE1_TEST(false,_param->_nb_instruction);
    7273
    7374      ALLOC1_SIGNAL_OUT(out_ADDRESS_INSTRUCTION_ENABLE         ,"instruction_enable"         ,Tcontrol_t        ,1);
     
    9697    {
    9798      ALLOC1_INTERFACE_BEGIN("predict", IN, NORTH, _("Request the prediction unit."),_param->_nb_instruction);
     99      INTERFACE1_TEST(false,_param->_nb_instruction);
    98100
    99101      ALLOC1_SIGNAL_IN (in_PREDICT_INSTRUCTION_ENABLE          ,"instruction_enable"         ,Tcontrol_t        ,1);
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