source: trunk/softs/tsar_boot/README.txt @ 602

Last change on this file since 602 was 568, checked in by cfuguet, 11 years ago

Adding support for TSAR platforms using the vci_io_bridge component.

In this case (USE_IOB=1), when a block is read from the disk controller,
the buffer containing the read data must be invalidated in the Memory
Cache as the transfer is done between the disk controller and the RAM.

File size: 3.0 KB
RevLine 
[292]1TSAR BOOT LOADER
2
3Files:
4===============================================================================
5src/        Source files
[302]6            The entry point of this boot loader is the file reset.S
[292]7
8include/    Header files
9
[388]10conf/       Platform specific files and ldscript examples.
[347]11            For each platform, we must define a new directory.
[292]12
13      --->  defs_platform.h:
14
[302]15             This file is mandatory. This file defines the
[292]16             NB_PROCS per cluster, the NB_CLUSTERS and the base address of
[568]17             the TTY, IOC, XICU and MEMC (config) devices.
[347]18             It defines also:
[425]19
[568]20              -> USE_IOB
21                 This constant is used by the boot_ioc_read function to know
22                 if the buffer used to store the blocks from the
23                 block_device must be invalidated in the memory cache after
24                 the transfert has finished.
25
[347]26              -> CACHE_COHERENCE
27                 This constant is used by the boot_ioc_read function to know
28                 if the buffer used to store the blocks from the block_device
29                 must be invalidated in the dcache after the transfert has
30                 finished.
[292]31
[347]32              -> CACHE_LINE_SIZE
[568]33                 This constant is mandatory if CACHE_COHERENCE=0 or USE_IOB=1
[347]34                 This constant defines the size in bytes of a cache line.
35
[425]36              -> BOOT_DEBUG
37                 Set value to 1 to show some debug messages during loading
38
39              -> BOOT_DEBUG_IOC
40                 Set value to 1 to show some debug messages during loading
41                 concerning the disk accesses.
42
[347]43              -> IRQ_PER_PROC
44                 This constant is used to know how many XICU irq outputs are
45                 connected to each processor.
46
[292]47      --->  platform_soclib.dts:
48
[425]49             Device tree file. It is mandatory if compiling for a SOCLIB
50             platform and USE_DT=1.
[292]51
52      --->  platform_fpga.dts:
[388]53
[425]54             Device tree file. It is mandatory if compiling for a FPGA platform
55             and USE_DT=1.
[292]56
57      --->  ldscript:
[388]58
[302]59             LD script defining the segments of this boot loader.
[292]60             We define two segments:
61                seg_stack_base: Base address of the stack used by processor 0
[554]62                during the boot process. read-write data and bss will also
[568]63                be there.
[292]64
[554]65                seg_boot_base: Base address of the code and read-only data
[568]66                defined for this loader
[292]67           
68Makefile    Makefile for compile the boot loader.
69            Arguments to pass:
70
[388]71             ---> PLATFORM_DIR=<platform_dir>
[292]72   
73                   Defines the directory where to find the plateform specific
74                   files
75
76             ---> SOCLIB=1
77
78                   If using SOCLIB, define this flag to use the SOCLIB device
79                   drivers
80
[425]81             ---> USE_DT=0
[292]82
[425]83                   If a device tree file is not used, set this flag to 0. It
84                   is set by default to 1.
[292]85
[425]86              e.g. make PLATFORM_DIR=conf/<platform_dir> SOCLIB=1 USE_DT=0
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